107 	u32 reo_base = HAL_SEQ_WCSS_UMAC_REO_REG;  in ath11k_hw_ipq8074_reo_setup()  local
119 	val = ath11k_hif_read32(ab, reo_base + HAL_REO1_GEN_ENABLE);  in ath11k_hw_ipq8074_reo_setup()
126 	ath11k_hif_write32(ab, reo_base + HAL_REO1_GEN_ENABLE, val);  in ath11k_hw_ipq8074_reo_setup()
128 	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_0(ab),  in ath11k_hw_ipq8074_reo_setup()
130 	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_1(ab),  in ath11k_hw_ipq8074_reo_setup()
132 	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_2(ab),  in ath11k_hw_ipq8074_reo_setup()
134 	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_3(ab),  in ath11k_hw_ipq8074_reo_setup()
137 	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_0,  in ath11k_hw_ipq8074_reo_setup()
140 	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_1,  in ath11k_hw_ipq8074_reo_setup()
143 	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_2,  in ath11k_hw_ipq8074_reo_setup()
146 	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_3,  in ath11k_hw_ipq8074_reo_setup()
761 	u32 reo_base = HAL_SEQ_WCSS_UMAC_REO_REG;  in ath11k_hw_wcn6855_reo_setup()  local
773 	val = ath11k_hif_read32(ab, reo_base + HAL_REO1_GEN_ENABLE);  in ath11k_hw_wcn6855_reo_setup()
776 	ath11k_hif_write32(ab, reo_base + HAL_REO1_GEN_ENABLE, val);  in ath11k_hw_wcn6855_reo_setup()
778 	val = ath11k_hif_read32(ab, reo_base + HAL_REO1_MISC_CTL(ab));  in ath11k_hw_wcn6855_reo_setup()
781 	ath11k_hif_write32(ab, reo_base + HAL_REO1_MISC_CTL(ab), val);  in ath11k_hw_wcn6855_reo_setup()
783 	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_0(ab),  in ath11k_hw_wcn6855_reo_setup()
785 	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_1(ab),  in ath11k_hw_wcn6855_reo_setup()
787 	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_2(ab),  in ath11k_hw_wcn6855_reo_setup()
789 	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_3(ab),  in ath11k_hw_wcn6855_reo_setup()
792 	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_2,  in ath11k_hw_wcn6855_reo_setup()
794 	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_3,  in ath11k_hw_wcn6855_reo_setup()
800 	u32 reo_base = HAL_SEQ_WCSS_UMAC_REO_REG;  in ath11k_hw_ipq5018_reo_setup()  local
813 	val = ath11k_hif_read32(ab, reo_base + HAL_REO1_GEN_ENABLE);  in ath11k_hw_ipq5018_reo_setup()
820 	ath11k_hif_write32(ab, reo_base + HAL_REO1_GEN_ENABLE, val);  in ath11k_hw_ipq5018_reo_setup()
822 	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_0(ab),  in ath11k_hw_ipq5018_reo_setup()
824 	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_1(ab),  in ath11k_hw_ipq5018_reo_setup()
826 	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_2(ab),  in ath11k_hw_ipq5018_reo_setup()
828 	ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_3(ab),  in ath11k_hw_ipq5018_reo_setup()
831 	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_0,  in ath11k_hw_ipq5018_reo_setup()
833 	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_1,  in ath11k_hw_ipq5018_reo_setup()
835 	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_2,  in ath11k_hw_ipq5018_reo_setup()
837 	ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_3,  in ath11k_hw_ipq5018_reo_setup()