Lines Matching +full:port +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Intel IXP4xx HSS (synchronous serial port) driver for Linux
5 * Copyright (C) 2007-2008 Krzysztof Hałasa <khc@pm.waw.pl>
13 #include <linux/dma-mapping.h>
43 #define PKT_EXTRA_FLAGS 0 /* orig 1 */
44 #define PKT_NUM_PIPES 1 /* 1, 2 or 4 */
77 #define HSS1_PKT_RXFREE0_QUEUE 1
84 #define NPE_PKT_MODE_RAW 1
90 #define PKT_HDLC_CRC_32 0x2 /* default = CRC-16 */
142 /* 56k data endiannes - which bit unused: high (default) or low */
149 /* Number of packetized clients, default = 1 */
179 * Each clock bit takes 7.5 ns (1 / 133.xx MHz).
180 * The clock sequence consists of (C - B) states of 0s and 1s, each state is
181 * A bits wide. It's followed by (B + 1) states of 0s and 1s, each state is
182 * (A + 1) bits wide.
185 * freq = 66.666 MHz / (A + (B + 1) / (C + 1))
186 * minimum freq = 66.666 MHz / (A + 1)
190 * freq = 66.666 MHz / (2 + (2 + 1) / (7 + 1)) = 28.07 MHz (Mb/s).
192 * The sequence takes (C - B) * A + (B + 1) * (A + 1) = 5 * 2 + 3 * 3 bits
201 #define TDMMAP_HDLC 1 /* HDLC - packetized */
202 #define TDMMAP_VOICE56K 2 /* Voice56K - 7-bit channelized */
203 #define TDMMAP_VOICE64K 3 /* Voice64K - 8-bit channelized */
206 #define HSS_CONFIG_TX_PCR 0x00 /* port configuration registers */
212 #define HSS_CONFIG_TX_LUT 0x18 /* channel look-up tables */
237 /* HDLC packet status values - desc->status */
238 #define ERR_SHUTDOWN 1 /* stop or shutdown occurrence */
241 #define ERR_RXFREE_Q_EMPTY 4 /* RX-free queue became empty while receiving
258 struct port { struct
325 #define rx_desc_phys(port, n) ((port)->desc_tab_phys + \ argument
327 #define rx_desc_ptr(port, n) (&(port)->desc_tab[n]) argument
329 #define tx_desc_phys(port, n) ((port)->desc_tab_phys + \ argument
331 #define tx_desc_ptr(port, n) (&(port)->desc_tab[(n) + RX_DESCS]) argument
345 static inline struct port *dev_to_port(struct net_device *dev) in dev_to_port()
347 return dev_to_hdlc(dev)->priv; in dev_to_port()
364 static void hss_npe_send(struct port *port, struct msg *msg, const char *what) in hss_npe_send() argument
368 if (npe_send_message(port->npe, msg, what)) { in hss_npe_send()
369 pr_crit("HSS-%i: unable to send command [%08X:%08X] to %s\n", in hss_npe_send()
370 port->id, val[0], val[1], npe_name(port->npe)); in hss_npe_send()
375 static void hss_config_set_lut(struct port *port) in hss_config_set_lut() argument
382 msg.hss_port = port->id; in hss_config_set_lut()
390 hss_npe_send(port, &msg, "HSS_SET_TX_LUT"); in hss_config_set_lut()
392 msg.index += HSS_CONFIG_RX_LUT - HSS_CONFIG_TX_LUT; in hss_config_set_lut()
393 hss_npe_send(port, &msg, "HSS_SET_RX_LUT"); in hss_config_set_lut()
398 static void hss_config(struct port *port) in hss_config() argument
404 msg.hss_port = port->id; in hss_config()
408 if (port->clock_type == CLOCK_INT) in hss_config()
410 hss_npe_send(port, &msg, "HSS_SET_TX_PCR"); in hss_config()
414 hss_npe_send(port, &msg, "HSS_SET_RX_PCR"); in hss_config()
418 msg.hss_port = port->id; in hss_config()
420 msg.data32 = (port->loopback ? CCR_LOOPBACK : 0) | in hss_config()
421 (port->id ? CCR_SECOND_HSS : 0); in hss_config()
422 hss_npe_send(port, &msg, "HSS_SET_CORE_CR"); in hss_config()
426 msg.hss_port = port->id; in hss_config()
428 msg.data32 = port->clock_reg; in hss_config()
429 hss_npe_send(port, &msg, "HSS_SET_CLOCK_CR"); in hss_config()
433 msg.hss_port = port->id; in hss_config()
436 msg.data16b = FRAME_SIZE - 1; in hss_config()
437 hss_npe_send(port, &msg, "HSS_SET_TX_FCR"); in hss_config()
441 msg.hss_port = port->id; in hss_config()
444 msg.data16b = FRAME_SIZE - 1; in hss_config()
445 hss_npe_send(port, &msg, "HSS_SET_RX_FCR"); in hss_config()
447 hss_config_set_lut(port); in hss_config()
451 msg.hss_port = port->id; in hss_config()
452 hss_npe_send(port, &msg, "HSS_LOAD_CONFIG"); in hss_config()
454 if (npe_recv_message(port->npe, &msg, "HSS_LOAD_CONFIG") || in hss_config()
455 /* HSS_LOAD_CONFIG for port #1 returns port_id = #4 */ in hss_config()
457 pr_crit("HSS-%i: HSS_LOAD_CONFIG failed\n", port->id); in hss_config()
461 /* HDLC may stop working without this - check FIXME */ in hss_config()
462 npe_recv_message(port->npe, &msg, "FLUSH_IT"); in hss_config()
465 static void hss_set_hdlc_cfg(struct port *port) in hss_set_hdlc_cfg() argument
471 msg.hss_port = port->id; in hss_set_hdlc_cfg()
472 msg.data8a = port->hdlc_cfg; /* rx_cfg */ in hss_set_hdlc_cfg()
473 msg.data8b = port->hdlc_cfg | (PKT_EXTRA_FLAGS << 3); /* tx_cfg */ in hss_set_hdlc_cfg()
474 hss_npe_send(port, &msg, "HSS_SET_HDLC_CFG"); in hss_set_hdlc_cfg()
477 static u32 hss_get_status(struct port *port) in hss_get_status() argument
483 msg.hss_port = port->id; in hss_get_status()
484 hss_npe_send(port, &msg, "PORT_ERROR_READ"); in hss_get_status()
485 if (npe_recv_message(port->npe, &msg, "PORT_ERROR_READ")) { in hss_get_status()
486 pr_crit("HSS-%i: unable to read HSS status\n", port->id); in hss_get_status()
493 static void hss_start_hdlc(struct port *port) in hss_start_hdlc() argument
499 msg.hss_port = port->id; in hss_start_hdlc()
501 hss_npe_send(port, &msg, "HSS_ENABLE_PKT_PIPE"); in hss_start_hdlc()
504 static void hss_stop_hdlc(struct port *port) in hss_stop_hdlc() argument
510 msg.hss_port = port->id; in hss_stop_hdlc()
511 hss_npe_send(port, &msg, "HSS_DISABLE_PKT_PIPE"); in hss_stop_hdlc()
512 hss_get_status(port); /* make sure it's halted */ in hss_stop_hdlc()
515 static int hss_load_firmware(struct port *port) in hss_load_firmware() argument
520 if (port->initialized) in hss_load_firmware()
523 if (!npe_running(port->npe)) { in hss_load_firmware()
524 err = npe_load_firmware(port->npe, npe_name(port->npe), in hss_load_firmware()
525 port->dev); in hss_load_firmware()
533 msg.hss_port = port->id; in hss_load_firmware()
535 hss_npe_send(port, &msg, "HSS_SET_PKT_PIPES"); in hss_load_firmware()
539 hss_npe_send(port, &msg, "HSS_SET_PKT_FIFO"); in hss_load_firmware()
545 hss_npe_send(port, &msg, "HSS_SET_PKT_MODE"); in hss_load_firmware()
549 hss_npe_send(port, &msg, "HSS_SET_PKT_RX_SIZE"); in hss_load_firmware()
553 hss_npe_send(port, &msg, "HSS_SET_PKT_IDLE"); in hss_load_firmware()
555 port->initialized = 1; in hss_load_firmware()
569 printk(KERN_DEBUG "%s: %s(%i)", dev->name, func, len); in debug_pkt()
583 phys, desc->next, desc->buf_len, desc->pkt_len, in debug_desc()
584 desc->data, desc->status, desc->error_count); in debug_desc()
588 static inline int queue_get_desc(unsigned int queue, struct port *port, in queue_get_desc() argument
596 return -1; in queue_get_desc()
599 tab_phys = is_tx ? tx_desc_phys(port, 0) : rx_desc_phys(port, 0); in queue_get_desc()
600 tab = is_tx ? tx_desc_ptr(port, 0) : rx_desc_ptr(port, 0); in queue_get_desc()
601 n_desc = (phys - tab_phys) / sizeof(struct desc); in queue_get_desc()
619 static inline void dma_unmap_tx(struct port *port, struct desc *desc) in dma_unmap_tx() argument
622 dma_unmap_single(&port->netdev->dev, desc->data, in dma_unmap_tx()
623 desc->buf_len, DMA_TO_DEVICE); in dma_unmap_tx()
625 dma_unmap_single(&port->netdev->dev, desc->data & ~3, in dma_unmap_tx()
626 ALIGN((desc->data & 3) + desc->buf_len, 4), in dma_unmap_tx()
634 struct port *port = dev_to_port(netdev); in hss_hdlc_set_carrier() local
638 port->carrier = carrier; in hss_hdlc_set_carrier()
639 if (!port->loopback) { in hss_hdlc_set_carrier()
651 struct port *port = dev_to_port(dev); in hss_hdlc_rx_irq() local
654 printk(KERN_DEBUG "%s: hss_hdlc_rx_irq\n", dev->name); in hss_hdlc_rx_irq()
656 qmgr_disable_irq(port->rxq); in hss_hdlc_rx_irq()
657 napi_schedule(&port->napi); in hss_hdlc_rx_irq()
662 struct port *port = container_of(napi, struct port, napi); in hss_hdlc_poll() local
663 struct net_device *dev = port->netdev; in hss_hdlc_poll()
664 unsigned int rxq = port->rxq; in hss_hdlc_poll()
665 unsigned int rxfreeq = port->rxfreeq; in hss_hdlc_poll()
669 printk(KERN_DEBUG "%s: hss_hdlc_poll\n", dev->name); in hss_hdlc_poll()
681 n = queue_get_desc(rxq, port, 0); in hss_hdlc_poll()
685 " napi_complete\n", dev->name); in hss_hdlc_poll()
694 dev->name); in hss_hdlc_poll()
701 dev->name); in hss_hdlc_poll()
706 desc = rx_desc_ptr(port, n); in hss_hdlc_poll()
707 #if 0 /* FIXME - error_count counts modulo 256, perhaps we should use it */ in hss_hdlc_poll()
708 if (desc->error_count) in hss_hdlc_poll()
710 " errors %u\n", dev->name, desc->status, in hss_hdlc_poll()
711 desc->error_count); in hss_hdlc_poll()
714 switch (desc->status) { in hss_hdlc_poll()
719 phys = dma_map_single(&dev->dev, skb->data, in hss_hdlc_poll()
722 if (dma_mapping_error(&dev->dev, phys)) { in hss_hdlc_poll()
728 skb = netdev_alloc_skb(dev, desc->pkt_len); in hss_hdlc_poll()
731 dev->stats.rx_dropped++; in hss_hdlc_poll()
735 dev->stats.rx_frame_errors++; in hss_hdlc_poll()
736 dev->stats.rx_errors++; in hss_hdlc_poll()
739 dev->stats.rx_crc_errors++; in hss_hdlc_poll()
740 dev->stats.rx_errors++; in hss_hdlc_poll()
743 dev->stats.rx_length_errors++; in hss_hdlc_poll()
744 dev->stats.rx_errors++; in hss_hdlc_poll()
746 default: /* FIXME - remove printk */ in hss_hdlc_poll()
748 desc->status, desc->error_count); in hss_hdlc_poll()
749 dev->stats.rx_errors++; in hss_hdlc_poll()
753 /* put the desc back on RX-ready queue */ in hss_hdlc_poll()
754 desc->buf_len = RX_SIZE; in hss_hdlc_poll()
755 desc->pkt_len = desc->status = 0; in hss_hdlc_poll()
756 queue_put_desc(rxfreeq, rx_desc_phys(port, n), desc); in hss_hdlc_poll()
763 skb = port->rx_buff_tab[n]; in hss_hdlc_poll()
764 dma_unmap_single(&dev->dev, desc->data, in hss_hdlc_poll()
767 dma_sync_single_for_cpu(&dev->dev, desc->data, in hss_hdlc_poll()
769 memcpy_swab32((u32 *)skb->data, (u32 *)port->rx_buff_tab[n], in hss_hdlc_poll()
770 ALIGN(desc->pkt_len, 4) / 4); in hss_hdlc_poll()
772 skb_put(skb, desc->pkt_len); in hss_hdlc_poll()
774 debug_pkt(dev, "hss_hdlc_poll", skb->data, skb->len); in hss_hdlc_poll()
776 skb->protocol = hdlc_type_trans(skb, dev); in hss_hdlc_poll()
777 dev->stats.rx_packets++; in hss_hdlc_poll()
778 dev->stats.rx_bytes += skb->len; in hss_hdlc_poll()
781 /* put the new buffer on RX-free queue */ in hss_hdlc_poll()
783 port->rx_buff_tab[n] = temp; in hss_hdlc_poll()
784 desc->data = phys; in hss_hdlc_poll()
786 desc->buf_len = RX_SIZE; in hss_hdlc_poll()
787 desc->pkt_len = 0; in hss_hdlc_poll()
788 queue_put_desc(rxfreeq, rx_desc_phys(port, n), desc); in hss_hdlc_poll()
800 struct port *port = dev_to_port(dev); in hss_hdlc_txdone_irq() local
806 while ((n_desc = queue_get_desc(port->txdoneq, in hss_hdlc_txdone_irq()
807 port, 1)) >= 0) { in hss_hdlc_txdone_irq()
811 desc = tx_desc_ptr(port, n_desc); in hss_hdlc_txdone_irq()
813 dev->stats.tx_packets++; in hss_hdlc_txdone_irq()
814 dev->stats.tx_bytes += desc->pkt_len; in hss_hdlc_txdone_irq()
816 dma_unmap_tx(port, desc); in hss_hdlc_txdone_irq()
819 dev->name, port->tx_buff_tab[n_desc]); in hss_hdlc_txdone_irq()
821 free_buffer_irq(port->tx_buff_tab[n_desc]); in hss_hdlc_txdone_irq()
822 port->tx_buff_tab[n_desc] = NULL; in hss_hdlc_txdone_irq()
824 start = qmgr_stat_below_low_watermark(port->txreadyq); in hss_hdlc_txdone_irq()
825 queue_put_desc(port->txreadyq, in hss_hdlc_txdone_irq()
826 tx_desc_phys(port, n_desc), desc); in hss_hdlc_txdone_irq()
827 if (start) { /* TX-ready queue was empty */ in hss_hdlc_txdone_irq()
830 " ready\n", dev->name); in hss_hdlc_txdone_irq()
839 struct port *port = dev_to_port(dev); in hss_hdlc_xmit() local
840 unsigned int txreadyq = port->txreadyq; in hss_hdlc_xmit()
847 printk(KERN_DEBUG "%s: hss_hdlc_xmit\n", dev->name); in hss_hdlc_xmit()
850 if (unlikely(skb->len > HDLC_MAX_MRU)) { in hss_hdlc_xmit()
852 dev->stats.tx_errors++; in hss_hdlc_xmit()
856 debug_pkt(dev, "hss_hdlc_xmit", skb->data, skb->len); in hss_hdlc_xmit()
858 len = skb->len; in hss_hdlc_xmit()
862 mem = skb->data; in hss_hdlc_xmit()
864 offset = (int)skb->data & 3; /* keep 32-bit alignment */ in hss_hdlc_xmit()
869 dev->stats.tx_dropped++; in hss_hdlc_xmit()
872 memcpy_swab32(mem, (u32 *)((uintptr_t)skb->data & ~3), bytes / 4); in hss_hdlc_xmit()
876 phys = dma_map_single(&dev->dev, mem, bytes, DMA_TO_DEVICE); in hss_hdlc_xmit()
877 if (dma_mapping_error(&dev->dev, phys)) { in hss_hdlc_xmit()
883 dev->stats.tx_dropped++; in hss_hdlc_xmit()
887 n = queue_get_desc(txreadyq, port, 1); in hss_hdlc_xmit()
889 desc = tx_desc_ptr(port, n); in hss_hdlc_xmit()
892 port->tx_buff_tab[n] = skb; in hss_hdlc_xmit()
894 port->tx_buff_tab[n] = mem; in hss_hdlc_xmit()
896 desc->data = phys + offset; in hss_hdlc_xmit()
897 desc->buf_len = desc->pkt_len = len; in hss_hdlc_xmit()
900 queue_put_desc(port->txq, tx_desc_phys(port, n), desc); in hss_hdlc_xmit()
904 printk(KERN_DEBUG "%s: hss_hdlc_xmit queue full\n", dev->name); in hss_hdlc_xmit()
911 dev->name); in hss_hdlc_xmit()
918 printk(KERN_DEBUG "%s: hss_hdlc_xmit end\n", dev->name); in hss_hdlc_xmit()
923 static int request_hdlc_queues(struct port *port) in request_hdlc_queues() argument
927 err = qmgr_request_queue(port->rxfreeq, RX_DESCS, 0, 0, in request_hdlc_queues()
928 "%s:RX-free", port->netdev->name); in request_hdlc_queues()
932 err = qmgr_request_queue(port->rxq, RX_DESCS, 0, 0, in request_hdlc_queues()
933 "%s:RX", port->netdev->name); in request_hdlc_queues()
937 err = qmgr_request_queue(port->txq, TX_DESCS, 0, 0, in request_hdlc_queues()
938 "%s:TX", port->netdev->name); in request_hdlc_queues()
942 err = qmgr_request_queue(port->txreadyq, TX_DESCS, 0, 0, in request_hdlc_queues()
943 "%s:TX-ready", port->netdev->name); in request_hdlc_queues()
947 err = qmgr_request_queue(port->txdoneq, TX_DESCS, 0, 0, in request_hdlc_queues()
948 "%s:TX-done", port->netdev->name); in request_hdlc_queues()
954 qmgr_release_queue(port->txreadyq); in request_hdlc_queues()
956 qmgr_release_queue(port->txq); in request_hdlc_queues()
958 qmgr_release_queue(port->rxq); in request_hdlc_queues()
960 qmgr_release_queue(port->rxfreeq); in request_hdlc_queues()
962 port->netdev->name); in request_hdlc_queues()
966 static void release_hdlc_queues(struct port *port) in release_hdlc_queues() argument
968 qmgr_release_queue(port->rxfreeq); in release_hdlc_queues()
969 qmgr_release_queue(port->rxq); in release_hdlc_queues()
970 qmgr_release_queue(port->txdoneq); in release_hdlc_queues()
971 qmgr_release_queue(port->txq); in release_hdlc_queues()
972 qmgr_release_queue(port->txreadyq); in release_hdlc_queues()
975 static int init_hdlc_queues(struct port *port) in init_hdlc_queues() argument
980 dma_pool = dma_pool_create(DRV_NAME, &port->netdev->dev, in init_hdlc_queues()
983 return -ENOMEM; in init_hdlc_queues()
986 port->desc_tab = dma_pool_zalloc(dma_pool, GFP_KERNEL, in init_hdlc_queues()
987 &port->desc_tab_phys); in init_hdlc_queues()
988 if (!port->desc_tab) in init_hdlc_queues()
989 return -ENOMEM; in init_hdlc_queues()
990 memset(port->rx_buff_tab, 0, sizeof(port->rx_buff_tab)); /* tables */ in init_hdlc_queues()
991 memset(port->tx_buff_tab, 0, sizeof(port->tx_buff_tab)); in init_hdlc_queues()
995 struct desc *desc = rx_desc_ptr(port, i); in init_hdlc_queues()
999 buff = netdev_alloc_skb(port->netdev, RX_SIZE); in init_hdlc_queues()
1001 return -ENOMEM; in init_hdlc_queues()
1002 data = buff->data; in init_hdlc_queues()
1006 return -ENOMEM; in init_hdlc_queues()
1009 desc->buf_len = RX_SIZE; in init_hdlc_queues()
1010 desc->data = dma_map_single(&port->netdev->dev, data, in init_hdlc_queues()
1012 if (dma_mapping_error(&port->netdev->dev, desc->data)) { in init_hdlc_queues()
1014 return -EIO; in init_hdlc_queues()
1016 port->rx_buff_tab[i] = buff; in init_hdlc_queues()
1022 static void destroy_hdlc_queues(struct port *port) in destroy_hdlc_queues() argument
1026 if (port->desc_tab) { in destroy_hdlc_queues()
1028 struct desc *desc = rx_desc_ptr(port, i); in destroy_hdlc_queues()
1029 buffer_t *buff = port->rx_buff_tab[i]; in destroy_hdlc_queues()
1032 dma_unmap_single(&port->netdev->dev, in destroy_hdlc_queues()
1033 desc->data, RX_SIZE, in destroy_hdlc_queues()
1039 struct desc *desc = tx_desc_ptr(port, i); in destroy_hdlc_queues()
1040 buffer_t *buff = port->tx_buff_tab[i]; in destroy_hdlc_queues()
1043 dma_unmap_tx(port, desc); in destroy_hdlc_queues()
1047 dma_pool_free(dma_pool, port->desc_tab, port->desc_tab_phys); in destroy_hdlc_queues()
1048 port->desc_tab = NULL; in destroy_hdlc_queues()
1060 struct port *port = dev_to_port(dev); in hss_hdlc_dcd_irq() local
1063 val = gpiod_get_value(port->dcd); in hss_hdlc_dcd_irq()
1071 struct port *port = dev_to_port(dev); in hss_hdlc_open() local
1080 err = hss_load_firmware(port); in hss_hdlc_open()
1084 err = request_hdlc_queues(port); in hss_hdlc_open()
1088 err = init_hdlc_queues(port); in hss_hdlc_open()
1095 * 1 if DCD is asserted. in hss_hdlc_open()
1097 val = gpiod_get_value(port->dcd); in hss_hdlc_open()
1101 err = request_irq(gpiod_to_irq(port->dcd), hss_hdlc_dcd_irq, 0, "IXP4xx HSS", dev); in hss_hdlc_open()
1103 dev_err(&dev->dev, "ixp4xx_hss: failed to request DCD IRQ (%i)\n", err); in hss_hdlc_open()
1108 gpiod_set_value(port->dtr, 1); in hss_hdlc_open()
1109 gpiod_set_value(port->rts, 1); in hss_hdlc_open()
1115 queue_put_desc(port->txreadyq, in hss_hdlc_open()
1116 tx_desc_phys(port, i), tx_desc_ptr(port, i)); in hss_hdlc_open()
1119 queue_put_desc(port->rxfreeq, in hss_hdlc_open()
1120 rx_desc_phys(port, i), rx_desc_ptr(port, i)); in hss_hdlc_open()
1122 napi_enable(&port->napi); in hss_hdlc_open()
1125 qmgr_set_irq(port->rxq, QUEUE_IRQ_SRC_NOT_EMPTY, in hss_hdlc_open()
1128 qmgr_set_irq(port->txdoneq, QUEUE_IRQ_SRC_NOT_EMPTY, in hss_hdlc_open()
1130 qmgr_enable_irq(port->txdoneq); in hss_hdlc_open()
1134 hss_set_hdlc_cfg(port); in hss_hdlc_open()
1135 hss_config(port); in hss_hdlc_open()
1137 hss_start_hdlc(port); in hss_hdlc_open()
1140 napi_schedule(&port->napi); in hss_hdlc_open()
1146 destroy_hdlc_queues(port); in hss_hdlc_open()
1147 release_hdlc_queues(port); in hss_hdlc_open()
1155 struct port *port = dev_to_port(dev); in hss_hdlc_close() local
1160 ports_open--; in hss_hdlc_close()
1161 qmgr_disable_irq(port->rxq); in hss_hdlc_close()
1163 napi_disable(&port->napi); in hss_hdlc_close()
1165 hss_stop_hdlc(port); in hss_hdlc_close()
1167 while (queue_get_desc(port->rxfreeq, port, 0) >= 0) in hss_hdlc_close()
1168 buffs--; in hss_hdlc_close()
1169 while (queue_get_desc(port->rxq, port, 0) >= 0) in hss_hdlc_close()
1170 buffs--; in hss_hdlc_close()
1177 while (queue_get_desc(port->txq, port, 1) >= 0) in hss_hdlc_close()
1178 buffs--; /* cancel TX */ in hss_hdlc_close()
1182 while (queue_get_desc(port->txreadyq, port, 1) >= 0) in hss_hdlc_close()
1183 buffs--; in hss_hdlc_close()
1195 qmgr_disable_irq(port->txdoneq); in hss_hdlc_close()
1197 free_irq(gpiod_to_irq(port->dcd), dev); in hss_hdlc_close()
1198 /* GPIOs are flagged active low so this de-asserts DTR and RTS */ in hss_hdlc_close()
1199 gpiod_set_value(port->dtr, 0); in hss_hdlc_close()
1200 gpiod_set_value(port->rts, 0); in hss_hdlc_close()
1203 destroy_hdlc_queues(port); in hss_hdlc_close()
1204 release_hdlc_queues(port); in hss_hdlc_close()
1212 struct port *port = dev_to_port(dev); in hss_hdlc_attach() local
1215 return -EINVAL; in hss_hdlc_attach()
1219 port->hdlc_cfg = 0; in hss_hdlc_attach()
1223 port->hdlc_cfg = PKT_HDLC_CRC_32; in hss_hdlc_attach()
1227 return -EINVAL; in hss_hdlc_attach()
1234 /* a is 10-bit, b is 10-bit, c is 12-bit */ in check_clock()
1238 new_rate = timer_freq * (u64)(c + 1); in check_clock()
1239 do_div(new_rate, a * (c + 1) + b + 1); in check_clock()
1240 new_diff = abs((u32)new_rate - rate); in check_clock()
1256 if (a > 0x3FF) { /* 10-bit value - we can go as slow as ca. 65 kb/s */ in find_best_clock()
1257 check_clock(timer_freq, rate, 0x3FF, 1, 1, best, &diff, reg); in find_best_clock()
1261 a = 1; /* minimum divider is 1 (a = 0, b = 1, c = 1) */ in find_best_clock()
1266 check_clock(timer_freq, rate, a - 1, 1, 1, best, &diff, reg); in find_best_clock()
1271 u64 c = (b + 1) * (u64)rate; in find_best_clock()
1273 do_div(c, timer_freq - rate * a); in find_best_clock()
1274 c--; in find_best_clock()
1275 if (c >= 0xFFF) { /* 12-bit - no need to check more 'b's */ in find_best_clock()
1277 !check_clock(timer_freq, rate, a - 1, 1, 1, best, in find_best_clock()
1286 if (!check_clock(timer_freq, rate, a, b, c + 1, best, &diff, in find_best_clock()
1292 static int hss_hdlc_set_clock(struct port *port, unsigned int clock_type) in hss_hdlc_set_clock() argument
1297 gpiod_set_value(port->clk_internal, 0); in hss_hdlc_set_clock()
1300 gpiod_set_value(port->clk_internal, 1); in hss_hdlc_set_clock()
1303 return -EINVAL; in hss_hdlc_set_clock()
1311 sync_serial_settings __user *line = ifs->ifs_ifsu.sync; in hss_hdlc_ioctl()
1312 struct port *port = dev_to_port(dev); in hss_hdlc_ioctl() local
1316 switch (ifs->type) { in hss_hdlc_ioctl()
1318 ifs->type = IF_IFACE_V35; in hss_hdlc_ioctl()
1319 if (ifs->size < size) { in hss_hdlc_ioctl()
1320 ifs->size = size; /* data size wanted */ in hss_hdlc_ioctl()
1321 return -ENOBUFS; in hss_hdlc_ioctl()
1324 new_line.clock_type = port->clock_type; in hss_hdlc_ioctl()
1325 new_line.clock_rate = port->clock_rate; in hss_hdlc_ioctl()
1326 new_line.loopback = port->loopback; in hss_hdlc_ioctl()
1328 return -EFAULT; in hss_hdlc_ioctl()
1334 return -EPERM; in hss_hdlc_ioctl()
1336 return -EFAULT; in hss_hdlc_ioctl()
1339 hss_hdlc_set_clock(port, clk); in hss_hdlc_ioctl()
1342 return -EINVAL; /* No such clock setting */ in hss_hdlc_ioctl()
1344 if (new_line.loopback != 0 && new_line.loopback != 1) in hss_hdlc_ioctl()
1345 return -EINVAL; in hss_hdlc_ioctl()
1347 port->clock_type = clk; /* Update settings */ in hss_hdlc_ioctl()
1351 &port->clock_rate, &port->clock_reg); in hss_hdlc_ioctl()
1353 port->clock_rate = 0; in hss_hdlc_ioctl()
1354 port->clock_reg = CLK42X_SPEED_2048KHZ; in hss_hdlc_ioctl()
1356 port->loopback = new_line.loopback; in hss_hdlc_ioctl()
1360 if (dev->flags & IFF_UP) in hss_hdlc_ioctl()
1361 hss_config(port); in hss_hdlc_ioctl()
1363 if (port->loopback || port->carrier) in hss_hdlc_ioctl()
1364 netif_carrier_on(port->netdev); in hss_hdlc_ioctl()
1366 netif_carrier_off(port->netdev); in hss_hdlc_ioctl()
1391 struct device *dev = &pdev->dev; in ixp4xx_hss_probe()
1395 struct port *port; in ixp4xx_hss_probe() local
1414 return -ENODEV; in ixp4xx_hss_probe()
1417 np = dev->of_node; in ixp4xx_hss_probe()
1419 port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL); in ixp4xx_hss_probe()
1420 if (!port) in ixp4xx_hss_probe()
1421 return -ENOMEM; in ixp4xx_hss_probe()
1423 err = of_parse_phandle_with_fixed_args(np, "intel,npe-handle", 1, 0, in ixp4xx_hss_probe()
1428 port->npe = npe_request(npe_spec.args[0] << 4); in ixp4xx_hss_probe()
1429 if (!port->npe) { in ixp4xx_hss_probe()
1431 return -ENODEV; in ixp4xx_hss_probe()
1435 err = of_parse_phandle_with_fixed_args(np, "intek,queue-chl-txready", 1, 0, in ixp4xx_hss_probe()
1439 port->txreadyq = queue_spec.args[0]; in ixp4xx_hss_probe()
1441 err = of_parse_phandle_with_fixed_args(np, "intek,queue-chl-rxtrig", 1, 0, in ixp4xx_hss_probe()
1445 port->rxtrigq = queue_spec.args[0]; in ixp4xx_hss_probe()
1447 err = of_parse_phandle_with_fixed_args(np, "intek,queue-pkt-rx", 1, 0, in ixp4xx_hss_probe()
1451 port->rxq = queue_spec.args[0]; in ixp4xx_hss_probe()
1453 err = of_parse_phandle_with_fixed_args(np, "intek,queue-pkt-tx", 1, 0, in ixp4xx_hss_probe()
1457 port->txq = queue_spec.args[0]; in ixp4xx_hss_probe()
1459 err = of_parse_phandle_with_fixed_args(np, "intek,queue-pkt-rxfree", 1, 0, in ixp4xx_hss_probe()
1463 port->rxfreeq = queue_spec.args[0]; in ixp4xx_hss_probe()
1465 err = of_parse_phandle_with_fixed_args(np, "intek,queue-pkt-txdone", 1, 0, in ixp4xx_hss_probe()
1469 port->txdoneq = queue_spec.args[0]; in ixp4xx_hss_probe()
1472 port->cts = devm_gpiod_get(dev, "cts", GPIOD_OUT_LOW); in ixp4xx_hss_probe()
1473 if (IS_ERR(port->cts)) in ixp4xx_hss_probe()
1474 return dev_err_probe(dev, PTR_ERR(port->cts), "unable to get CTS GPIO\n"); in ixp4xx_hss_probe()
1475 port->rts = devm_gpiod_get(dev, "rts", GPIOD_OUT_LOW); in ixp4xx_hss_probe()
1476 if (IS_ERR(port->rts)) in ixp4xx_hss_probe()
1477 return dev_err_probe(dev, PTR_ERR(port->rts), "unable to get RTS GPIO\n"); in ixp4xx_hss_probe()
1478 port->dcd = devm_gpiod_get(dev, "dcd", GPIOD_IN); in ixp4xx_hss_probe()
1479 if (IS_ERR(port->dcd)) in ixp4xx_hss_probe()
1480 return dev_err_probe(dev, PTR_ERR(port->dcd), "unable to get DCD GPIO\n"); in ixp4xx_hss_probe()
1481 port->dtr = devm_gpiod_get(dev, "dtr", GPIOD_OUT_LOW); in ixp4xx_hss_probe()
1482 if (IS_ERR(port->dtr)) in ixp4xx_hss_probe()
1483 return dev_err_probe(dev, PTR_ERR(port->dtr), "unable to get DTR GPIO\n"); in ixp4xx_hss_probe()
1484 port->clk_internal = devm_gpiod_get(dev, "clk-internal", GPIOD_OUT_LOW); in ixp4xx_hss_probe()
1485 if (IS_ERR(port->clk_internal)) in ixp4xx_hss_probe()
1486 return dev_err_probe(dev, PTR_ERR(port->clk_internal), in ixp4xx_hss_probe()
1489 ndev = alloc_hdlcdev(port); in ixp4xx_hss_probe()
1490 port->netdev = alloc_hdlcdev(port); in ixp4xx_hss_probe()
1491 if (!port->netdev) { in ixp4xx_hss_probe()
1492 err = -ENOMEM; in ixp4xx_hss_probe()
1496 SET_NETDEV_DEV(ndev, &pdev->dev); in ixp4xx_hss_probe()
1498 hdlc->attach = hss_hdlc_attach; in ixp4xx_hss_probe()
1499 hdlc->xmit = hss_hdlc_xmit; in ixp4xx_hss_probe()
1500 ndev->netdev_ops = &hss_hdlc_ops; in ixp4xx_hss_probe()
1501 ndev->tx_queue_len = 100; in ixp4xx_hss_probe()
1502 port->clock_type = CLOCK_EXT; in ixp4xx_hss_probe()
1503 port->clock_rate = 0; in ixp4xx_hss_probe()
1504 port->clock_reg = CLK42X_SPEED_2048KHZ; in ixp4xx_hss_probe()
1505 port->id = pdev->id; in ixp4xx_hss_probe()
1506 port->dev = &pdev->dev; in ixp4xx_hss_probe()
1507 netif_napi_add_weight(ndev, &port->napi, hss_hdlc_poll, NAPI_WEIGHT); in ixp4xx_hss_probe()
1513 platform_set_drvdata(pdev, port); in ixp4xx_hss_probe()
1521 npe_release(port->npe); in ixp4xx_hss_probe()
1527 struct port *port = platform_get_drvdata(pdev); in ixp4xx_hss_remove() local
1529 unregister_hdlc_device(port->netdev); in ixp4xx_hss_remove()
1530 free_netdev(port->netdev); in ixp4xx_hss_remove()
1531 npe_release(port->npe); in ixp4xx_hss_remove()