Lines Matching +full:reset +full:- +full:duration +full:- +full:ms

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4  * Copyright (C) 2007-2008 SMSC
38 /* SCSRs - System Control and Status Registers */
52 #define INT_STS_MAC_RTO_	(0x00040000)	/* MAC Reset Time Out */
76 #define HW_CFG_LEDB_		(0x00000800)	/* Activity LED 80ms Bypass */
83 #define HW_CFG_LRST_		(0x00000008)	/* Soft Lite Reset */
86 #define HW_CFG_SRST_		(0x00000001)	/* Soft Reset */
106 #define PM_CTL_PHY_RST_		(0x00000010)	/* PHY Reset */
128 #define AFC_CFG_BACK_DUR_	(0x000000F0)	/* Back Pressure Duration */
135 /* backpressure duration = ~ 350us */
151 #define E2P_CMD_TIMEOUT_	(0x00000400)	/* Set if no resp within 30ms */
167 #define	STRAP_STATUS_PWR_SEL_		(0x00000020) /* Device self-powered */
168 #define	STRAP_STATUS_AMDIX_EN_		(0x00000010) /* Auto-MDIX Enabled */
169 #define	STRAP_STATUS_PORT_SWAP_		(0x00000008) /* USBD+/USBD- Swapped */
195 #define INT_EP_CTL_MAC_RTO_	(0x00080000)	/* MAC Reset Time Out */
209 /* MAC CSRs - MAC Control and Status Registers */
285 /* Vendor-specific PHY Definitions (via MII access) */
343 #define INT_ENP_MAC_RTO_		((u32)BIT(18))	/* MAC Reset Time Out */