Lines Matching full:rx_ctl
136 u8 rx_ctl = 0x8c; in ax88172_set_multicast() local
139 rx_ctl |= 0x01; in ax88172_set_multicast()
142 rx_ctl |= 0x02; in ax88172_set_multicast()
165 rx_ctl |= 0x10; in ax88172_set_multicast()
168 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); in ax88172_set_multicast()
357 /* Set RX_CTL to default values with 2k buffer, and enable cactus */ in ax88772_reset()
378 u16 rx_ctl; in ax88772_hw_reset() local
448 /* Set RX_CTL to default values with 2k buffer, and enable cactus */ in ax88772_hw_reset()
453 rx_ctl = asix_read_rx_ctl(dev, in_pm); in ax88772_hw_reset()
454 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n", in ax88772_hw_reset()
455 rx_ctl); in ax88772_hw_reset()
457 rx_ctl = asix_read_medium_status(dev, in_pm); in ax88772_hw_reset()
460 rx_ctl); in ax88772_hw_reset()
472 u16 rx_ctl, phy14h, phy15h, phy16h; in ax88772a_hw_reset() local
566 /* Set RX_CTL to default values with 2k buffer, and enable cactus */ in ax88772a_hw_reset()
575 /* Set RX_CTL to default values with 2k buffer, and enable cactus */ in ax88772a_hw_reset()
580 rx_ctl = asix_read_rx_ctl(dev, in_pm); in ax88772a_hw_reset()
581 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n", in ax88772a_hw_reset()
582 rx_ctl); in ax88772a_hw_reset()
584 rx_ctl = asix_read_medium_status(dev, in_pm); in ax88772a_hw_reset()
587 rx_ctl); in ax88772a_hw_reset()