Lines Matching +full:packet +full:- +full:processor
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Driver for Microsemi VSC85xx PHYs - timestamping and PHC support
23 /* Two PHYs share the same 1588 processor and it's to be entirely configured
24 * through the base PHY of this processor.
26 /* phydev->bus->mdio_lock should be locked when using this function */
29 struct vsc8531_private *priv = phydev->priv; in phy_ts_base_write()
31 WARN_ON_ONCE(!mutex_is_locked(&phydev->mdio.bus->mdio_lock)); in phy_ts_base_write()
32 return __mdiobus_write(phydev->mdio.bus, priv->ts_base_addr, regnum, in phy_ts_base_write()
36 /* phydev->bus->mdio_lock should be locked when using this function */
39 struct vsc8531_private *priv = phydev->priv; in phy_ts_base_read()
41 WARN_ON_ONCE(!mutex_is_locked(&phydev->mdio.bus->mdio_lock)); in phy_ts_base_read()
42 return __mdiobus_read(phydev->mdio.bus, priv->ts_base_addr, regnum); in phy_ts_base_read()
59 PROCESSOR, enumerator
65 struct vsc8531_private *priv = phydev->priv; in vsc85xx_ts_read_csr()
66 bool base_port = phydev->mdio.addr == priv->ts_base_addr; in vsc85xx_ts_read_csr()
77 case PROCESSOR: in vsc85xx_ts_read_csr()
109 struct vsc8531_private *priv = phydev->priv; in vsc85xx_ts_write_csr()
110 bool base_port = phydev->mdio.addr == priv->ts_base_addr; in vsc85xx_ts_write_csr()
117 blk == PROCESSOR; in vsc85xx_ts_write_csr()
127 case PROCESSOR: in vsc85xx_ts_write_csr()
163 #define PTP_HEADER_BYTE_8_31(x) (31 - (x))
164 #define MAC_ADDRESS_BYTE(x) ((x) + (35 - ETH_ALEN + 1))
172 for (i = 1; i >= 0; i--) in vsc85xx_ts_fsb_init()
182 for (i = ETH_ALEN - 1; i >= 0; i--) in vsc85xx_ts_fsb_init()
192 for (pos = i * 5 + 4; pos >= i * 5; pos--) in vsc85xx_ts_fsb_init()
251 if (!phydev->link) in vsc85xx_ts_set_latencies()
254 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_EGR_STALL_LATENCY, in vsc85xx_ts_set_latencies()
255 STALL_EGR_LATENCY(phydev->speed)); in vsc85xx_ts_set_latencies()
257 switch (phydev->speed) { in vsc85xx_ts_set_latencies()
274 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_INGR_LOCAL_LATENCY, in vsc85xx_ts_set_latencies()
277 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in vsc85xx_ts_set_latencies()
280 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_INGR_TSP_CTRL, in vsc85xx_ts_set_latencies()
283 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_EGR_LOCAL_LATENCY, in vsc85xx_ts_set_latencies()
286 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, MSCC_PHY_PTP_EGR_TSP_CTRL); in vsc85xx_ts_set_latencies()
288 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_EGR_TSP_CTRL, val); in vsc85xx_ts_set_latencies()
365 if (iphdr->version != 4 || iphdr->protocol != IPPROTO_UDP) in get_ptp_header_l4()
377 if (ethhdr->h_proto == htons(ETH_P_1588)) in get_ptp_header_tx()
381 if (ethhdr->h_proto != htons(ETH_P_IP)) in get_ptp_header_tx()
397 return (struct vsc85xx_ptphdr *)skb->data; in get_ptp_header_rx()
399 iphdr = (struct iphdr *)skb->data; in get_ptp_header_rx()
400 udphdr = (struct udphdr *)(skb->data + iphdr->ihl * 4); in get_ptp_header_rx()
412 return -EOPNOTSUPP; in get_sig()
414 sig[0] = (__force u16)ptphdr->seq_id >> 8; in get_sig()
415 sig[1] = (__force u16)ptphdr->seq_id & GENMASK(7, 0); in get_sig()
416 sig[2] = ptphdr->domain; in get_sig()
417 sig[3] = ptphdr->tsmt & GENMASK(3, 0); in get_sig()
419 memcpy(&sig[4], ethhdr->h_dest, ETH_ALEN); in get_sig()
423 sig[i] = ptphdr->tsmt & GENMASK(3, 0); in get_sig()
440 reg = vsc85xx_ts_read_csr(ptp->phydev, PROCESSOR, in vsc85xx_dequeue_skb()
450 reg = vsc85xx_ts_read_csr(ptp->phydev, PROCESSOR, in vsc85xx_dequeue_skb()
458 len = skb_queue_len(&ptp->tx_queue); in vsc85xx_dequeue_skb()
462 while (len--) { in vsc85xx_dequeue_skb()
463 skb = __skb_dequeue(&ptp->tx_queue); in vsc85xx_dequeue_skb()
467 /* Can't get the signature of the packet, won't ever in vsc85xx_dequeue_skb()
468 * be able to have one so let's dequeue the packet. in vsc85xx_dequeue_skb()
485 * packet in the FIFO right now, reschedule it for later in vsc85xx_dequeue_skb()
488 __skb_queue_tail(&ptp->tx_queue, skb); in vsc85xx_dequeue_skb()
500 reg = vsc85xx_ts_read_csr(ptp->phydev, PROCESSOR, in vsc85xx_get_tx_ts()
507 struct vsc8531_private *vsc8531 = phydev->priv; in vsc85xx_ptp_cmp_init()
508 bool base = phydev->mdio.addr == vsc8531->ts_base_addr; in vsc85xx_ptp_cmp_init()
541 struct vsc8531_private *vsc8531 = phydev->priv; in vsc85xx_eth_cmp1_init()
542 bool base = phydev->mdio.addr == vsc8531->ts_base_addr; in vsc85xx_eth_cmp1_init()
573 struct vsc8531_private *vsc8531 = phydev->priv; in vsc85xx_ip_cmp1_init()
574 bool base = phydev->mdio.addr == vsc8531->ts_base_addr; in vsc85xx_ip_cmp1_init()
613 struct phy_device *phydev = ptp->phydev; in vsc85xx_adjfine()
614 struct vsc8531_private *priv = phydev->priv; in vsc85xx_adjfine()
628 mutex_lock(&priv->phc_lock); in vsc85xx_adjfine()
631 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_AUTO_ADJ, in vsc85xx_adjfine()
635 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_CTRL); in vsc85xx_adjfine()
637 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_CTRL, val); in vsc85xx_adjfine()
639 mutex_unlock(&priv->phc_lock); in vsc85xx_adjfine()
647 struct phy_device *phydev = ptp->phydev; in __vsc85xx_gettime()
649 (struct vsc85xx_shared_private *)phydev->shared->priv; in __vsc85xx_gettime()
650 struct vsc8531_private *priv = phydev->priv; in __vsc85xx_gettime()
653 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_CTRL); in __vsc85xx_gettime()
655 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_CTRL, val); in __vsc85xx_gettime()
660 mutex_lock(&shared->gpio_lock); in __vsc85xx_gettime()
661 gpiod_set_value(priv->load_save, 1); in __vsc85xx_gettime()
663 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc85xx_gettime()
666 ts->tv_sec = ((time64_t)val) << 32; in __vsc85xx_gettime()
668 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc85xx_gettime()
670 ts->tv_sec += val; in __vsc85xx_gettime()
672 ts->tv_nsec = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc85xx_gettime()
675 gpiod_set_value(priv->load_save, 0); in __vsc85xx_gettime()
676 mutex_unlock(&shared->gpio_lock); in __vsc85xx_gettime()
684 struct phy_device *phydev = ptp->phydev; in vsc85xx_gettime()
685 struct vsc8531_private *priv = phydev->priv; in vsc85xx_gettime()
687 mutex_lock(&priv->phc_lock); in vsc85xx_gettime()
689 mutex_unlock(&priv->phc_lock); in vsc85xx_gettime()
698 struct phy_device *phydev = ptp->phydev; in __vsc85xx_settime()
700 (struct vsc85xx_shared_private *)phydev->shared->priv; in __vsc85xx_settime()
701 struct vsc8531_private *priv = phydev->priv; in __vsc85xx_settime()
704 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_LOAD_SEC_MSB, in __vsc85xx_settime()
705 PTP_LTC_LOAD_SEC_MSB(ts->tv_sec)); in __vsc85xx_settime()
706 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_LOAD_SEC_LSB, in __vsc85xx_settime()
707 PTP_LTC_LOAD_SEC_LSB(ts->tv_sec)); in __vsc85xx_settime()
708 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_LOAD_NS, in __vsc85xx_settime()
709 PTP_LTC_LOAD_NS(ts->tv_nsec)); in __vsc85xx_settime()
711 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_CTRL); in __vsc85xx_settime()
713 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_CTRL, val); in __vsc85xx_settime()
718 mutex_lock(&shared->gpio_lock); in __vsc85xx_settime()
719 gpiod_set_value(priv->load_save, 1); in __vsc85xx_settime()
722 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_CTRL, val); in __vsc85xx_settime()
724 gpiod_set_value(priv->load_save, 0); in __vsc85xx_settime()
725 mutex_unlock(&shared->gpio_lock); in __vsc85xx_settime()
734 struct phy_device *phydev = ptp->phydev; in vsc85xx_settime()
735 struct vsc8531_private *priv = phydev->priv; in vsc85xx_settime()
737 mutex_lock(&priv->phc_lock); in vsc85xx_settime()
739 mutex_unlock(&priv->phc_lock); in vsc85xx_settime()
747 struct phy_device *phydev = ptp->phydev; in vsc85xx_adjtime()
748 struct vsc8531_private *priv = phydev->priv; in vsc85xx_adjtime()
756 mutex_lock(&priv->phc_lock); in vsc85xx_adjtime()
763 mutex_unlock(&priv->phc_lock); in vsc85xx_adjtime()
768 mutex_lock(&priv->phc_lock); in vsc85xx_adjtime()
773 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_OFFSET, val); in vsc85xx_adjtime()
775 mutex_unlock(&priv->phc_lock); in vsc85xx_adjtime()
812 /* Check non-zero reserved field */ in vsc85xx_ts_ptp_action_flow()
884 struct vsc8531_private *vsc8531 = phydev->priv; in vsc85xx_eth1_conf()
887 if (vsc8531->ptp->rx_filter == HWTSTAMP_FILTER_PTP_V2_L2_EVENT) { in vsc85xx_eth1_conf()
943 /* UDP checksum offset in IPv4 packet in vsc85xx_ip1_conf()
962 struct vsc8531_private *vsc8531 = phydev->priv; in vsc85xx_ts_engine_init()
963 bool ptp_l4, base = phydev->mdio.addr == vsc8531->ts_base_addr; in vsc85xx_ts_engine_init()
967 ptp_l4 = vsc8531->ptp->rx_filter == HWTSTAMP_FILTER_PTP_V2_L4_EVENT; in vsc85xx_ts_engine_init()
969 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in vsc85xx_ts_engine_init()
974 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_ANALYZER_MODE, in vsc85xx_ts_engine_init()
977 if (vsc8531->ptp->rx_filter == HWTSTAMP_FILTER_PTP_V2_L2_EVENT) { in vsc85xx_ts_engine_init()
997 vsc8531->ptp->rx_filter != HWTSTAMP_FILTER_NONE); in vsc85xx_ts_engine_init()
999 ptp_l4 && vsc8531->ptp->rx_filter != HWTSTAMP_FILTER_NONE); in vsc85xx_ts_engine_init()
1001 vsc8531->ptp->rx_filter != HWTSTAMP_FILTER_NONE); in vsc85xx_ts_engine_init()
1004 vsc8531->ptp->tx_type != HWTSTAMP_TX_OFF); in vsc85xx_ts_engine_init()
1006 ptp_l4 && vsc8531->ptp->tx_type != HWTSTAMP_TX_OFF); in vsc85xx_ts_engine_init()
1008 vsc8531->ptp->tx_type != HWTSTAMP_TX_OFF); in vsc85xx_ts_engine_init()
1011 if (vsc8531->ptp->tx_type != HWTSTAMP_TX_OFF) in vsc85xx_ts_engine_init()
1015 if (vsc8531->ptp->rx_filter != HWTSTAMP_FILTER_NONE) in vsc85xx_ts_engine_init()
1018 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_ANALYZER_MODE, in vsc85xx_ts_engine_init()
1026 struct vsc8531_private *priv = phydev->priv; in vsc85xx_link_change_notify()
1028 mutex_lock(&priv->ts_lock); in vsc85xx_link_change_notify()
1030 mutex_unlock(&priv->ts_lock); in vsc85xx_link_change_notify()
1037 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in vsc85xx_ts_reset_fifo()
1040 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_EGR_TS_FIFO_CTRL, in vsc85xx_ts_reset_fifo()
1044 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_EGR_TS_FIFO_CTRL, in vsc85xx_ts_reset_fifo()
1054 struct phy_device *phydev = vsc8531->ptp->phydev; in vsc85xx_hwtstamp()
1058 switch (cfg->tx_type) { in vsc85xx_hwtstamp()
1067 return -ERANGE; in vsc85xx_hwtstamp()
1070 vsc8531->ptp->tx_type = cfg->tx_type; in vsc85xx_hwtstamp()
1072 switch (cfg->rx_filter) { in vsc85xx_hwtstamp()
1076 /* ETH->IP->UDP->PTP */ in vsc85xx_hwtstamp()
1079 /* ETH->PTP */ in vsc85xx_hwtstamp()
1082 return -ERANGE; in vsc85xx_hwtstamp()
1085 vsc8531->ptp->rx_filter = cfg->rx_filter; in vsc85xx_hwtstamp()
1087 mutex_lock(&vsc8531->ts_lock); in vsc85xx_hwtstamp()
1089 __skb_queue_purge(&vsc8531->ptp->tx_queue); in vsc85xx_hwtstamp()
1090 __skb_queue_head_init(&vsc8531->ptp->tx_queue); in vsc85xx_hwtstamp()
1093 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in vsc85xx_hwtstamp()
1096 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_INGR_PREDICTOR, in vsc85xx_hwtstamp()
1098 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in vsc85xx_hwtstamp()
1101 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_EGR_PREDICTOR, in vsc85xx_hwtstamp()
1105 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, MSCC_PHY_PTP_IFACE_CTRL); in vsc85xx_hwtstamp()
1107 if (vsc8531->ptp->tx_type == HWTSTAMP_TX_OFF) in vsc85xx_hwtstamp()
1109 if (vsc8531->ptp->rx_filter == HWTSTAMP_FILTER_NONE) in vsc85xx_hwtstamp()
1111 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_IFACE_CTRL, val); in vsc85xx_hwtstamp()
1118 /* Re-enable predictors now */ in vsc85xx_hwtstamp()
1119 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in vsc85xx_hwtstamp()
1122 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_INGR_PREDICTOR, in vsc85xx_hwtstamp()
1124 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in vsc85xx_hwtstamp()
1127 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_EGR_PREDICTOR, in vsc85xx_hwtstamp()
1130 vsc8531->ptp->configured = 1; in vsc85xx_hwtstamp()
1131 mutex_unlock(&vsc8531->ts_lock); in vsc85xx_hwtstamp()
1142 info->phc_index = ptp_clock_index(vsc8531->ptp->ptp_clock); in vsc85xx_ts_info()
1143 info->so_timestamping = in vsc85xx_ts_info()
1147 info->tx_types = in vsc85xx_ts_info()
1151 info->rx_filters = in vsc85xx_ts_info()
1165 if (!vsc8531->ptp->configured) in vsc85xx_txtstamp()
1168 if (vsc8531->ptp->tx_type == HWTSTAMP_TX_OFF) { in vsc85xx_txtstamp()
1173 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; in vsc85xx_txtstamp()
1175 mutex_lock(&vsc8531->ts_lock); in vsc85xx_txtstamp()
1176 __skb_queue_tail(&vsc8531->ptp->tx_queue, skb); in vsc85xx_txtstamp()
1177 mutex_unlock(&vsc8531->ts_lock); in vsc85xx_txtstamp()
1190 if (!vsc8531->ptp->configured) in vsc85xx_rxtstamp()
1193 if (vsc8531->ptp->rx_filter == HWTSTAMP_FILTER_NONE || in vsc85xx_rxtstamp()
1197 vsc85xx_gettime(&vsc8531->ptp->caps, &ts); in vsc85xx_rxtstamp()
1199 ptphdr = get_ptp_header_rx(skb, vsc8531->ptp->rx_filter); in vsc85xx_rxtstamp()
1206 ns = ntohl(ptphdr->rsrvd2); in vsc85xx_rxtstamp()
1210 ts.tv_sec--; in vsc85xx_rxtstamp()
1212 shhwtstamps->hwtstamp = ktime_set(ts.tv_sec, ns); in vsc85xx_rxtstamp()
1235 struct vsc8531_private *vsc8531 = phydev->priv; in vsc8584_base_priv()
1237 if (vsc8531->ts_base_addr != phydev->mdio.addr) { in vsc8584_base_priv()
1240 dev = phydev->mdio.bus->mdio_map[vsc8531->ts_base_addr]; in vsc8584_base_priv()
1243 return phydev->priv; in vsc8584_base_priv()
1253 return vsc8531->input_clk_init; in vsc8584_is_1588_input_clk_configured()
1260 vsc8531->input_clk_init = true; in vsc8584_set_input_clk_configured()
1265 struct vsc8531_private *vsc8531 = phydev->priv; in __vsc8584_init_ptp()
1289 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc8584_init_ptp()
1292 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_INGR_PREDICTOR, in __vsc8584_init_ptp()
1294 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc8584_init_ptp()
1297 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_EGR_PREDICTOR, in __vsc8584_init_ptp()
1301 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_CTRL); in __vsc8584_init_ptp()
1304 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_CTRL, val); in __vsc8584_init_ptp()
1306 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_SEQUENCE); in __vsc8584_init_ptp()
1309 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_SEQUENCE, val); in __vsc8584_init_ptp()
1311 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_SEQ); in __vsc8584_init_ptp()
1316 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_SEQ, val); in __vsc8584_init_ptp()
1318 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_1PPS_WIDTH_ADJ, in __vsc8584_init_ptp()
1321 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_INGR_DELAY_FIFO, in __vsc8584_init_ptp()
1326 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_EGR_DELAY_FIFO, in __vsc8584_init_ptp()
1331 /* Enable n-phase sampler for Viper Rev-B */ in __vsc8584_init_ptp()
1332 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc8584_init_ptp()
1342 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_ACCUR_CFG_STATUS, in __vsc8584_init_ptp()
1345 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc8584_init_ptp()
1348 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_ACCUR_CFG_STATUS, in __vsc8584_init_ptp()
1351 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc8584_init_ptp()
1359 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_ACCUR_CFG_STATUS, in __vsc8584_init_ptp()
1362 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc8584_init_ptp()
1365 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_ACCUR_CFG_STATUS, in __vsc8584_init_ptp()
1368 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc8584_init_ptp()
1371 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_ACCUR_CFG_STATUS, in __vsc8584_init_ptp()
1375 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc8584_init_ptp()
1378 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_TSTAMP_FIFO_SI, in __vsc8584_init_ptp()
1381 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc8584_init_ptp()
1384 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_INGR_REWRITER_CTRL, in __vsc8584_init_ptp()
1386 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc8584_init_ptp()
1389 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_EGR_REWRITER_CTRL, in __vsc8584_init_ptp()
1393 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc8584_init_ptp()
1396 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_INGR_REWRITER_CTRL, in __vsc8584_init_ptp()
1398 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc8584_init_ptp()
1402 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_EGR_REWRITER_CTRL, in __vsc8584_init_ptp()
1408 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc8584_init_ptp()
1411 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_INGR_TSP_CTRL, in __vsc8584_init_ptp()
1414 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, MSCC_PHY_PTP_EGR_TSP_CTRL); in __vsc8584_init_ptp()
1416 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_EGR_TSP_CTRL, val); in __vsc8584_init_ptp()
1418 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc8584_init_ptp()
1421 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_SERIAL_TOD_IFACE, in __vsc8584_init_ptp()
1427 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc8584_init_ptp()
1432 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_EGR_TS_FIFO_CTRL, in __vsc8584_init_ptp()
1440 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_IFACE_CTRL, val); in __vsc8584_init_ptp()
1444 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, MSCC_PHY_PTP_VERSION_CODE); in __vsc8584_init_ptp()
1446 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, MSCC_PHY_PTP_IFACE_CTRL); in __vsc8584_init_ptp()
1448 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_IFACE_CTRL, val); in __vsc8584_init_ptp()
1453 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in __vsc8584_init_ptp()
1465 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_ANALYZER_MODE, in __vsc8584_init_ptp()
1469 * - The Ethernet comparator. in __vsc8584_init_ptp()
1470 * - The IP comparator. in __vsc8584_init_ptp()
1471 * - The PTP comparator. in __vsc8584_init_ptp()
1482 vsc8531->mii_ts.rxtstamp = vsc85xx_rxtstamp; in __vsc8584_init_ptp()
1483 vsc8531->mii_ts.txtstamp = vsc85xx_txtstamp; in __vsc8584_init_ptp()
1484 vsc8531->mii_ts.hwtstamp = vsc85xx_hwtstamp; in __vsc8584_init_ptp()
1485 vsc8531->mii_ts.ts_info = vsc85xx_ts_info; in __vsc8584_init_ptp()
1486 phydev->mii_ts = &vsc8531->mii_ts; in __vsc8584_init_ptp()
1488 memcpy(&vsc8531->ptp->caps, &vsc85xx_clk_caps, sizeof(vsc85xx_clk_caps)); in __vsc8584_init_ptp()
1490 vsc8531->ptp->ptp_clock = ptp_clock_register(&vsc8531->ptp->caps, in __vsc8584_init_ptp()
1491 &phydev->mdio.dev); in __vsc8584_init_ptp()
1492 return PTR_ERR_OR_ZERO(vsc8531->ptp->ptp_clock); in __vsc8584_init_ptp()
1497 struct vsc8531_private *priv = phydev->priv; in vsc8584_config_ts_intr()
1499 mutex_lock(&priv->ts_lock); in vsc8584_config_ts_intr()
1500 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_1588_VSC85XX_INT_MASK, in vsc8584_config_ts_intr()
1502 mutex_unlock(&priv->ts_lock); in vsc8584_config_ts_intr()
1507 switch (phydev->phy_id & phydev->drv->phy_id_mask) { in vsc8584_ptp_init()
1521 struct vsc8531_private *priv = phydev->priv; in vsc8584_handle_ts_interrupt()
1524 mutex_lock(&priv->ts_lock); in vsc8584_handle_ts_interrupt()
1525 rc = vsc85xx_ts_read_csr(phydev, PROCESSOR, in vsc8584_handle_ts_interrupt()
1528 vsc85xx_ts_write_csr(phydev, PROCESSOR, in vsc8584_handle_ts_interrupt()
1532 mutex_unlock(&priv->ts_lock); in vsc8584_handle_ts_interrupt()
1537 vsc85xx_get_tx_ts(priv->ptp); in vsc8584_handle_ts_interrupt()
1539 __skb_queue_purge(&priv->ptp->tx_queue); in vsc8584_handle_ts_interrupt()
1543 mutex_unlock(&priv->ts_lock); in vsc8584_handle_ts_interrupt()
1549 struct vsc8531_private *vsc8531 = phydev->priv; in vsc8584_ptp_probe()
1551 vsc8531->ptp = devm_kzalloc(&phydev->mdio.dev, sizeof(*vsc8531->ptp), in vsc8584_ptp_probe()
1553 if (!vsc8531->ptp) in vsc8584_ptp_probe()
1554 return -ENOMEM; in vsc8584_ptp_probe()
1556 mutex_init(&vsc8531->phc_lock); in vsc8584_ptp_probe()
1557 mutex_init(&vsc8531->ts_lock); in vsc8584_ptp_probe()
1564 vsc8531->load_save = devm_gpiod_get_optional(&phydev->mdio.dev, "load-save", in vsc8584_ptp_probe()
1567 if (IS_ERR(vsc8531->load_save)) { in vsc8584_ptp_probe()
1568 phydev_err(phydev, "Can't get load-save GPIO (%ld)\n", in vsc8584_ptp_probe()
1569 PTR_ERR(vsc8531->load_save)); in vsc8584_ptp_probe()
1570 return PTR_ERR(vsc8531->load_save); in vsc8584_ptp_probe()
1574 phydev->default_timestamp = true; in vsc8584_ptp_probe()
1576 vsc8531->ptp->phydev = phydev; in vsc8584_ptp_probe()
1584 (struct vsc85xx_shared_private *)phydev->shared->priv; in vsc8584_ptp_probe_once()
1587 mutex_init(&shared->gpio_lock); in vsc8584_ptp_probe_once()