Lines Matching +full:tx +full:- +full:d +full:- +full:cal
1 // SPDX-License-Identifier: GPL-2.0+
6 #include <linux/nvmem-consumer.h>
355 phydev_dbg(phydev, "cal_val: 0x%x, ret: %d\n", cal_val, ret); in cal_cycle()
421 switch (phydev->drv->phy_id) { in tx_amp_fill_result()
500 if (phydev->drv->phy_id == MTK_GPHY_ID_MT7988) in tx_r50_fill_result()
501 bias = -1; in tx_r50_fill_result()
519 return -EINVAL; in tx_r50_fill_result()
546 return -EINVAL; in tx_r50_cal_efuse()
612 ret = -EINVAL; in tx_vcm_cal_sw()
619 phydev_dbg(phydev, "Start TX-VCM SW cal.\n"); in tx_vcm_cal_sw()
620 while ((upper_idx - lower_idx) > 1) { in tx_vcm_cal_sw()
664 /* We calibrate TX-VCM in different logic. Check upper index and then in tx_vcm_cal_sw()
667 ret = upper_ret - lower_ret; in tx_vcm_cal_sw()
678 phydev_dbg(phydev, "TX-VCM SW cal result: 0x%x\n", upper_idx); in tx_vcm_cal_sw()
689 phydev_warn(phydev, "TX-VCM SW cal result at low margin 0x%x\n", in tx_vcm_cal_sw()
694 phydev_warn(phydev, "TX-VCM SW cal result at high margin 0x%x\n", in tx_vcm_cal_sw()
697 ret = -EINVAL; in tx_vcm_cal_sw()
763 * Keep middle level of TX MLT3 shapper as default. in mt7981_phy_finetune()
764 * Only change TX MLT3 overshoot level here. in mt7981_phy_finetune()
1005 return -EINVAL; in cal_sw()
1035 return -EINVAL; in cal_efuse()
1059 return -EINVAL; in start_cal()
1063 phydev_err(phydev, "cal %d failed\n", cal_item); in start_cal()
1064 return -EIO; in start_cal()
1077 cell = nvmem_cell_get(&phydev->mdio.dev, "phy-cal-data"); in mt798x_phy_calibration()
1079 if (PTR_ERR(cell) == -EPROBE_DEFER) in mt798x_phy_calibration()
1091 ret = -EINVAL; in mt798x_phy_calibration()
1118 switch (phydev->drv->phy_id) { in mt798x_phy_config_init()
1137 struct mtk_socphy_priv *priv = phydev->priv; in mt798x_phy_hw_led_on_set()
1141 changed = !test_and_set_bit(bit_on, &priv->led_state); in mt798x_phy_hw_led_on_set()
1143 changed = !!test_and_clear_bit(bit_on, &priv->led_state); in mt798x_phy_hw_led_on_set()
1146 (index ? 16 : 0), &priv->led_state); in mt798x_phy_hw_led_on_set()
1160 struct mtk_socphy_priv *priv = phydev->priv; in mt798x_phy_hw_led_blink_set()
1164 changed = !test_and_set_bit(bit_blink, &priv->led_state); in mt798x_phy_hw_led_blink_set()
1166 changed = !!test_and_clear_bit(bit_blink, &priv->led_state); in mt798x_phy_hw_led_blink_set()
1169 (index ? 16 : 0), &priv->led_state); in mt798x_phy_hw_led_blink_set()
1186 return -EINVAL; in mt798x_phy_led_blink_set()
1226 return -EINVAL; in mt798x_phy_led_hw_is_supported()
1230 return -EOPNOTSUPP; in mt798x_phy_led_hw_is_supported()
1241 struct mtk_socphy_priv *priv = phydev->priv; in mt798x_phy_led_hw_control_get()
1245 return -EINVAL; in mt798x_phy_led_hw_control_get()
1251 return -EIO; in mt798x_phy_led_hw_control_get()
1257 return -EIO; in mt798x_phy_led_hw_control_get()
1262 set_bit(bit_netdev, &priv->led_state); in mt798x_phy_led_hw_control_get()
1264 clear_bit(bit_netdev, &priv->led_state); in mt798x_phy_led_hw_control_get()
1267 set_bit(bit_on, &priv->led_state); in mt798x_phy_led_hw_control_get()
1269 clear_bit(bit_on, &priv->led_state); in mt798x_phy_led_hw_control_get()
1272 set_bit(bit_blink, &priv->led_state); in mt798x_phy_led_hw_control_get()
1274 clear_bit(bit_blink, &priv->led_state); in mt798x_phy_led_hw_control_get()
1310 struct mtk_socphy_priv *priv = phydev->priv; in mt798x_phy_led_hw_control_set()
1315 return -EINVAL; in mt798x_phy_led_hw_control_set()
1349 set_bit(bit_netdev, &priv->led_state); in mt798x_phy_led_hw_control_set()
1351 clear_bit(bit_netdev, &priv->led_state); in mt798x_phy_led_hw_control_set()
1371 struct mtk_socphy_shared *priv = phydev->shared->priv; in mt7988_phy_led_get_polarity()
1375 polarities = ~(priv->boottrap); in mt7988_phy_led_get_polarity()
1379 if (polarities & BIT(phydev->mdio.addr)) in mt7988_phy_led_get_polarity()
1399 pinctrl = devm_pinctrl_get_select(&phydev->mdio.dev, "gbe-led"); in mt7988_phy_fix_leds_polarities()
1401 dev_err(&phydev->mdio.bus->dev, "Failed to setup PHY LED pinctrl\n"); in mt7988_phy_fix_leds_polarities()
1408 struct device_node *np = dev_of_node(&phydev->mdio.bus->dev); in mt7988_phy_probe_shared()
1409 struct mtk_socphy_shared *shared = phydev->shared->priv; in mt7988_phy_probe_shared()
1420 * The detected value at boot time is accessible at run-time using the in mt7988_phy_probe_shared()
1435 shared->boottrap = FIELD_GET(RG_GPIO_MISC_TPBANK0_BOOTMODE, reg); in mt7988_phy_probe_shared()
1454 if (phydev->mdio.addr > 3) in mt7988_phy_probe()
1455 return -EINVAL; in mt7988_phy_probe()
1457 err = devm_phy_package_join(&phydev->mdio.dev, phydev, 0, in mt7988_phy_probe()
1468 shared = phydev->shared->priv; in mt7988_phy_probe()
1469 priv = &shared->priv[phydev->mdio.addr]; in mt7988_phy_probe()
1471 phydev->priv = priv; in mt7988_phy_probe()
1479 /* Disable TX power saving at probing to: in mt7988_phy_probe()
1481 * 2. Make sure that TX-VCM calibration works fine in mt7988_phy_probe()
1493 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(struct mtk_socphy_priv), in mt7981_phy_probe()
1496 return -ENOMEM; in mt7981_phy_probe()
1498 phydev->priv = priv; in mt7981_phy_probe()