Lines Matching +full:phy +full:- +full:reset +full:- +full:duration
1 // SPDX-License-Identifier: GPL-2.0
2 /* Driver for the Texas Instruments DP83TD510 PHY
10 #include <linux/phy.h>
16 /* Bit 7 - mii_interrupt, active high. Clears on read.
45 * "Application Report - DP83TD510E Cable Diagnostics Toolkit":
46 * SNR(dB) = -10 * log10 (VAL/2^17) - 1.76 dB.
47 * SQI ranges are implemented according to "OPEN ALLIANCE - Advanced diagnostic
48 * features for 100BASE-T1 automotive Ethernet PHYs"
65 /* Time Domain Reflectometry (TDR) Functionality of DP83TD510 PHY
67 * I assume that this PHY is using a variation of Spread Spectrum Time Domain
70 * - The DP83TD510 PHY transmits a modulated signal of configurable length
73 * - The pulse observed on the wire, triggered by the HW RESET register, is not
82 * The SSTDR variation used in this PHY involves more configuration variables
90 * ,<--cfg_pre_silence_time
91 * | ,<-SSTDR Modulated Transmission
92 * | | ,<--cfg_post_silence_time
93 * | | | ,<--Force Link Mode
94 * |<--'-->|<-------'------->|<--'-->|<--------'------->|
96 * - cfg_pre_silence_time: Optional silence time before TDR transmission starts.
97 * - SSTDR Modulated Transmission: Transmission duration configured by
99 * - cfg_post_silence_time: Silence time after TDR transmission.
100 * - Force Link Mode: If nothing is configured after cfg_post_silence_time,
101 * the PHY continues in force link mode without autonegotiation.
130 * settle down all pulses and reflections. Since for 10BASE-T1L we have
146 /* cfg_tdr_tx_duration: Duration of the TDR transmission in microseconds.
147 * This value sets the duration of the modulated signal used for TDR
149 * - Default: 16000 µs
150 * - Observation: A minimum duration of 6000 µs is recommended to ensure
184 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in dp83td510_config_intr()
236 phydev->speed = SPEED_UNKNOWN; in dp83td510_read_status()
237 phydev->duplex = DUPLEX_UNKNOWN; in dp83td510_read_status()
238 phydev->pause = 0; in dp83td510_read_status()
239 phydev->asym_pause = 0; in dp83td510_read_status()
240 linkmode_zero(phydev->lp_advertising); in dp83td510_read_status()
244 phydev->link = !!(phy_sts & DP83TD510E_LINK_STATUS); in dp83td510_read_status()
245 if (phydev->link) { in dp83td510_read_status()
246 /* This PHY supports only one link mode: 10BaseT1L_Full */ in dp83td510_read_status()
247 phydev->duplex = DUPLEX_FULL; in dp83td510_read_status()
248 phydev->speed = SPEED_10; in dp83td510_read_status()
250 if (phydev->autoneg == AUTONEG_ENABLE) { in dp83td510_read_status()
259 if (phydev->autoneg == AUTONEG_ENABLE) { in dp83td510_read_status()
270 phydev->master_slave_state = MASTER_SLAVE_STATE_ERR; in dp83td510_read_status()
287 if (phydev->autoneg == AUTONEG_DISABLE) in dp83td510_config_aneg()
304 if (!phydev->link) in dp83td510_get_sqi()
317 return -EINVAL; in dp83td510_get_sqi()
326 * dp83td510_cable_test_start - Start the cable test for the DP83TD510 PHY.
336 struct dp83td510_priv *priv = phydev->priv; in dp83td510_cable_test_start()
346 if (phydev->link) { in dp83td510_cable_test_start()
347 priv->alcd_test_active = true; in dp83td510_cable_test_start()
351 priv->alcd_test_active = false; in dp83td510_cable_test_start()
375 * PHY framework. The idea is to wait until in dp83td510_cable_test_start()
377 * the PHY to the default state within the post silence time window. in dp83td510_cable_test_start()
428 * dp83td510_cable_test_get_tdr_status - Get the status of the TDR test for the
429 * DP83TD510 PHY.
484 * dp83td510_cable_test_get_alcd_status - Get the status of the ALCD test for the
485 * DP83TD510 PHY.
533 * dp83td510_cable_test_get_status - Get the status of the cable test for the
534 * DP83TD510 PHY.
545 struct dp83td510_priv *priv = phydev->priv; in dp83td510_cable_test_get_status()
548 if (priv->alcd_test_active) in dp83td510_cable_test_get_status()
556 /* This PHY can't respond on MDIO bus if no RMII clock is enabled. in dp83td510_get_features()
557 * In case RMII mode is used (most meaningful mode for this PHY) and in dp83td510_get_features()
558 * the PHY do not have own XTAL, and CLK providing MAC is not probed, in dp83td510_get_features()
563 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported); in dp83td510_get_features()
564 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, phydev->supported); in dp83td510_get_features()
565 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, phydev->supported); in dp83td510_get_features()
567 phydev->supported); in dp83td510_get_features()
574 struct device *dev = &phydev->mdio.dev; in dp83td510_probe()
579 return -ENOMEM; in dp83td510_probe()
581 phydev->priv = priv; in dp83td510_probe()
614 MODULE_DESCRIPTION("Texas Instruments DP83TD510E PHY driver");