29 #define MII_REG_MASK				GENMASK(10, 6)
36 #define MII_MDIO_RETRY_MSEC			(10)
39 	struct regmap *base; /* NSS_GMAC0_BASE */  member
47 	return regmap_read_poll_timeout(priv->base, MII_ADDR_REG_ADDR, busy,  in ipq8064_mdio_wait_busy()
63 	regmap_write(priv->base, MII_ADDR_REG_ADDR, miiaddr);  in ipq8064_mdio_read()
64 	usleep_range(10, 13);  in ipq8064_mdio_read()
70 	regmap_read(priv->base, MII_DATA_REG_ADDR, &ret_val);  in ipq8064_mdio_read()
80 	regmap_write(priv->base, MII_DATA_REG_ADDR, data);  in ipq8064_mdio_write()
85 	regmap_write(priv->base, MII_ADDR_REG_ADDR, miiaddr);  in ipq8064_mdio_write()
93 		usleep_range(10, 13);  in ipq8064_mdio_write()
116 	void __iomem *base;  in ipq8064_mdio_probe()  local
122 	base = devm_ioremap(&pdev->dev, res.start, resource_size(&res));  in ipq8064_mdio_probe()
123 	if (!base)  in ipq8064_mdio_probe()
137 	priv->base = devm_regmap_init_mmio(&pdev->dev, base,  in ipq8064_mdio_probe()
139 	if (IS_ERR(priv->base))  in ipq8064_mdio_probe()
140 		return PTR_ERR(priv->base);  in ipq8064_mdio_probe()