Lines Matching +full:0 +full:- +full:31
1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
13 [COMP_CFG_ENABLE] = BIT(0),
18 /* Bits 5-31 reserved */
21 REG_FIELDS(COMP_CFG, comp_cfg, 0x0000003c);
24 [CLKON_RX] = BIT(0),
41 /* Bits 17-31 reserved */
44 REG_FIELDS(CLKON_CFG, clkon_cfg, 0x00000044);
47 [ROUTE_DIS] = BIT(0),
52 /* Bits 22-23 reserved */
54 /* Bits 25-31 reserved */
57 REG_FIELDS(ROUTE, route, 0x00000048);
60 [MEM_SIZE] = GENMASK(15, 0),
61 [MEM_BADDR] = GENMASK(31, 16),
64 REG_FIELDS(SHARED_MEM_SIZE, shared_mem_size, 0x00000054);
67 [GEN_QMB_0_MAX_WRITES] = GENMASK(3, 0),
69 /* Bits 8-31 reserved */
72 REG_FIELDS(QSB_MAX_WRITES, qsb_max_writes, 0x00000074);
75 [GEN_QMB_0_MAX_READS] = GENMASK(3, 0),
79 REG_FIELDS(QSB_MAX_READS, qsb_max_reads, 0x00000078);
82 [IPV6_ROUTER_HASH] = BIT(0),
83 /* Bits 1-3 reserved */
85 /* Bits 5-7 reserved */
87 /* Bits 9-11 reserved */
89 /* Bits 13-31 reserved */
92 REG_FIELDS(FILT_ROUT_HASH_FLUSH, filt_rout_hash_flush, 0x0000090);
94 /* Valid bits defined by ipa->available */
95 REG_STRIDE(STATE_AGGR_ACTIVE, state_aggr_active, 0x0000010c, 0x0004);
97 REG(IPA_BCR, ipa_bcr, 0x000001d0);
100 [IPA_BASE_ADDR] = GENMASK(16, 0),
101 /* Bits 17-31 reserved */
105 REG_FIELDS(LOCAL_PKT_PROC_CNTXT, local_pkt_proc_cntxt, 0x000001e8);
107 /* Valid bits defined by ipa->available */
108 REG_STRIDE(AGGR_FORCE_CLOSE, aggr_force_close, 0x000001ec, 0x0004);
111 [EOT_COAL_GRANULARITY] = GENMASK(3, 0),
113 /* Bits 5-31 reserved */
116 REG_FIELDS(COUNTER_CFG, counter_cfg, 0x000001f0);
119 [X_MIN_LIM] = GENMASK(7, 0),
122 [Y_MAX_LIM] = GENMASK(31, 24),
126 0x00000400, 0x0020);
129 [X_MIN_LIM] = GENMASK(7, 0),
132 [Y_MAX_LIM] = GENMASK(31, 24),
136 0x00000404, 0x0020);
139 [X_MIN_LIM] = GENMASK(7, 0),
142 [Y_MAX_LIM] = GENMASK(31, 24),
146 0x00000408, 0x0020);
149 [X_MIN_LIM] = GENMASK(7, 0),
152 [Y_MAX_LIM] = GENMASK(31, 24),
156 0x0000040c, 0x0020);
159 [X_MIN_LIM] = GENMASK(7, 0),
162 [Y_MAX_LIM] = GENMASK(31, 24),
166 0x00000500, 0x0020);
169 [X_MIN_LIM] = GENMASK(7, 0),
172 [Y_MAX_LIM] = GENMASK(31, 24),
176 0x00000504, 0x0020);
179 [X_MIN_LIM] = GENMASK(7, 0),
182 [Y_MAX_LIM] = GENMASK(31, 24),
186 0x00000508, 0x0020);
189 [X_MIN_LIM] = GENMASK(7, 0),
192 [Y_MAX_LIM] = GENMASK(31, 24),
196 0x0000050c, 0x0020);
199 [ENDP_SUSPEND] = BIT(0),
201 /* Bits 2-31 reserved */
204 REG_STRIDE_FIELDS(ENDP_INIT_CTRL, endp_init_ctrl, 0x00000800, 0x0070);
207 [FRAG_OFFLOAD_EN] = BIT(0),
212 /* Bits 9-31 reserved */
215 REG_STRIDE_FIELDS(ENDP_INIT_CFG, endp_init_cfg, 0x00000808, 0x0070);
218 [NAT_EN] = GENMASK(1, 0),
219 /* Bits 2-31 reserved */
222 REG_STRIDE_FIELDS(ENDP_INIT_NAT, endp_init_nat, 0x0000080c, 0x0070);
225 [HDR_LEN] = GENMASK(5, 0),
234 /* Bits 29-31 reserved */
237 REG_STRIDE_FIELDS(ENDP_INIT_HDR, endp_init_hdr, 0x00000810, 0x0070);
240 [HDR_ENDIANNESS] = BIT(0),
246 /* Bits 14-31 reserved */
249 REG_STRIDE_FIELDS(ENDP_INIT_HDR_EXT, endp_init_hdr_ext, 0x00000814, 0x0070);
252 0x00000818, 0x0070);
255 [ENDP_MODE] = GENMASK(2, 0),
258 /* Bits 9-11 reserved */
263 /* Bit 31 reserved */
266 REG_STRIDE_FIELDS(ENDP_INIT_MODE, endp_init_mode, 0x00000820, 0x0070);
269 [AGGR_EN] = GENMASK(1, 0),
278 /* Bits 25-31 reserved */
281 REG_STRIDE_FIELDS(ENDP_INIT_AGGR, endp_init_aggr, 0x00000824, 0x0070);
284 [HOL_BLOCK_EN] = BIT(0),
285 /* Bits 1-31 reserved */
289 0x0000082c, 0x0070);
293 [TIMER_BASE_VALUE] = GENMASK(31, 0),
297 0x00000830, 0x0070);
300 [DEAGGR_HDR_LEN] = GENMASK(5, 0),
306 [MAX_PACKET_LEN] = GENMASK(31, 16),
309 REG_STRIDE_FIELDS(ENDP_INIT_DEAGGR, endp_init_deaggr, 0x00000834, 0x0070);
312 [ENDP_RSRC_GRP] = GENMASK(2, 0),
313 /* Bits 3-31 reserved */
316 REG_STRIDE_FIELDS(ENDP_INIT_RSRC_GRP, endp_init_rsrc_grp, 0x00000838, 0x0070);
319 [SEQ_TYPE] = GENMASK(7, 0),
321 /* Bits 16-31 reserved */
324 REG_STRIDE_FIELDS(ENDP_INIT_SEQ, endp_init_seq, 0x0000083c, 0x0070);
327 [STATUS_EN] = BIT(0),
329 /* Bits 6-7 reserved */
331 /* Bits 9-31 reserved */
334 REG_STRIDE_FIELDS(ENDP_STATUS, endp_status, 0x00000840, 0x0070);
337 [FILTER_HASH_MSK_SRC_ID] = BIT(0),
344 [FILTER_HASH_MSK_ALL] = GENMASK(6, 0),
345 /* Bits 7-15 reserved */
354 /* Bits 23-31 reserved */
358 0x0000085c, 0x0070);
361 REG(IPA_IRQ_STTS, ipa_irq_stts, 0x00003008 + 0x1000 * GSI_EE_AP);
364 REG(IPA_IRQ_EN, ipa_irq_en, 0x0000300c + 0x1000 * GSI_EE_AP);
367 REG(IPA_IRQ_CLR, ipa_irq_clr, 0x00003010 + 0x1000 * GSI_EE_AP);
370 [UC_INTR] = BIT(0),
371 /* Bits 1-31 reserved */
374 REG_FIELDS(IPA_IRQ_UC, ipa_irq_uc, 0x0000301c + 0x1000 * GSI_EE_AP);
376 /* Valid bits defined by ipa->available */
378 0x00003030 + 0x1000 * GSI_EE_AP, 0x0004);
380 /* Valid bits defined by ipa->available */
382 0x00003034 + 0x1000 * GSI_EE_AP, 0x0004);
384 /* Valid bits defined by ipa->available */
386 0x00003038 + 0x1000 * GSI_EE_AP, 0x0004);