95 #define REG_IRQ1_EN0	0x3C7	/* RW Interrupt Mask set bits for IRQ1 */
96 #define REG_IRQ1_EN1	0x3C8	/* RW Interrupt Mask set bits for IRQ1 */
250 /* IRQ1 */
941 static void adf7242_debug(struct adf7242_local *lp, u8 irq1)  in adf7242_debug()  argument
948 	dev_dbg(&lp->spi->dev, "%s IRQ1 = %X:\n%s%s%s%s%s%s%s%s\n",  in adf7242_debug()
949 		__func__, irq1,  in adf7242_debug()
950 		irq1 & IRQ_CCA_COMPLETE ? "IRQ_CCA_COMPLETE\n" : "",  in adf7242_debug()
951 		irq1 & IRQ_SFD_RX ? "IRQ_SFD_RX\n" : "",  in adf7242_debug()
952 		irq1 & IRQ_SFD_TX ? "IRQ_SFD_TX\n" : "",  in adf7242_debug()
953 		irq1 & IRQ_RX_PKT_RCVD ? "IRQ_RX_PKT_RCVD\n" : "",  in adf7242_debug()
954 		irq1 & IRQ_TX_PKT_SENT ? "IRQ_TX_PKT_SENT\n" : "",  in adf7242_debug()
955 		irq1 & IRQ_CSMA_CA ? "IRQ_CSMA_CA\n" : "",  in adf7242_debug()
956 		irq1 & IRQ_FRAME_VALID ? "IRQ_FRAME_VALID\n" : "",  in adf7242_debug()
957 		irq1 & IRQ_ADDRESS_VALID ? "IRQ_ADDRESS_VALID\n" : "");  in adf7242_debug()
977 	u8 irq1;  in adf7242_isr()  local
980 	adf7242_read_reg(lp, REG_IRQ1_SRC1, &irq1);  in adf7242_isr()
982 	if (!(irq1 & (IRQ_RX_PKT_RCVD | IRQ_CSMA_CA)))  in adf7242_isr()
983 		dev_err(&lp->spi->dev, "%s :ERROR IRQ1 = 0x%X\n",  in adf7242_isr()
984 			__func__, irq1);  in adf7242_isr()
986 	adf7242_debug(lp, irq1);  in adf7242_isr()
990 	if (xmit && (irq1 & IRQ_CSMA_CA)) {  in adf7242_isr()
1015 	} else if (!xmit && (irq1 & IRQ_RX_PKT_RCVD) &&  in adf7242_isr()
1016 		   (irq1 & IRQ_FRAME_VALID)) {  in adf7242_isr()
1020 		dev_dbg(&lp->spi->dev, "%s:%d : ERROR IRQ1 = 0x%X\n",  in adf7242_isr()
1021 			__func__, __LINE__, irq1);  in adf7242_isr()
1030 		dev_dbg(&lp->spi->dev, "%s:%d : ERROR IRQ1 = 0x%X, xmit %d\n",  in adf7242_isr()
1031 			__func__, __LINE__, irq1, xmit);  in adf7242_isr()
1132 	u8 stat, irq1;  in adf7242_stats_show()  local
1135 	adf7242_read_reg(lp, REG_IRQ1_SRC1, &irq1);  in adf7242_stats_show()
1137 	seq_printf(file, "IRQ1 = %X:\n%s%s%s%s%s%s%s%s\n", irq1,  in adf7242_stats_show()
1138 		   irq1 & IRQ_CCA_COMPLETE ? "IRQ_CCA_COMPLETE\n" : "",  in adf7242_stats_show()
1139 		   irq1 & IRQ_SFD_RX ? "IRQ_SFD_RX\n" : "",  in adf7242_stats_show()
1140 		   irq1 & IRQ_SFD_TX ? "IRQ_SFD_TX\n" : "",  in adf7242_stats_show()
1141 		   irq1 & IRQ_RX_PKT_RCVD ? "IRQ_RX_PKT_RCVD\n" : "",  in adf7242_stats_show()
1142 		   irq1 & IRQ_TX_PKT_SENT ? "IRQ_TX_PKT_SENT\n" : "",  in adf7242_stats_show()
1143 		   irq1 & IRQ_CSMA_CA ? "IRQ_CSMA_CA\n" : "",  in adf7242_stats_show()
1144 		   irq1 & IRQ_FRAME_VALID ? "IRQ_FRAME_VALID\n" : "",  in adf7242_stats_show()
1145 		   irq1 & IRQ_ADDRESS_VALID ? "IRQ_ADDRESS_VALID\n" : "");  in adf7242_stats_show()