78 #define RBR(iobase) (iobase+0)  argument
79 #define THR(iobase) (iobase+0)  argument
80 #define IER(iobase) (iobase+1)  argument
81 #define IIR(iobase) (iobase+2)  argument
82 #define FCR(iobase) (iobase+2)  argument
83 #define LCR(iobase) (iobase+3)  argument
84 #define MCR(iobase) (iobase+4)  argument
85 #define LSR(iobase) (iobase+5)  argument
86 #define MSR(iobase) (iobase+6)  argument
87 #define SCR(iobase) (iobase+7)  argument
88 #define DLL(iobase) (iobase+0)  argument
89 #define DLM(iobase) (iobase+1)  argument
423 static enum uart ser12_check_uart(unsigned int iobase)  in ser12_check_uart()  argument
430 	b1 = inb(MCR(iobase));  in ser12_check_uart()
431 	outb(b1 | 0x10, MCR(iobase));	/* loopback mode */  in ser12_check_uart()
432 	b2 = inb(MSR(iobase));  in ser12_check_uart()
433 	outb(0x1a, MCR(iobase));  in ser12_check_uart()
434 	b3 = inb(MSR(iobase)) & 0xf0;  in ser12_check_uart()
435 	outb(b1, MCR(iobase));			/* restore old values */  in ser12_check_uart()
436 	outb(b2, MSR(iobase));  in ser12_check_uart()
439 	inb(RBR(iobase));  in ser12_check_uart()
440 	inb(RBR(iobase));  in ser12_check_uart()
441 	outb(0x01, FCR(iobase));		/* enable FIFOs */  in ser12_check_uart()
442 	u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];  in ser12_check_uart()
444 		outb(0x5a, SCR(iobase));  in ser12_check_uart()
445 		b1 = inb(SCR(iobase));  in ser12_check_uart()
446 		outb(0xa5, SCR(iobase));  in ser12_check_uart()
447 		b2 = inb(SCR(iobase));  in ser12_check_uart()
624 static int iobase[NR_PORTS] = { 0x3f8, };  variable
629 module_param_hw_array(iobase, int, ioport, NULL, 0);
630 MODULE_PARM_DESC(iobase, "baycom io base address");
659 			iobase[i] = irq[i] = 0;  in init_baycomserhdx()
663 				       ifname, iobase[i], irq[i], 0);  in init_baycomserhdx()
718 	iobase[nr_dev] = ints[1];  in baycom_ser_hdx_setup()