Lines Matching +full:axi +full:- +full:ethernet +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Xilinx Axi Ethernet device driver
6 * Copyright (c) 2005-2008 DLA Systems, David H. Lynch Jr. <dhlii@dlasys.net>
7 * Copyright (c) 2008-2009 Secret Lab Technologies Ltd.
8 * Copyright (c) 2010 - 2011 Michal Simek <monstr@monstr.eu>
9 * Copyright (c) 2010 - 2011 PetaLogix
10 * Copyright (c) 2019 - 2022 Calian Advanced Technologies
11 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
13 * This is a driver for the Xilinx Axi Ethernet which is used in the Virtex6
17 * - Add Axi Fifo support.
18 * - Factor out Axi DMA code into separate driver.
19 * - Test and fix basic multicast filtering.
20 * - Add support for extended multicast filtering.
21 * - Test basic VLAN support.
22 * - Add support for extended VLAN support.
42 #include <linux/dma-mapping.h>
52 #define TX_BD_NUM_MIN (MAX_SKB_FRAGS + 1)
61 #define DRIVER_DESCRIPTION "Xilinx Axi Ethernet driver"
70 { .compatible = "xlnx,axi-ethernet-1.00.a", },
71 { .compatible = "xlnx,axi-ethernet-1.01.a", },
72 { .compatible = "xlnx,axi-ethernet-2.01.a", },
78 /* Option table for setting up Axi Ethernet hardware options */
135 return lp->rx_skb_ring[i & (RX_BUF_NUM_DEFAULT - 1)]; in axienet_get_rx_desc()
140 return lp->tx_skb_ring[i & (TX_BD_NUM_MAX - 1)]; in axienet_get_tx_desc()
144 * axienet_dma_in32 - Memory mapped Axi DMA register read
146 * @reg: Address offset from the base address of the Axi DMA core
148 * Return: The contents of the Axi DMA register
150 * This function returns the contents of the corresponding Axi DMA register.
154 return ioread32(lp->dma_regs + reg); in axienet_dma_in32()
160 desc->phys = lower_32_bits(addr); in desc_set_phys_addr()
161 if (lp->features & XAE_FEATURE_DMA_64BIT) in desc_set_phys_addr()
162 desc->phys_msb = upper_32_bits(addr); in desc_set_phys_addr()
168 dma_addr_t ret = desc->phys; in desc_get_phys_addr()
170 if (lp->features & XAE_FEATURE_DMA_64BIT) in desc_get_phys_addr()
171 ret |= ((dma_addr_t)desc->phys_msb << 16) << 16; in desc_get_phys_addr()
177 * axienet_dma_bd_release - Release buffer descriptor rings
181 * axienet_dma_bd_init. axienet_dma_bd_release is called when Axi Ethernet
190 dma_free_coherent(lp->dev, in axienet_dma_bd_release()
191 sizeof(*lp->tx_bd_v) * lp->tx_bd_num, in axienet_dma_bd_release()
192 lp->tx_bd_v, in axienet_dma_bd_release()
193 lp->tx_bd_p); in axienet_dma_bd_release()
195 if (!lp->rx_bd_v) in axienet_dma_bd_release()
198 for (i = 0; i < lp->rx_bd_num; i++) { in axienet_dma_bd_release()
204 if (!lp->rx_bd_v[i].skb) in axienet_dma_bd_release()
207 dev_kfree_skb(lp->rx_bd_v[i].skb); in axienet_dma_bd_release()
209 /* For each descriptor, we programmed cntrl with the (non-zero) in axienet_dma_bd_release()
211 * So a non-zero value in there means we need to unmap it. in axienet_dma_bd_release()
213 if (lp->rx_bd_v[i].cntrl) { in axienet_dma_bd_release()
214 phys = desc_get_phys_addr(lp, &lp->rx_bd_v[i]); in axienet_dma_bd_release()
215 dma_unmap_single(lp->dev, phys, in axienet_dma_bd_release()
216 lp->max_frm_size, DMA_FROM_DEVICE); in axienet_dma_bd_release()
220 dma_free_coherent(lp->dev, in axienet_dma_bd_release()
221 sizeof(*lp->rx_bd_v) * lp->rx_bd_num, in axienet_dma_bd_release()
222 lp->rx_bd_v, in axienet_dma_bd_release()
223 lp->rx_bd_p); in axienet_dma_bd_release()
227 * axienet_usec_to_timer - Calculate IRQ delay timer value
236 if (lp->axi_clk) in axienet_usec_to_timer()
237 clk_rate = clk_get_rate(lp->axi_clk); in axienet_usec_to_timer()
239 /* 1 Timeout Interval = 125 * (clock period of SG clock) */ in axienet_usec_to_timer()
249 * axienet_dma_start - Set up DMA registers and start DMA operation
255 lp->rx_dma_cr = (lp->coalesce_count_rx << XAXIDMA_COALESCE_SHIFT) | in axienet_dma_start()
260 if (lp->coalesce_count_rx > 1) in axienet_dma_start()
261 lp->rx_dma_cr |= (axienet_usec_to_timer(lp, lp->coalesce_usec_rx) in axienet_dma_start()
264 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, lp->rx_dma_cr); in axienet_dma_start()
267 lp->tx_dma_cr = (lp->coalesce_count_tx << XAXIDMA_COALESCE_SHIFT) | in axienet_dma_start()
272 if (lp->coalesce_count_tx > 1) in axienet_dma_start()
273 lp->tx_dma_cr |= (axienet_usec_to_timer(lp, lp->coalesce_usec_tx) in axienet_dma_start()
276 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, lp->tx_dma_cr); in axienet_dma_start()
278 /* Populate the tail pointer and bring the Rx Axi DMA engine out of in axienet_dma_start()
281 axienet_dma_out_addr(lp, XAXIDMA_RX_CDESC_OFFSET, lp->rx_bd_p); in axienet_dma_start()
282 lp->rx_dma_cr |= XAXIDMA_CR_RUNSTOP_MASK; in axienet_dma_start()
283 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, lp->rx_dma_cr); in axienet_dma_start()
284 axienet_dma_out_addr(lp, XAXIDMA_RX_TDESC_OFFSET, lp->rx_bd_p + in axienet_dma_start()
285 (sizeof(*lp->rx_bd_v) * (lp->rx_bd_num - 1))); in axienet_dma_start()
287 /* Write to the RS (Run-stop) bit in the Tx channel control register. in axienet_dma_start()
291 axienet_dma_out_addr(lp, XAXIDMA_TX_CDESC_OFFSET, lp->tx_bd_p); in axienet_dma_start()
292 lp->tx_dma_cr |= XAXIDMA_CR_RUNSTOP_MASK; in axienet_dma_start()
293 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, lp->tx_dma_cr); in axienet_dma_start()
297 * axienet_dma_bd_init - Setup buffer descriptor rings for Axi DMA
300 * Return: 0, on success -ENOMEM, on failure
304 * and is called when Axi Ethernet driver reset is called.
313 lp->tx_bd_ci = 0; in axienet_dma_bd_init()
314 lp->tx_bd_tail = 0; in axienet_dma_bd_init()
315 lp->rx_bd_ci = 0; in axienet_dma_bd_init()
318 lp->tx_bd_v = dma_alloc_coherent(lp->dev, in axienet_dma_bd_init()
319 sizeof(*lp->tx_bd_v) * lp->tx_bd_num, in axienet_dma_bd_init()
320 &lp->tx_bd_p, GFP_KERNEL); in axienet_dma_bd_init()
321 if (!lp->tx_bd_v) in axienet_dma_bd_init()
322 return -ENOMEM; in axienet_dma_bd_init()
324 lp->rx_bd_v = dma_alloc_coherent(lp->dev, in axienet_dma_bd_init()
325 sizeof(*lp->rx_bd_v) * lp->rx_bd_num, in axienet_dma_bd_init()
326 &lp->rx_bd_p, GFP_KERNEL); in axienet_dma_bd_init()
327 if (!lp->rx_bd_v) in axienet_dma_bd_init()
330 for (i = 0; i < lp->tx_bd_num; i++) { in axienet_dma_bd_init()
331 dma_addr_t addr = lp->tx_bd_p + in axienet_dma_bd_init()
332 sizeof(*lp->tx_bd_v) * in axienet_dma_bd_init()
333 ((i + 1) % lp->tx_bd_num); in axienet_dma_bd_init()
335 lp->tx_bd_v[i].next = lower_32_bits(addr); in axienet_dma_bd_init()
336 if (lp->features & XAE_FEATURE_DMA_64BIT) in axienet_dma_bd_init()
337 lp->tx_bd_v[i].next_msb = upper_32_bits(addr); in axienet_dma_bd_init()
340 for (i = 0; i < lp->rx_bd_num; i++) { in axienet_dma_bd_init()
343 addr = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * in axienet_dma_bd_init()
344 ((i + 1) % lp->rx_bd_num); in axienet_dma_bd_init()
345 lp->rx_bd_v[i].next = lower_32_bits(addr); in axienet_dma_bd_init()
346 if (lp->features & XAE_FEATURE_DMA_64BIT) in axienet_dma_bd_init()
347 lp->rx_bd_v[i].next_msb = upper_32_bits(addr); in axienet_dma_bd_init()
349 skb = netdev_alloc_skb_ip_align(ndev, lp->max_frm_size); in axienet_dma_bd_init()
353 lp->rx_bd_v[i].skb = skb; in axienet_dma_bd_init()
354 addr = dma_map_single(lp->dev, skb->data, in axienet_dma_bd_init()
355 lp->max_frm_size, DMA_FROM_DEVICE); in axienet_dma_bd_init()
356 if (dma_mapping_error(lp->dev, addr)) { in axienet_dma_bd_init()
360 desc_set_phys_addr(lp, addr, &lp->rx_bd_v[i]); in axienet_dma_bd_init()
362 lp->rx_bd_v[i].cntrl = lp->max_frm_size; in axienet_dma_bd_init()
370 return -ENOMEM; in axienet_dma_bd_init()
374 * axienet_set_mac_address - Write the MAC address
378 * This function is called to initialize the MAC address of the Axi Ethernet
388 if (!is_valid_ether_addr(ndev->dev_addr)) in axienet_set_mac_address()
393 (ndev->dev_addr[0]) | in axienet_set_mac_address()
394 (ndev->dev_addr[1] << 8) | in axienet_set_mac_address()
395 (ndev->dev_addr[2] << 16) | in axienet_set_mac_address()
396 (ndev->dev_addr[3] << 24)); in axienet_set_mac_address()
400 (ndev->dev_addr[4] | in axienet_set_mac_address()
401 (ndev->dev_addr[5] << 8)))); in axienet_set_mac_address()
405 * netdev_set_mac_address - Write the MAC address (from outside the driver)
411 * This function is called to initialize the MAC address of the Axi Ethernet
419 axienet_set_mac_address(ndev, addr->sa_data); in netdev_set_mac_address()
424 * axienet_set_multicast_list - Prepare the multicast table
428 * initialization. The Axi Ethernet basic multicast support has a four-entry
442 if (ndev->flags & IFF_PROMISC) in axienet_set_multicast_list()
448 if (ndev->flags & IFF_ALLMULTI || in axienet_set_multicast_list()
452 axienet_iow(lp, XAE_AF0_OFFSET, 1); /* Multicast bit */ in axienet_set_multicast_list()
454 axienet_iow(lp, XAE_AM0_OFFSET, 1); /* ditto */ in axienet_set_multicast_list()
456 axienet_iow(lp, XAE_FFE_OFFSET, 1); in axienet_set_multicast_list()
457 i = 1; in axienet_set_multicast_list()
465 af0reg = (ha->addr[0]); in axienet_set_multicast_list()
466 af0reg |= (ha->addr[1] << 8); in axienet_set_multicast_list()
467 af0reg |= (ha->addr[2] << 16); in axienet_set_multicast_list()
468 af0reg |= (ha->addr[3] << 24); in axienet_set_multicast_list()
470 af1reg = (ha->addr[4]); in axienet_set_multicast_list()
471 af1reg |= (ha->addr[5] << 8); in axienet_set_multicast_list()
481 axienet_iow(lp, XAE_FFE_OFFSET, 1); in axienet_set_multicast_list()
495 * axienet_setoptions - Set an Axi Ethernet option
499 * The Axi Ethernet core has multiple features which can be selectively turned
502 * these options in the Axi Ethernet hardware. This is done through
511 while (tp->opt) { in axienet_setoptions()
512 reg = ((axienet_ior(lp, tp->reg)) & ~(tp->m_or)); in axienet_setoptions()
513 if (options & tp->opt) in axienet_setoptions()
514 reg |= tp->m_or; in axienet_setoptions()
515 axienet_iow(lp, tp->reg, reg); in axienet_setoptions()
519 lp->options |= options; in axienet_setoptions()
526 if (lp->reset_in_progress) in axienet_stat()
527 return lp->hw_stat_base[stat]; in axienet_stat()
530 return lp->hw_stat_base[stat] + (counter - lp->hw_last_counter[stat]); in axienet_stat()
537 write_seqcount_begin(&lp->hw_stats_seqcount); in axienet_stats_update()
538 lp->reset_in_progress = reset; in axienet_stats_update()
542 lp->hw_stat_base[stat] += counter - lp->hw_last_counter[stat]; in axienet_stats_update()
543 lp->hw_last_counter[stat] = counter; in axienet_stats_update()
545 write_seqcount_end(&lp->hw_stats_seqcount); in axienet_stats_update()
553 mutex_lock(&lp->stats_lock); in axienet_refresh_stats()
555 mutex_unlock(&lp->stats_lock); in axienet_refresh_stats()
558 schedule_delayed_work(&lp->stats_work, 13 * HZ); in axienet_refresh_stats()
567 mutex_lock(&lp->stats_lock); in __axienet_device_reset()
568 if (lp->features & XAE_FEATURE_STATS) in __axienet_device_reset()
571 /* Reset Axi DMA. This would reset Axi Ethernet core as well. The reset in __axienet_device_reset()
572 * process of Axi DMA takes a while to complete as all pending in __axienet_device_reset()
584 dev_err(lp->dev, "%s: DMA reset timeout!\n", __func__); in __axienet_device_reset()
594 dev_err(lp->dev, "%s: timeout waiting for PhyRstCmplt\n", __func__); in __axienet_device_reset()
599 if (lp->features & XAE_FEATURE_STATS) { in __axienet_device_reset()
602 write_seqcount_begin(&lp->hw_stats_seqcount); in __axienet_device_reset()
603 lp->reset_in_progress = false; in __axienet_device_reset()
608 lp->hw_stat_base[stat] += in __axienet_device_reset()
609 lp->hw_last_counter[stat] - counter; in __axienet_device_reset()
610 lp->hw_last_counter[stat] = counter; in __axienet_device_reset()
612 write_seqcount_end(&lp->hw_stats_seqcount); in __axienet_device_reset()
616 mutex_unlock(&lp->stats_lock); in __axienet_device_reset()
621 * axienet_dma_stop - Stop DMA operation
632 synchronize_irq(lp->rx_irq); in axienet_dma_stop()
637 synchronize_irq(lp->tx_irq); in axienet_dma_stop()
659 * axienet_device_reset - Reset and initialize the Axi Ethernet hardware.
662 * This function is called to reset and initialize the Axi Ethernet core. This
663 * is typically called during initialization. It does a reset of the Axi DMA
664 * Rx/Tx channels and initializes the Axi DMA BDs. Since Axi DMA reset lines
665 * are connected to Axi Ethernet reset lines, this in turn resets the Axi
666 * Ethernet core. No separate hardware reset is done for the Axi Ethernet
676 lp->max_frm_size = XAE_MAX_VLAN_FRAME_SIZE; in axienet_device_reset()
677 lp->options |= XAE_OPTION_VLAN; in axienet_device_reset()
678 lp->options &= (~XAE_OPTION_JUMBO); in axienet_device_reset()
680 if (ndev->mtu > XAE_MTU && ndev->mtu <= XAE_JUMBO_MTU) { in axienet_device_reset()
681 lp->max_frm_size = ndev->mtu + VLAN_ETH_HLEN + in axienet_device_reset()
684 if (lp->max_frm_size <= lp->rxmem) in axienet_device_reset()
685 lp->options |= XAE_OPTION_JUMBO; in axienet_device_reset()
688 if (!lp->use_dmaengine) { in axienet_device_reset()
708 axienet_iow(lp, XAE_IE_OFFSET, lp->eth_irq > 0 ? in axienet_device_reset()
716 axienet_setoptions(ndev, lp->options & in axienet_device_reset()
720 axienet_setoptions(ndev, lp->options); in axienet_device_reset()
728 * axienet_free_tx_chain - Clean up a series of linked TX descriptors.
734 * in all cleaned-up descriptors. Ignored if NULL.
750 cur_p = &lp->tx_bd_v[(first_bd + i) % lp->tx_bd_num]; in axienet_free_tx_chain()
751 status = cur_p->status; in axienet_free_tx_chain()
762 dma_unmap_single(lp->dev, phys, in axienet_free_tx_chain()
763 (cur_p->cntrl & XAXIDMA_BD_CTRL_LENGTH_MASK), in axienet_free_tx_chain()
766 if (cur_p->skb && (status & XAXIDMA_BD_STS_COMPLETE_MASK)) { in axienet_free_tx_chain()
767 napi_consume_skb(cur_p->skb, budget); in axienet_free_tx_chain()
771 cur_p->app0 = 0; in axienet_free_tx_chain()
772 cur_p->app1 = 0; in axienet_free_tx_chain()
773 cur_p->app2 = 0; in axienet_free_tx_chain()
774 cur_p->app4 = 0; in axienet_free_tx_chain()
775 cur_p->skb = NULL; in axienet_free_tx_chain()
778 cur_p->cntrl = 0; in axienet_free_tx_chain()
779 cur_p->status = 0; in axienet_free_tx_chain()
786 lp->tx_bd_ci += i; in axienet_free_tx_chain()
787 if (lp->tx_bd_ci >= lp->tx_bd_num) in axienet_free_tx_chain()
788 lp->tx_bd_ci %= lp->tx_bd_num; in axienet_free_tx_chain()
795 * axienet_check_tx_bd_space - Checks if a BD/group of BDs are currently busy
814 cur_p = &lp->tx_bd_v[(READ_ONCE(lp->tx_bd_tail) + num_frag) % in axienet_check_tx_bd_space()
815 lp->tx_bd_num]; in axienet_check_tx_bd_space()
816 if (cur_p->cntrl) in axienet_check_tx_bd_space()
822 * axienet_dma_tx_cb - DMA engine callback for TX channel.
835 skbuf_dma = axienet_get_tx_desc(lp, lp->tx_ring_tail++); in axienet_dma_tx_cb()
836 len = skbuf_dma->skb->len; in axienet_dma_tx_cb()
837 txq = skb_get_tx_queue(lp->ndev, skbuf_dma->skb); in axienet_dma_tx_cb()
838 u64_stats_update_begin(&lp->tx_stat_sync); in axienet_dma_tx_cb()
839 u64_stats_add(&lp->tx_bytes, len); in axienet_dma_tx_cb()
840 u64_stats_add(&lp->tx_packets, 1); in axienet_dma_tx_cb()
841 u64_stats_update_end(&lp->tx_stat_sync); in axienet_dma_tx_cb()
842 dma_unmap_sg(lp->dev, skbuf_dma->sgl, skbuf_dma->sg_len, DMA_TO_DEVICE); in axienet_dma_tx_cb()
843 dev_consume_skb_any(skbuf_dma->skb); in axienet_dma_tx_cb()
844 netif_txq_completed_wake(txq, 1, len, in axienet_dma_tx_cb()
845 CIRC_SPACE(lp->tx_ring_head, lp->tx_ring_tail, TX_BD_NUM_MAX), in axienet_dma_tx_cb()
850 * axienet_start_xmit_dmaengine - Starts the transmission.
862 * it populates AXI Stream Control fields with appropriate values.
878 dma_dev = lp->tx_chan->device; in axienet_start_xmit_dmaengine()
879 sg_len = skb_shinfo(skb)->nr_frags + 1; in axienet_start_xmit_dmaengine()
880 if (CIRC_SPACE(lp->tx_ring_head, lp->tx_ring_tail, TX_BD_NUM_MAX) <= sg_len) { in axienet_start_xmit_dmaengine()
887 skbuf_dma = axienet_get_tx_desc(lp, lp->tx_ring_head); in axienet_start_xmit_dmaengine()
891 lp->tx_ring_head++; in axienet_start_xmit_dmaengine()
892 sg_init_table(skbuf_dma->sgl, sg_len); in axienet_start_xmit_dmaengine()
893 ret = skb_to_sgvec(skb, skbuf_dma->sgl, 0, skb->len); in axienet_start_xmit_dmaengine()
897 ret = dma_map_sg(lp->dev, skbuf_dma->sgl, sg_len, DMA_TO_DEVICE); in axienet_start_xmit_dmaengine()
902 if (skb->ip_summed == CHECKSUM_PARTIAL) { in axienet_start_xmit_dmaengine()
903 if (lp->features & XAE_FEATURE_FULL_TX_CSUM) { in axienet_start_xmit_dmaengine()
906 } else if (lp->features & XAE_FEATURE_PARTIAL_TX_CSUM) { in axienet_start_xmit_dmaengine()
908 csum_index_off = csum_start_off + skb->csum_offset; in axienet_start_xmit_dmaengine()
910 app_metadata[0] |= 1; in axienet_start_xmit_dmaengine()
911 app_metadata[1] = (csum_start_off << 16) | csum_index_off; in axienet_start_xmit_dmaengine()
913 } else if (skb->ip_summed == CHECKSUM_UNNECESSARY) { in axienet_start_xmit_dmaengine()
917 dma_tx_desc = dma_dev->device_prep_slave_sg(lp->tx_chan, skbuf_dma->sgl, in axienet_start_xmit_dmaengine()
923 skbuf_dma->skb = skb; in axienet_start_xmit_dmaengine()
924 skbuf_dma->sg_len = sg_len; in axienet_start_xmit_dmaengine()
925 dma_tx_desc->callback_param = lp; in axienet_start_xmit_dmaengine()
926 dma_tx_desc->callback_result = axienet_dma_tx_cb; in axienet_start_xmit_dmaengine()
927 txq = skb_get_tx_queue(lp->ndev, skb); in axienet_start_xmit_dmaengine()
928 netdev_tx_sent_queue(txq, skb->len); in axienet_start_xmit_dmaengine()
929 netif_txq_maybe_stop(txq, CIRC_SPACE(lp->tx_ring_head, lp->tx_ring_tail, TX_BD_NUM_MAX), in axienet_start_xmit_dmaengine()
930 MAX_SKB_FRAGS + 1, 2 * MAX_SKB_FRAGS); in axienet_start_xmit_dmaengine()
933 dma_async_issue_pending(lp->tx_chan); in axienet_start_xmit_dmaengine()
937 dma_unmap_sg(lp->dev, skbuf_dma->sgl, sg_len, DMA_TO_DEVICE); in axienet_start_xmit_dmaengine()
944 * axienet_tx_poll - Invoked once a transmit is completed by the
945 * Axi DMA Tx channel.
960 struct net_device *ndev = lp->ndev; in axienet_tx_poll()
964 packets = axienet_free_tx_chain(lp, lp->tx_bd_ci, lp->tx_bd_num, false, in axienet_tx_poll()
968 u64_stats_update_begin(&lp->tx_stat_sync); in axienet_tx_poll()
969 u64_stats_add(&lp->tx_packets, packets); in axienet_tx_poll()
970 u64_stats_add(&lp->tx_bytes, size); in axienet_tx_poll()
971 u64_stats_update_end(&lp->tx_stat_sync); in axienet_tx_poll()
976 if (!axienet_check_tx_bd_space(lp, MAX_SKB_FRAGS + 1)) in axienet_tx_poll()
981 /* Re-enable TX completion interrupts. This should in axienet_tx_poll()
985 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, lp->tx_dma_cr); in axienet_tx_poll()
991 * axienet_start_xmit - Starts the transmission.
1001 * it populates AXI Stream Control fields with appropriate values.
1016 orig_tail_ptr = lp->tx_bd_tail; in axienet_start_xmit()
1019 num_frag = skb_shinfo(skb)->nr_frags; in axienet_start_xmit()
1020 cur_p = &lp->tx_bd_v[orig_tail_ptr]; in axienet_start_xmit()
1022 if (axienet_check_tx_bd_space(lp, num_frag + 1)) { in axienet_start_xmit()
1033 if (skb->ip_summed == CHECKSUM_PARTIAL) { in axienet_start_xmit()
1034 if (lp->features & XAE_FEATURE_FULL_TX_CSUM) { in axienet_start_xmit()
1036 cur_p->app0 |= 2; in axienet_start_xmit()
1037 } else if (lp->features & XAE_FEATURE_PARTIAL_TX_CSUM) { in axienet_start_xmit()
1039 csum_index_off = csum_start_off + skb->csum_offset; in axienet_start_xmit()
1041 cur_p->app0 |= 1; in axienet_start_xmit()
1042 cur_p->app1 = (csum_start_off << 16) | csum_index_off; in axienet_start_xmit()
1044 } else if (skb->ip_summed == CHECKSUM_UNNECESSARY) { in axienet_start_xmit()
1045 cur_p->app0 |= 2; /* Tx Full Checksum Offload Enabled */ in axienet_start_xmit()
1048 phys = dma_map_single(lp->dev, skb->data, in axienet_start_xmit()
1050 if (unlikely(dma_mapping_error(lp->dev, phys))) { in axienet_start_xmit()
1053 ndev->stats.tx_dropped++; in axienet_start_xmit()
1058 cur_p->cntrl = skb_headlen(skb) | XAXIDMA_BD_CTRL_TXSOF_MASK; in axienet_start_xmit()
1061 if (++new_tail_ptr >= lp->tx_bd_num) in axienet_start_xmit()
1063 cur_p = &lp->tx_bd_v[new_tail_ptr]; in axienet_start_xmit()
1064 frag = &skb_shinfo(skb)->frags[ii]; in axienet_start_xmit()
1065 phys = dma_map_single(lp->dev, in axienet_start_xmit()
1069 if (unlikely(dma_mapping_error(lp->dev, phys))) { in axienet_start_xmit()
1072 ndev->stats.tx_dropped++; in axienet_start_xmit()
1073 axienet_free_tx_chain(lp, orig_tail_ptr, ii + 1, in axienet_start_xmit()
1079 cur_p->cntrl = skb_frag_size(frag); in axienet_start_xmit()
1082 cur_p->cntrl |= XAXIDMA_BD_CTRL_TXEOF_MASK; in axienet_start_xmit()
1083 cur_p->skb = skb; in axienet_start_xmit()
1085 tail_p = lp->tx_bd_p + sizeof(*lp->tx_bd_v) * new_tail_ptr; in axienet_start_xmit()
1086 if (++new_tail_ptr >= lp->tx_bd_num) in axienet_start_xmit()
1088 WRITE_ONCE(lp->tx_bd_tail, new_tail_ptr); in axienet_start_xmit()
1094 if (axienet_check_tx_bd_space(lp, MAX_SKB_FRAGS + 1)) { in axienet_start_xmit()
1100 /* Space might have just been freed - check again */ in axienet_start_xmit()
1101 if (!axienet_check_tx_bd_space(lp, MAX_SKB_FRAGS + 1)) in axienet_start_xmit()
1109 * axienet_dma_rx_cb - DMA engine callback for RX channel.
1123 skbuf_dma = axienet_get_rx_desc(lp, lp->rx_ring_tail++); in axienet_dma_rx_cb()
1124 skb = skbuf_dma->skb; in axienet_dma_rx_cb()
1125 app_metadata = dmaengine_desc_get_metadata_ptr(skbuf_dma->desc, &meta_len, in axienet_dma_rx_cb()
1127 dma_unmap_single(lp->dev, skbuf_dma->dma_address, lp->max_frm_size, in axienet_dma_rx_cb()
1132 skb->protocol = eth_type_trans(skb, lp->ndev); in axienet_dma_rx_cb()
1133 skb->ip_summed = CHECKSUM_NONE; in axienet_dma_rx_cb()
1136 u64_stats_update_begin(&lp->rx_stat_sync); in axienet_dma_rx_cb()
1137 u64_stats_add(&lp->rx_packets, 1); in axienet_dma_rx_cb()
1138 u64_stats_add(&lp->rx_bytes, rx_len); in axienet_dma_rx_cb()
1139 u64_stats_update_end(&lp->rx_stat_sync); in axienet_dma_rx_cb()
1140 axienet_rx_submit_desc(lp->ndev); in axienet_dma_rx_cb()
1141 dma_async_issue_pending(lp->rx_chan); in axienet_dma_rx_cb()
1145 * axienet_rx_poll - Triggered by RX ISR to complete the BD processing.
1162 cur_p = &lp->rx_bd_v[lp->rx_bd_ci]; in axienet_rx_poll()
1164 while (packets < budget && (cur_p->status & XAXIDMA_BD_STS_COMPLETE_MASK)) { in axienet_rx_poll()
1170 skb = cur_p->skb; in axienet_rx_poll()
1171 cur_p->skb = NULL; in axienet_rx_poll()
1179 length = cur_p->app4 & 0x0000FFFF; in axienet_rx_poll()
1182 dma_unmap_single(lp->dev, phys, lp->max_frm_size, in axienet_rx_poll()
1186 skb->protocol = eth_type_trans(skb, lp->ndev); in axienet_rx_poll()
1188 skb->ip_summed = CHECKSUM_NONE; in axienet_rx_poll()
1191 if (lp->features & XAE_FEATURE_FULL_RX_CSUM) { in axienet_rx_poll()
1192 csumstatus = (cur_p->app2 & in axienet_rx_poll()
1196 skb->ip_summed = CHECKSUM_UNNECESSARY; in axienet_rx_poll()
1198 } else if (lp->features & XAE_FEATURE_PARTIAL_RX_CSUM) { in axienet_rx_poll()
1199 skb->csum = be32_to_cpu(cur_p->app3 & 0xFFFF); in axienet_rx_poll()
1200 skb->ip_summed = CHECKSUM_COMPLETE; in axienet_rx_poll()
1209 new_skb = napi_alloc_skb(napi, lp->max_frm_size); in axienet_rx_poll()
1213 phys = dma_map_single(lp->dev, new_skb->data, in axienet_rx_poll()
1214 lp->max_frm_size, in axienet_rx_poll()
1216 if (unlikely(dma_mapping_error(lp->dev, phys))) { in axienet_rx_poll()
1218 netdev_err(lp->ndev, "RX DMA mapping error\n"); in axienet_rx_poll()
1224 cur_p->cntrl = lp->max_frm_size; in axienet_rx_poll()
1225 cur_p->status = 0; in axienet_rx_poll()
1226 cur_p->skb = new_skb; in axienet_rx_poll()
1231 tail_p = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * lp->rx_bd_ci; in axienet_rx_poll()
1233 if (++lp->rx_bd_ci >= lp->rx_bd_num) in axienet_rx_poll()
1234 lp->rx_bd_ci = 0; in axienet_rx_poll()
1235 cur_p = &lp->rx_bd_v[lp->rx_bd_ci]; in axienet_rx_poll()
1238 u64_stats_update_begin(&lp->rx_stat_sync); in axienet_rx_poll()
1239 u64_stats_add(&lp->rx_packets, packets); in axienet_rx_poll()
1240 u64_stats_add(&lp->rx_bytes, size); in axienet_rx_poll()
1241 u64_stats_update_end(&lp->rx_stat_sync); in axienet_rx_poll()
1247 /* Re-enable RX completion interrupts. This should in axienet_rx_poll()
1251 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, lp->rx_dma_cr); in axienet_rx_poll()
1257 * axienet_tx_irq - Tx Done Isr.
1263 * This is the Axi DMA Tx done Isr. It invokes NAPI polling to complete the
1282 (lp->tx_bd_v[lp->tx_bd_ci]).phys_msb, in axienet_tx_irq()
1283 (lp->tx_bd_v[lp->tx_bd_ci]).phys); in axienet_tx_irq()
1284 schedule_work(&lp->dma_err_task); in axienet_tx_irq()
1289 u32 cr = lp->tx_dma_cr; in axienet_tx_irq()
1292 if (napi_schedule_prep(&lp->napi_tx)) { in axienet_tx_irq()
1294 __napi_schedule(&lp->napi_tx); in axienet_tx_irq()
1302 * axienet_rx_irq - Rx Isr.
1308 * This is the Axi DMA Rx Isr. It invokes NAPI polling to complete the RX BD
1327 (lp->rx_bd_v[lp->rx_bd_ci]).phys_msb, in axienet_rx_irq()
1328 (lp->rx_bd_v[lp->rx_bd_ci]).phys); in axienet_rx_irq()
1329 schedule_work(&lp->dma_err_task); in axienet_rx_irq()
1334 u32 cr = lp->rx_dma_cr; in axienet_rx_irq()
1337 if (napi_schedule_prep(&lp->napi_rx)) { in axienet_rx_irq()
1339 __napi_schedule(&lp->napi_rx); in axienet_rx_irq()
1347 * axienet_eth_irq - Ethernet core Isr.
1353 * Handle miscellaneous conditions indicated by Ethernet core IRQ.
1366 ndev->stats.rx_missed_errors++; in axienet_eth_irq()
1369 ndev->stats.rx_dropped++; in axienet_eth_irq()
1378 * axienet_rx_submit_desc - Submit the rx descriptors to dmaengine.
1393 skbuf_dma = axienet_get_rx_desc(lp, lp->rx_ring_head); in axienet_rx_submit_desc()
1397 lp->rx_ring_head++; in axienet_rx_submit_desc()
1398 skb = netdev_alloc_skb(ndev, lp->max_frm_size); in axienet_rx_submit_desc()
1402 sg_init_table(skbuf_dma->sgl, 1); in axienet_rx_submit_desc()
1403 addr = dma_map_single(lp->dev, skb->data, lp->max_frm_size, DMA_FROM_DEVICE); in axienet_rx_submit_desc()
1404 if (unlikely(dma_mapping_error(lp->dev, addr))) { in axienet_rx_submit_desc()
1409 sg_dma_address(skbuf_dma->sgl) = addr; in axienet_rx_submit_desc()
1410 sg_dma_len(skbuf_dma->sgl) = lp->max_frm_size; in axienet_rx_submit_desc()
1411 dma_rx_desc = dmaengine_prep_slave_sg(lp->rx_chan, skbuf_dma->sgl, in axienet_rx_submit_desc()
1412 1, DMA_DEV_TO_MEM, in axienet_rx_submit_desc()
1417 skbuf_dma->skb = skb; in axienet_rx_submit_desc()
1418 skbuf_dma->dma_address = sg_dma_address(skbuf_dma->sgl); in axienet_rx_submit_desc()
1419 skbuf_dma->desc = dma_rx_desc; in axienet_rx_submit_desc()
1420 dma_rx_desc->callback_param = lp; in axienet_rx_submit_desc()
1421 dma_rx_desc->callback_result = axienet_dma_rx_cb; in axienet_rx_submit_desc()
1427 dma_unmap_single(lp->dev, addr, lp->max_frm_size, DMA_FROM_DEVICE); in axienet_rx_submit_desc()
1433 * axienet_init_dmaengine - init the dmaengine code.
1437 * non-zero error value on failure
1447 lp->tx_chan = dma_request_chan(lp->dev, "tx_chan0"); in axienet_init_dmaengine()
1448 if (IS_ERR(lp->tx_chan)) { in axienet_init_dmaengine()
1449 dev_err(lp->dev, "No Ethernet DMA (TX) channel found\n"); in axienet_init_dmaengine()
1450 return PTR_ERR(lp->tx_chan); in axienet_init_dmaengine()
1453 lp->rx_chan = dma_request_chan(lp->dev, "rx_chan0"); in axienet_init_dmaengine()
1454 if (IS_ERR(lp->rx_chan)) { in axienet_init_dmaengine()
1455 ret = PTR_ERR(lp->rx_chan); in axienet_init_dmaengine()
1456 dev_err(lp->dev, "No Ethernet DMA (RX) channel found\n"); in axienet_init_dmaengine()
1460 lp->tx_ring_tail = 0; in axienet_init_dmaengine()
1461 lp->tx_ring_head = 0; in axienet_init_dmaengine()
1462 lp->rx_ring_tail = 0; in axienet_init_dmaengine()
1463 lp->rx_ring_head = 0; in axienet_init_dmaengine()
1464 lp->tx_skb_ring = kcalloc(TX_BD_NUM_MAX, sizeof(*lp->tx_skb_ring), in axienet_init_dmaengine()
1466 if (!lp->tx_skb_ring) { in axienet_init_dmaengine()
1467 ret = -ENOMEM; in axienet_init_dmaengine()
1473 ret = -ENOMEM; in axienet_init_dmaengine()
1476 lp->tx_skb_ring[i] = skbuf_dma; in axienet_init_dmaengine()
1479 lp->rx_skb_ring = kcalloc(RX_BUF_NUM_DEFAULT, sizeof(*lp->rx_skb_ring), in axienet_init_dmaengine()
1481 if (!lp->rx_skb_ring) { in axienet_init_dmaengine()
1482 ret = -ENOMEM; in axienet_init_dmaengine()
1488 ret = -ENOMEM; in axienet_init_dmaengine()
1491 lp->rx_skb_ring[i] = skbuf_dma; in axienet_init_dmaengine()
1496 dma_async_issue_pending(lp->rx_chan); in axienet_init_dmaengine()
1502 kfree(lp->rx_skb_ring[i]); in axienet_init_dmaengine()
1503 kfree(lp->rx_skb_ring); in axienet_init_dmaengine()
1506 kfree(lp->tx_skb_ring[i]); in axienet_init_dmaengine()
1507 kfree(lp->tx_skb_ring); in axienet_init_dmaengine()
1509 dma_release_channel(lp->rx_chan); in axienet_init_dmaengine()
1511 dma_release_channel(lp->tx_chan); in axienet_init_dmaengine()
1516 * axienet_init_legacy_dma - init the dma legacy code.
1520 * non-zero error value on failure
1531 /* Enable worker thread for Axi DMA error handling */ in axienet_init_legacy_dma()
1532 lp->stopping = false; in axienet_init_legacy_dma()
1533 INIT_WORK(&lp->dma_err_task, axienet_dma_err_handler); in axienet_init_legacy_dma()
1535 napi_enable(&lp->napi_rx); in axienet_init_legacy_dma()
1536 napi_enable(&lp->napi_tx); in axienet_init_legacy_dma()
1538 /* Enable interrupts for Axi DMA Tx */ in axienet_init_legacy_dma()
1539 ret = request_irq(lp->tx_irq, axienet_tx_irq, IRQF_SHARED, in axienet_init_legacy_dma()
1540 ndev->name, ndev); in axienet_init_legacy_dma()
1543 /* Enable interrupts for Axi DMA Rx */ in axienet_init_legacy_dma()
1544 ret = request_irq(lp->rx_irq, axienet_rx_irq, IRQF_SHARED, in axienet_init_legacy_dma()
1545 ndev->name, ndev); in axienet_init_legacy_dma()
1548 /* Enable interrupts for Axi Ethernet core (if defined) */ in axienet_init_legacy_dma()
1549 if (lp->eth_irq > 0) { in axienet_init_legacy_dma()
1550 ret = request_irq(lp->eth_irq, axienet_eth_irq, IRQF_SHARED, in axienet_init_legacy_dma()
1551 ndev->name, ndev); in axienet_init_legacy_dma()
1559 free_irq(lp->rx_irq, ndev); in axienet_init_legacy_dma()
1561 free_irq(lp->tx_irq, ndev); in axienet_init_legacy_dma()
1563 napi_disable(&lp->napi_tx); in axienet_init_legacy_dma()
1564 napi_disable(&lp->napi_rx); in axienet_init_legacy_dma()
1565 cancel_work_sync(&lp->dma_err_task); in axienet_init_legacy_dma()
1566 dev_err(lp->dev, "request_irq() failed\n"); in axienet_init_legacy_dma()
1571 * axienet_open - Driver open routine.
1575 * non-zero error value on failure
1580 * and ISR handling. Axi Ethernet core is reset through Axi DMA core. Buffer
1588 /* When we do an Axi Ethernet reset, it resets the complete core in axienet_open()
1596 ret = phylink_of_phy_connect(lp->phylink, lp->dev->of_node, 0); in axienet_open()
1598 dev_err(lp->dev, "phylink_of_phy_connect() failed: %d\n", ret); in axienet_open()
1602 phylink_start(lp->phylink); in axienet_open()
1605 schedule_delayed_work(&lp->stats_work, 0); in axienet_open()
1607 if (lp->use_dmaengine) { in axienet_open()
1608 /* Enable interrupts for Axi Ethernet core (if defined) */ in axienet_open()
1609 if (lp->eth_irq > 0) { in axienet_open()
1610 ret = request_irq(lp->eth_irq, axienet_eth_irq, IRQF_SHARED, in axienet_open()
1611 ndev->name, ndev); in axienet_open()
1628 if (lp->eth_irq > 0) in axienet_open()
1629 free_irq(lp->eth_irq, ndev); in axienet_open()
1631 cancel_delayed_work_sync(&lp->stats_work); in axienet_open()
1632 phylink_stop(lp->phylink); in axienet_open()
1633 phylink_disconnect_phy(lp->phylink); in axienet_open()
1638 * axienet_stop - Driver stop routine.
1645 * The Axi DMA Tx/Rx BDs are released.
1652 if (!lp->use_dmaengine) { in axienet_stop()
1653 WRITE_ONCE(lp->stopping, true); in axienet_stop()
1654 flush_work(&lp->dma_err_task); in axienet_stop()
1656 napi_disable(&lp->napi_tx); in axienet_stop()
1657 napi_disable(&lp->napi_rx); in axienet_stop()
1660 cancel_delayed_work_sync(&lp->stats_work); in axienet_stop()
1662 phylink_stop(lp->phylink); in axienet_stop()
1663 phylink_disconnect_phy(lp->phylink); in axienet_stop()
1665 axienet_setoptions(ndev, lp->options & in axienet_stop()
1668 if (!lp->use_dmaengine) { in axienet_stop()
1670 cancel_work_sync(&lp->dma_err_task); in axienet_stop()
1671 free_irq(lp->tx_irq, ndev); in axienet_stop()
1672 free_irq(lp->rx_irq, ndev); in axienet_stop()
1675 dmaengine_terminate_sync(lp->tx_chan); in axienet_stop()
1676 dmaengine_synchronize(lp->tx_chan); in axienet_stop()
1677 dmaengine_terminate_sync(lp->rx_chan); in axienet_stop()
1678 dmaengine_synchronize(lp->rx_chan); in axienet_stop()
1681 kfree(lp->tx_skb_ring[i]); in axienet_stop()
1682 kfree(lp->tx_skb_ring); in axienet_stop()
1684 kfree(lp->rx_skb_ring[i]); in axienet_stop()
1685 kfree(lp->rx_skb_ring); in axienet_stop()
1687 dma_release_channel(lp->rx_chan); in axienet_stop()
1688 dma_release_channel(lp->tx_chan); in axienet_stop()
1693 if (lp->eth_irq > 0) in axienet_stop()
1694 free_irq(lp->eth_irq, ndev); in axienet_stop()
1699 * axienet_change_mtu - Driver change mtu routine.
1705 * This is the change mtu driver routine. It checks if the Axi Ethernet
1714 return -EBUSY; in axienet_change_mtu()
1717 XAE_TRL_SIZE) > lp->rxmem) in axienet_change_mtu()
1718 return -EINVAL; in axienet_change_mtu()
1720 WRITE_ONCE(ndev->mtu, new_mtu); in axienet_change_mtu()
1727 * axienet_poll_controller - Axi Ethernet poll mechanism.
1737 disable_irq(lp->tx_irq); in axienet_poll_controller()
1738 disable_irq(lp->rx_irq); in axienet_poll_controller()
1739 axienet_rx_irq(lp->tx_irq, ndev); in axienet_poll_controller()
1740 axienet_tx_irq(lp->rx_irq, ndev); in axienet_poll_controller()
1741 enable_irq(lp->tx_irq); in axienet_poll_controller()
1742 enable_irq(lp->rx_irq); in axienet_poll_controller()
1751 return -EINVAL; in axienet_ioctl()
1753 return phylink_mii_ioctl(lp->phylink, rq, cmd); in axienet_ioctl()
1762 netdev_stats_to_stats64(stats, &dev->stats); in axienet_get_stats64()
1765 start = u64_stats_fetch_begin(&lp->rx_stat_sync); in axienet_get_stats64()
1766 stats->rx_packets = u64_stats_read(&lp->rx_packets); in axienet_get_stats64()
1767 stats->rx_bytes = u64_stats_read(&lp->rx_bytes); in axienet_get_stats64()
1768 } while (u64_stats_fetch_retry(&lp->rx_stat_sync, start)); in axienet_get_stats64()
1771 start = u64_stats_fetch_begin(&lp->tx_stat_sync); in axienet_get_stats64()
1772 stats->tx_packets = u64_stats_read(&lp->tx_packets); in axienet_get_stats64()
1773 stats->tx_bytes = u64_stats_read(&lp->tx_bytes); in axienet_get_stats64()
1774 } while (u64_stats_fetch_retry(&lp->tx_stat_sync, start)); in axienet_get_stats64()
1776 if (!(lp->features & XAE_FEATURE_STATS)) in axienet_get_stats64()
1780 start = read_seqcount_begin(&lp->hw_stats_seqcount); in axienet_get_stats64()
1781 stats->rx_length_errors = in axienet_get_stats64()
1783 stats->rx_crc_errors = axienet_stat(lp, STAT_RX_FCS_ERRORS); in axienet_get_stats64()
1784 stats->rx_frame_errors = in axienet_get_stats64()
1786 stats->rx_errors = axienet_stat(lp, STAT_UNDERSIZE_FRAMES) + in axienet_get_stats64()
1788 stats->rx_length_errors + in axienet_get_stats64()
1789 stats->rx_crc_errors + in axienet_get_stats64()
1790 stats->rx_frame_errors; in axienet_get_stats64()
1791 stats->multicast = axienet_stat(lp, STAT_RX_MULTICAST_FRAMES); in axienet_get_stats64()
1793 stats->tx_aborted_errors = in axienet_get_stats64()
1795 stats->tx_fifo_errors = in axienet_get_stats64()
1797 stats->tx_window_errors = in axienet_get_stats64()
1799 stats->tx_errors = axienet_stat(lp, STAT_TX_EXCESS_DEFERRAL) + in axienet_get_stats64()
1800 stats->tx_aborted_errors + in axienet_get_stats64()
1801 stats->tx_fifo_errors + in axienet_get_stats64()
1802 stats->tx_window_errors; in axienet_get_stats64()
1803 } while (read_seqcount_retry(&lp->hw_stats_seqcount, start)); in axienet_get_stats64()
1834 * axienet_ethtools_get_drvinfo - Get various Axi Ethernet driver information.
1839 * Issue "ethtool -i ethX" under linux prompt to execute this function.
1844 strscpy(ed->driver, DRIVER_NAME, sizeof(ed->driver)); in axienet_ethtools_get_drvinfo()
1845 strscpy(ed->version, DRIVER_VERSION, sizeof(ed->version)); in axienet_ethtools_get_drvinfo()
1849 * axienet_ethtools_get_regs_len - Get the total regs length present in the
1864 * axienet_ethtools_get_regs - Dump the contents of all registers present
1870 * This implements ethtool command for getting the Axi Ethernet register dump.
1871 * Issue "ethtool -d ethX" to execute this function.
1880 regs->version = 0; in axienet_ethtools_get_regs()
1881 regs->len = len; in axienet_ethtools_get_regs()
1885 data[1] = axienet_ior(lp, XAE_TPF_OFFSET); in axienet_ethtools_get_regs()
1912 if (!lp->use_dmaengine) { in axienet_ethtools_get_regs()
1932 ering->rx_max_pending = RX_BD_NUM_MAX; in axienet_ethtools_get_ringparam()
1933 ering->rx_mini_max_pending = 0; in axienet_ethtools_get_ringparam()
1934 ering->rx_jumbo_max_pending = 0; in axienet_ethtools_get_ringparam()
1935 ering->tx_max_pending = TX_BD_NUM_MAX; in axienet_ethtools_get_ringparam()
1936 ering->rx_pending = lp->rx_bd_num; in axienet_ethtools_get_ringparam()
1937 ering->rx_mini_pending = 0; in axienet_ethtools_get_ringparam()
1938 ering->rx_jumbo_pending = 0; in axienet_ethtools_get_ringparam()
1939 ering->tx_pending = lp->tx_bd_num; in axienet_ethtools_get_ringparam()
1950 if (ering->rx_pending > RX_BD_NUM_MAX || in axienet_ethtools_set_ringparam()
1951 ering->rx_mini_pending || in axienet_ethtools_set_ringparam()
1952 ering->rx_jumbo_pending || in axienet_ethtools_set_ringparam()
1953 ering->tx_pending < TX_BD_NUM_MIN || in axienet_ethtools_set_ringparam()
1954 ering->tx_pending > TX_BD_NUM_MAX) in axienet_ethtools_set_ringparam()
1955 return -EINVAL; in axienet_ethtools_set_ringparam()
1958 return -EBUSY; in axienet_ethtools_set_ringparam()
1960 lp->rx_bd_num = ering->rx_pending; in axienet_ethtools_set_ringparam()
1961 lp->tx_bd_num = ering->tx_pending; in axienet_ethtools_set_ringparam()
1966 * axienet_ethtools_get_pauseparam - Get the pause parameter setting for
1971 * This implements ethtool command for getting axi ethernet pause frame
1972 * setting. Issue "ethtool -a ethX" to execute this function.
1980 phylink_ethtool_get_pauseparam(lp->phylink, epauseparm); in axienet_ethtools_get_pauseparam()
1984 * axienet_ethtools_set_pauseparam - Set device pause parameter(flow control)
1990 * paths. Issue "ethtool -A ethX tx on|off" under linux prompt to execute this
1993 * Return: 0 on success, -EFAULT if device is running
2001 return phylink_ethtool_set_pauseparam(lp->phylink, epauseparm); in axienet_ethtools_set_pauseparam()
2005 * axienet_ethtools_get_coalesce - Get DMA interrupt coalescing count.
2012 * count on Tx and Rx paths. Issue "ethtool -c ethX" under linux prompt to
2025 ecoalesce->rx_max_coalesced_frames = lp->coalesce_count_rx; in axienet_ethtools_get_coalesce()
2026 ecoalesce->rx_coalesce_usecs = lp->coalesce_usec_rx; in axienet_ethtools_get_coalesce()
2027 ecoalesce->tx_max_coalesced_frames = lp->coalesce_count_tx; in axienet_ethtools_get_coalesce()
2028 ecoalesce->tx_coalesce_usecs = lp->coalesce_usec_tx; in axienet_ethtools_get_coalesce()
2033 * axienet_ethtools_set_coalesce - Set DMA interrupt coalescing count.
2040 * count on Tx and Rx paths. Issue "ethtool -C ethX rx-frames 5" under linux
2043 * Return: 0, on success, Non-zero error value on failure.
2056 return -EBUSY; in axienet_ethtools_set_coalesce()
2059 if (ecoalesce->rx_max_coalesced_frames) in axienet_ethtools_set_coalesce()
2060 lp->coalesce_count_rx = ecoalesce->rx_max_coalesced_frames; in axienet_ethtools_set_coalesce()
2061 if (ecoalesce->rx_coalesce_usecs) in axienet_ethtools_set_coalesce()
2062 lp->coalesce_usec_rx = ecoalesce->rx_coalesce_usecs; in axienet_ethtools_set_coalesce()
2063 if (ecoalesce->tx_max_coalesced_frames) in axienet_ethtools_set_coalesce()
2064 lp->coalesce_count_tx = ecoalesce->tx_max_coalesced_frames; in axienet_ethtools_set_coalesce()
2065 if (ecoalesce->tx_coalesce_usecs) in axienet_ethtools_set_coalesce()
2066 lp->coalesce_usec_tx = ecoalesce->tx_coalesce_usecs; in axienet_ethtools_set_coalesce()
2077 return phylink_ethtool_ksettings_get(lp->phylink, cmd); in axienet_ethtools_get_link_ksettings()
2086 return phylink_ethtool_ksettings_set(lp->phylink, cmd); in axienet_ethtools_set_link_ksettings()
2093 return phylink_ethtool_nway_reset(lp->phylink); in axienet_ethtools_nway_reset()
2104 start = read_seqcount_begin(&lp->hw_stats_seqcount); in axienet_ethtools_get_ethtool_stats()
2106 data[1] = axienet_stat(lp, STAT_TX_BYTES); in axienet_ethtools_get_ethtool_stats()
2114 } while (read_seqcount_retry(&lp->hw_stats_seqcount, start)); in axienet_ethtools_get_ethtool_stats()
2125 "User Defined Counter 1",
2145 if (lp->features & XAE_FEATURE_STATS) in axienet_ethtools_get_sset_count()
2149 return -EOPNOTSUPP; in axienet_ethtools_get_sset_count()
2160 if (!(lp->features & XAE_FEATURE_STATS)) in axienet_ethtools_get_pause_stats()
2164 start = read_seqcount_begin(&lp->hw_stats_seqcount); in axienet_ethtools_get_pause_stats()
2165 pause_stats->tx_pause_frames = in axienet_ethtools_get_pause_stats()
2167 pause_stats->rx_pause_frames = in axienet_ethtools_get_pause_stats()
2169 } while (read_seqcount_retry(&lp->hw_stats_seqcount, start)); in axienet_ethtools_get_pause_stats()
2179 if (!(lp->features & XAE_FEATURE_STATS)) in axienet_ethtool_get_eth_mac_stats()
2183 start = read_seqcount_begin(&lp->hw_stats_seqcount); in axienet_ethtool_get_eth_mac_stats()
2184 mac_stats->FramesTransmittedOK = in axienet_ethtool_get_eth_mac_stats()
2186 mac_stats->SingleCollisionFrames = in axienet_ethtool_get_eth_mac_stats()
2188 mac_stats->MultipleCollisionFrames = in axienet_ethtool_get_eth_mac_stats()
2190 mac_stats->FramesReceivedOK = in axienet_ethtool_get_eth_mac_stats()
2192 mac_stats->FrameCheckSequenceErrors = in axienet_ethtool_get_eth_mac_stats()
2194 mac_stats->AlignmentErrors = in axienet_ethtool_get_eth_mac_stats()
2196 mac_stats->FramesWithDeferredXmissions = in axienet_ethtool_get_eth_mac_stats()
2198 mac_stats->LateCollisions = in axienet_ethtool_get_eth_mac_stats()
2200 mac_stats->FramesAbortedDueToXSColls = in axienet_ethtool_get_eth_mac_stats()
2202 mac_stats->MulticastFramesXmittedOK = in axienet_ethtool_get_eth_mac_stats()
2204 mac_stats->BroadcastFramesXmittedOK = in axienet_ethtool_get_eth_mac_stats()
2206 mac_stats->FramesWithExcessiveDeferral = in axienet_ethtool_get_eth_mac_stats()
2208 mac_stats->MulticastFramesReceivedOK = in axienet_ethtool_get_eth_mac_stats()
2210 mac_stats->BroadcastFramesReceivedOK = in axienet_ethtool_get_eth_mac_stats()
2212 mac_stats->InRangeLengthErrors = in axienet_ethtool_get_eth_mac_stats()
2214 } while (read_seqcount_retry(&lp->hw_stats_seqcount, start)); in axienet_ethtool_get_eth_mac_stats()
2224 if (!(lp->features & XAE_FEATURE_STATS)) in axienet_ethtool_get_eth_ctrl_stats()
2228 start = read_seqcount_begin(&lp->hw_stats_seqcount); in axienet_ethtool_get_eth_ctrl_stats()
2229 ctrl_stats->MACControlFramesTransmitted = in axienet_ethtool_get_eth_ctrl_stats()
2231 ctrl_stats->MACControlFramesReceived = in axienet_ethtool_get_eth_ctrl_stats()
2233 ctrl_stats->UnsupportedOpcodesReceived = in axienet_ethtool_get_eth_ctrl_stats()
2235 } while (read_seqcount_retry(&lp->hw_stats_seqcount, start)); in axienet_ethtool_get_eth_ctrl_stats()
2257 if (!(lp->features & XAE_FEATURE_STATS)) in axienet_ethtool_get_rmon_stats()
2261 start = read_seqcount_begin(&lp->hw_stats_seqcount); in axienet_ethtool_get_rmon_stats()
2262 rmon_stats->undersize_pkts = in axienet_ethtool_get_rmon_stats()
2264 rmon_stats->oversize_pkts = in axienet_ethtool_get_rmon_stats()
2266 rmon_stats->fragments = in axienet_ethtool_get_rmon_stats()
2269 rmon_stats->hist[0] = in axienet_ethtool_get_rmon_stats()
2271 rmon_stats->hist[1] = in axienet_ethtool_get_rmon_stats()
2273 rmon_stats->hist[2] = in axienet_ethtool_get_rmon_stats()
2275 rmon_stats->hist[3] = in axienet_ethtool_get_rmon_stats()
2277 rmon_stats->hist[4] = in axienet_ethtool_get_rmon_stats()
2279 rmon_stats->hist[5] = in axienet_ethtool_get_rmon_stats()
2281 rmon_stats->hist[6] = in axienet_ethtool_get_rmon_stats()
2282 rmon_stats->oversize_pkts; in axienet_ethtool_get_rmon_stats()
2284 rmon_stats->hist_tx[0] = in axienet_ethtool_get_rmon_stats()
2286 rmon_stats->hist_tx[1] = in axienet_ethtool_get_rmon_stats()
2288 rmon_stats->hist_tx[2] = in axienet_ethtool_get_rmon_stats()
2290 rmon_stats->hist_tx[3] = in axienet_ethtool_get_rmon_stats()
2292 rmon_stats->hist_tx[4] = in axienet_ethtool_get_rmon_stats()
2294 rmon_stats->hist_tx[5] = in axienet_ethtool_get_rmon_stats()
2296 rmon_stats->hist_tx[6] = in axienet_ethtool_get_rmon_stats()
2298 } while (read_seqcount_retry(&lp->hw_stats_seqcount, start)); in axienet_ethtool_get_rmon_stats()
2336 struct mdio_device *pcs_phy = pcs_to_axienet_local(pcs)->pcs_phy; in axienet_pcs_get_state()
2343 struct mdio_device *pcs_phy = pcs_to_axienet_local(pcs)->pcs_phy; in axienet_pcs_an_restart()
2353 struct mdio_device *pcs_phy = pcs_to_axienet_local(pcs)->pcs_phy; in axienet_pcs_config()
2354 struct net_device *ndev = pcs_to_axienet_local(pcs)->ndev; in axienet_pcs_config()
2358 if (lp->switch_x_sgmii) { in axienet_pcs_config()
2387 struct net_device *ndev = to_net_dev(config->dev); in axienet_mac_select_pcs()
2392 return &lp->pcs; in axienet_mac_select_pcs()
2416 struct net_device *ndev = to_net_dev(config->dev); in axienet_mac_link_up()
2434 dev_err(&ndev->dev, in axienet_mac_link_up()
2435 "Speed other than 10, 100 or 1Gbps is not supported\n"); in axienet_mac_link_up()
2461 * axienet_dma_err_handler - Work queue task for Axi DMA Error
2464 * Resets the Axi DMA and Axi Ethernet devices, and reconfigures the
2474 struct net_device *ndev = lp->ndev; in axienet_dma_err_handler()
2477 if (READ_ONCE(lp->stopping)) in axienet_dma_err_handler()
2480 napi_disable(&lp->napi_tx); in axienet_dma_err_handler()
2481 napi_disable(&lp->napi_rx); in axienet_dma_err_handler()
2483 axienet_setoptions(ndev, lp->options & in axienet_dma_err_handler()
2488 for (i = 0; i < lp->tx_bd_num; i++) { in axienet_dma_err_handler()
2489 cur_p = &lp->tx_bd_v[i]; in axienet_dma_err_handler()
2490 if (cur_p->cntrl) { in axienet_dma_err_handler()
2493 dma_unmap_single(lp->dev, addr, in axienet_dma_err_handler()
2494 (cur_p->cntrl & in axienet_dma_err_handler()
2498 if (cur_p->skb) in axienet_dma_err_handler()
2499 dev_kfree_skb_irq(cur_p->skb); in axienet_dma_err_handler()
2500 cur_p->phys = 0; in axienet_dma_err_handler()
2501 cur_p->phys_msb = 0; in axienet_dma_err_handler()
2502 cur_p->cntrl = 0; in axienet_dma_err_handler()
2503 cur_p->status = 0; in axienet_dma_err_handler()
2504 cur_p->app0 = 0; in axienet_dma_err_handler()
2505 cur_p->app1 = 0; in axienet_dma_err_handler()
2506 cur_p->app2 = 0; in axienet_dma_err_handler()
2507 cur_p->app3 = 0; in axienet_dma_err_handler()
2508 cur_p->app4 = 0; in axienet_dma_err_handler()
2509 cur_p->skb = NULL; in axienet_dma_err_handler()
2512 for (i = 0; i < lp->rx_bd_num; i++) { in axienet_dma_err_handler()
2513 cur_p = &lp->rx_bd_v[i]; in axienet_dma_err_handler()
2514 cur_p->status = 0; in axienet_dma_err_handler()
2515 cur_p->app0 = 0; in axienet_dma_err_handler()
2516 cur_p->app1 = 0; in axienet_dma_err_handler()
2517 cur_p->app2 = 0; in axienet_dma_err_handler()
2518 cur_p->app3 = 0; in axienet_dma_err_handler()
2519 cur_p->app4 = 0; in axienet_dma_err_handler()
2522 lp->tx_bd_ci = 0; in axienet_dma_err_handler()
2523 lp->tx_bd_tail = 0; in axienet_dma_err_handler()
2524 lp->rx_bd_ci = 0; in axienet_dma_err_handler()
2535 axienet_iow(lp, XAE_IE_OFFSET, lp->eth_irq > 0 ? in axienet_dma_err_handler()
2542 axienet_setoptions(ndev, lp->options & in axienet_dma_err_handler()
2546 napi_enable(&lp->napi_rx); in axienet_dma_err_handler()
2547 napi_enable(&lp->napi_tx); in axienet_dma_err_handler()
2548 axienet_setoptions(ndev, lp->options); in axienet_dma_err_handler()
2552 * axienet_probe - Axi Ethernet probe function.
2556 * Non-zero error value on failure.
2558 * This is the probe routine for Axi Ethernet driver. This is called before
2559 * any other driver routines are invoked. It allocates and sets up the Ethernet
2561 * axienet_local. It registers the Ethernet device.
2576 return -ENOMEM; in axienet_probe()
2580 SET_NETDEV_DEV(ndev, &pdev->dev); in axienet_probe()
2581 ndev->features = NETIF_F_SG; in axienet_probe()
2582 ndev->ethtool_ops = &axienet_ethtool_ops; in axienet_probe()
2584 /* MTU range: 64 - 9000 */ in axienet_probe()
2585 ndev->min_mtu = 64; in axienet_probe()
2586 ndev->max_mtu = XAE_JUMBO_MTU; in axienet_probe()
2589 lp->ndev = ndev; in axienet_probe()
2590 lp->dev = &pdev->dev; in axienet_probe()
2591 lp->options = XAE_OPTION_DEFAULTS; in axienet_probe()
2592 lp->rx_bd_num = RX_BD_NUM_DEFAULT; in axienet_probe()
2593 lp->tx_bd_num = TX_BD_NUM_DEFAULT; in axienet_probe()
2595 u64_stats_init(&lp->rx_stat_sync); in axienet_probe()
2596 u64_stats_init(&lp->tx_stat_sync); in axienet_probe()
2598 mutex_init(&lp->stats_lock); in axienet_probe()
2599 seqcount_mutex_init(&lp->hw_stats_seqcount, &lp->stats_lock); in axienet_probe()
2600 INIT_DEFERRABLE_WORK(&lp->stats_work, axienet_refresh_stats); in axienet_probe()
2602 lp->axi_clk = devm_clk_get_optional(&pdev->dev, "s_axi_lite_clk"); in axienet_probe()
2603 if (!lp->axi_clk) { in axienet_probe()
2604 /* For backward compatibility, if named AXI clock is not present, in axienet_probe()
2605 * treat the first clock specified as the AXI clock. in axienet_probe()
2607 lp->axi_clk = devm_clk_get_optional(&pdev->dev, NULL); in axienet_probe()
2609 if (IS_ERR(lp->axi_clk)) { in axienet_probe()
2610 ret = PTR_ERR(lp->axi_clk); in axienet_probe()
2613 ret = clk_prepare_enable(lp->axi_clk); in axienet_probe()
2615 dev_err(&pdev->dev, "Unable to enable AXI clock: %d\n", ret); in axienet_probe()
2619 lp->misc_clks[0].id = "axis_clk"; in axienet_probe()
2620 lp->misc_clks[1].id = "ref_clk"; in axienet_probe()
2621 lp->misc_clks[2].id = "mgt_clk"; in axienet_probe()
2623 ret = devm_clk_bulk_get_optional(&pdev->dev, XAE_NUM_MISC_CLOCKS, lp->misc_clks); in axienet_probe()
2627 ret = clk_bulk_prepare_enable(XAE_NUM_MISC_CLOCKS, lp->misc_clks); in axienet_probe()
2632 lp->regs = devm_platform_get_and_ioremap_resource(pdev, 0, ðres); in axienet_probe()
2633 if (IS_ERR(lp->regs)) { in axienet_probe()
2634 ret = PTR_ERR(lp->regs); in axienet_probe()
2637 lp->regs_start = ethres->start; in axienet_probe()
2640 lp->features = 0; in axienet_probe()
2643 lp->features |= XAE_FEATURE_STATS; in axienet_probe()
2645 ret = of_property_read_u32(pdev->dev.of_node, "xlnx,txcsum", &value); in axienet_probe()
2648 case 1: in axienet_probe()
2649 lp->features |= XAE_FEATURE_PARTIAL_TX_CSUM; in axienet_probe()
2651 ndev->features |= NETIF_F_HW_CSUM; in axienet_probe()
2654 lp->features |= XAE_FEATURE_FULL_TX_CSUM; in axienet_probe()
2656 ndev->features |= NETIF_F_IP_CSUM; in axienet_probe()
2660 ret = of_property_read_u32(pdev->dev.of_node, "xlnx,rxcsum", &value); in axienet_probe()
2663 case 1: in axienet_probe()
2664 lp->features |= XAE_FEATURE_PARTIAL_RX_CSUM; in axienet_probe()
2665 ndev->features |= NETIF_F_RXCSUM; in axienet_probe()
2668 lp->features |= XAE_FEATURE_FULL_RX_CSUM; in axienet_probe()
2669 ndev->features |= NETIF_F_RXCSUM; in axienet_probe()
2673 /* For supporting jumbo frames, the Axi Ethernet hardware must have in axienet_probe()
2677 * the device-tree and accordingly set flags. in axienet_probe()
2679 of_property_read_u32(pdev->dev.of_node, "xlnx,rxmem", &lp->rxmem); in axienet_probe()
2681 lp->switch_x_sgmii = of_property_read_bool(pdev->dev.of_node, in axienet_probe()
2682 "xlnx,switch-x-sgmii"); in axienet_probe()
2685 ret = of_property_read_u32(pdev->dev.of_node, "xlnx,phy-type", &value); in axienet_probe()
2687 netdev_warn(ndev, "Please upgrade your device tree binary blob to use phy-mode"); in axienet_probe()
2690 lp->phy_mode = PHY_INTERFACE_MODE_MII; in axienet_probe()
2693 lp->phy_mode = PHY_INTERFACE_MODE_GMII; in axienet_probe()
2696 lp->phy_mode = PHY_INTERFACE_MODE_RGMII_ID; in axienet_probe()
2699 lp->phy_mode = PHY_INTERFACE_MODE_SGMII; in axienet_probe()
2702 lp->phy_mode = PHY_INTERFACE_MODE_1000BASEX; in axienet_probe()
2705 ret = -EINVAL; in axienet_probe()
2709 ret = of_get_phy_mode(pdev->dev.of_node, &lp->phy_mode); in axienet_probe()
2713 if (lp->switch_x_sgmii && lp->phy_mode != PHY_INTERFACE_MODE_SGMII && in axienet_probe()
2714 lp->phy_mode != PHY_INTERFACE_MODE_1000BASEX) { in axienet_probe()
2715 dev_err(&pdev->dev, "xlnx,switch-x-sgmii only supported with SGMII or 1000BaseX\n"); in axienet_probe()
2716 ret = -EINVAL; in axienet_probe()
2720 if (!of_property_present(pdev->dev.of_node, "dmas")) { in axienet_probe()
2722 np = of_parse_phandle(pdev->dev.of_node, "axistream-connected", 0); in axienet_probe()
2729 dev_err(&pdev->dev, in axienet_probe()
2734 lp->dma_regs = devm_ioremap_resource(&pdev->dev, in axienet_probe()
2736 lp->rx_irq = irq_of_parse_and_map(np, 1); in axienet_probe()
2737 lp->tx_irq = irq_of_parse_and_map(np, 0); in axienet_probe()
2739 lp->eth_irq = platform_get_irq_optional(pdev, 0); in axienet_probe()
2741 /* Check for these resources directly on the Ethernet node. */ in axienet_probe()
2742 lp->dma_regs = devm_platform_get_and_ioremap_resource(pdev, 1, NULL); in axienet_probe()
2743 lp->rx_irq = platform_get_irq(pdev, 1); in axienet_probe()
2744 lp->tx_irq = platform_get_irq(pdev, 0); in axienet_probe()
2745 lp->eth_irq = platform_get_irq_optional(pdev, 2); in axienet_probe()
2747 if (IS_ERR(lp->dma_regs)) { in axienet_probe()
2748 dev_err(&pdev->dev, "could not map DMA regs\n"); in axienet_probe()
2749 ret = PTR_ERR(lp->dma_regs); in axienet_probe()
2752 if (lp->rx_irq <= 0 || lp->tx_irq <= 0) { in axienet_probe()
2753 dev_err(&pdev->dev, "could not determine irqs\n"); in axienet_probe()
2754 ret = -ENOMEM; in axienet_probe()
2763 /* Autodetect the need for 64-bit DMA pointers. in axienet_probe()
2766 * We can detect this case by writing all 1's to one such register in axienet_probe()
2769 * Those MSB registers were introduced in IP v7.1, which we check first. in axienet_probe()
2772 void __iomem *desc = lp->dma_regs + XAXIDMA_TX_CDESC_OFFSET + 4; in axienet_probe()
2778 lp->features |= XAE_FEATURE_DMA_64BIT; in axienet_probe()
2780 dev_info(&pdev->dev, in axienet_probe()
2781 "autodetected 64-bit DMA range\n"); in axienet_probe()
2786 if (!IS_ENABLED(CONFIG_64BIT) && lp->features & XAE_FEATURE_DMA_64BIT) { in axienet_probe()
2787 dev_err(&pdev->dev, "64-bit addressable DMA is not compatible with 32-bit archecture\n"); in axienet_probe()
2788 ret = -EINVAL; in axienet_probe()
2792 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(addr_width)); in axienet_probe()
2794 dev_err(&pdev->dev, "No suitable DMA available\n"); in axienet_probe()
2797 netif_napi_add(ndev, &lp->napi_rx, axienet_rx_poll); in axienet_probe()
2798 netif_napi_add(ndev, &lp->napi_tx, axienet_tx_poll); in axienet_probe()
2803 lp->eth_irq = platform_get_irq_optional(pdev, 0); in axienet_probe()
2804 if (lp->eth_irq < 0 && lp->eth_irq != -ENXIO) { in axienet_probe()
2805 ret = lp->eth_irq; in axienet_probe()
2808 tx_chan = dma_request_chan(lp->dev, "tx_chan0"); in axienet_probe()
2811 dev_err_probe(lp->dev, ret, "No Ethernet DMA (TX) channel found\n"); in axienet_probe()
2815 cfg.reset = 1; in axienet_probe()
2819 dev_err(&pdev->dev, "Reset channel failed\n"); in axienet_probe()
2825 lp->use_dmaengine = 1; in axienet_probe()
2828 if (lp->use_dmaengine) in axienet_probe()
2829 ndev->netdev_ops = &axienet_netdev_dmaengine_ops; in axienet_probe()
2831 ndev->netdev_ops = &axienet_netdev_ops; in axienet_probe()
2832 /* Check for Ethernet core IRQ (optional) */ in axienet_probe()
2833 if (lp->eth_irq <= 0) in axienet_probe()
2834 dev_info(&pdev->dev, "Ethernet core IRQ not defined\n"); in axienet_probe()
2837 ret = of_get_mac_address(pdev->dev.of_node, mac_addr); in axienet_probe()
2841 dev_warn(&pdev->dev, "could not find MAC address property: %d\n", in axienet_probe()
2846 lp->coalesce_count_rx = XAXIDMA_DFT_RX_THRESHOLD; in axienet_probe()
2847 lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD; in axienet_probe()
2848 lp->coalesce_usec_rx = XAXIDMA_DFT_RX_USEC; in axienet_probe()
2849 lp->coalesce_usec_tx = XAXIDMA_DFT_TX_USEC; in axienet_probe()
2853 dev_warn(&pdev->dev, in axienet_probe()
2856 if (lp->phy_mode == PHY_INTERFACE_MODE_SGMII || in axienet_probe()
2857 lp->phy_mode == PHY_INTERFACE_MODE_1000BASEX) { in axienet_probe()
2858 np = of_parse_phandle(pdev->dev.of_node, "pcs-handle", 0); in axienet_probe()
2860 /* Deprecated: Always use "pcs-handle" for pcs_phy. in axienet_probe()
2861 * Falling back to "phy-handle" here is only for in axienet_probe()
2864 np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0); in axienet_probe()
2867 dev_err(&pdev->dev, "pcs-handle (preferred) or phy-handle required for 1000BaseX/SGMII\n"); in axienet_probe()
2868 ret = -EINVAL; in axienet_probe()
2871 lp->pcs_phy = of_mdio_find_device(np); in axienet_probe()
2872 if (!lp->pcs_phy) { in axienet_probe()
2873 ret = -EPROBE_DEFER; in axienet_probe()
2878 lp->pcs.ops = &axienet_pcs_ops; in axienet_probe()
2879 lp->pcs.neg_mode = true; in axienet_probe()
2880 lp->pcs.poll = true; in axienet_probe()
2883 lp->phylink_config.dev = &ndev->dev; in axienet_probe()
2884 lp->phylink_config.type = PHYLINK_NETDEV; in axienet_probe()
2885 lp->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE | in axienet_probe()
2888 __set_bit(lp->phy_mode, lp->phylink_config.supported_interfaces); in axienet_probe()
2889 if (lp->switch_x_sgmii) { in axienet_probe()
2891 lp->phylink_config.supported_interfaces); in axienet_probe()
2893 lp->phylink_config.supported_interfaces); in axienet_probe()
2896 lp->phylink = phylink_create(&lp->phylink_config, pdev->dev.fwnode, in axienet_probe()
2897 lp->phy_mode, in axienet_probe()
2899 if (IS_ERR(lp->phylink)) { in axienet_probe()
2900 ret = PTR_ERR(lp->phylink); in axienet_probe()
2901 dev_err(&pdev->dev, "phylink_create error (%i)\n", ret); in axienet_probe()
2905 ret = register_netdev(lp->ndev); in axienet_probe()
2907 dev_err(lp->dev, "register_netdev() error (%i)\n", ret); in axienet_probe()
2914 phylink_destroy(lp->phylink); in axienet_probe()
2917 if (lp->pcs_phy) in axienet_probe()
2918 put_device(&lp->pcs_phy->dev); in axienet_probe()
2919 if (lp->mii_bus) in axienet_probe()
2922 clk_bulk_disable_unprepare(XAE_NUM_MISC_CLOCKS, lp->misc_clks); in axienet_probe()
2923 clk_disable_unprepare(lp->axi_clk); in axienet_probe()
2938 if (lp->phylink) in axienet_remove()
2939 phylink_destroy(lp->phylink); in axienet_remove()
2941 if (lp->pcs_phy) in axienet_remove()
2942 put_device(&lp->pcs_phy->dev); in axienet_remove()
2946 clk_bulk_disable_unprepare(XAE_NUM_MISC_CLOCKS, lp->misc_clks); in axienet_remove()
2947 clk_disable_unprepare(lp->axi_clk); in axienet_remove()
3013 MODULE_DESCRIPTION("Xilinx Axi Ethernet driver");