Lines Matching refs:dram
258 p = emac->dram.va + MGR_R30_CMD_OFFSET; in emac_r30_cmd_init()
270 p = emac->dram.va + MGR_R30_CMD_OFFSET; in emac_r30_is_done()
299 bpool_cfg = emac->dram.va + BUFFER_POOL_0_ADDR_OFFSET; in prueth_fw_offload_buffer_setup()
331 rxq_ctx = emac->dram.va + HOST_RX_Q_PRE_CONTEXT_OFFSET; in prueth_fw_offload_buffer_setup()
363 bpool_cfg = emac->dram.va + BUFFER_POOL_0_ADDR_OFFSET; in prueth_emac_buffer_setup()
382 rxq_ctx = emac->dram.va + HOST_RX_Q_PRE_CONTEXT_OFFSET; in prueth_emac_buffer_setup()
390 rxq_ctx = emac->dram.va + HOST_RX_Q_EXP_CONTEXT_OFFSET; in prueth_emac_buffer_setup()
454 void __iomem *config = emac->dram.va + ICSSG_CONFIG_OFFSET; in icssg_config()
547 p = emac->dram.va + MGR_R30_CMD_OFFSET; in icssg_set_port_state()
581 writel(val, emac->dram.va + HD_RAND_SEED_OFFSET); in icssg_config_half_duplex()
608 writeb(fw_speed, emac->dram.va + PORT_LINK_SPEED_OFFSET); in icssg_config_set_speed()
719 slot = (struct prueth_fdb_slot __force *)(emac->dram.va + FDB_CMD_BUFFER); in icssg_fdb_lookup()