Lines Matching +full:tx +full:- +full:cpu0
1 // SPDX-License-Identifier: GPL-2.0
20 if (comm->enable == 0) { in spl2sw_mac_hw_stop()
22 writel(0xffffffff, comm->l2sw_reg_base + L2SW_SW_INT_MASK_0); in spl2sw_mac_hw_stop()
23 writel(0xffffffff, comm->l2sw_reg_base + L2SW_SW_INT_STATUS_0); in spl2sw_mac_hw_stop()
26 reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL); in spl2sw_mac_hw_stop()
28 writel(reg, comm->l2sw_reg_base + L2SW_CPU_CNTL); in spl2sw_mac_hw_stop()
32 reg = readl(comm->l2sw_reg_base + L2SW_PORT_CNTL0); in spl2sw_mac_hw_stop()
33 reg |= FIELD_PREP(MAC_DIS_PORT, ~comm->enable); in spl2sw_mac_hw_stop()
34 writel(reg, comm->l2sw_reg_base + L2SW_PORT_CNTL0); in spl2sw_mac_hw_stop()
42 reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL); in spl2sw_mac_hw_start()
45 writel(reg, comm->l2sw_reg_base + L2SW_CPU_CNTL); in spl2sw_mac_hw_start()
48 reg = readl(comm->l2sw_reg_base + L2SW_PORT_CNTL0); in spl2sw_mac_hw_start()
49 reg &= FIELD_PREP(MAC_DIS_PORT, ~comm->enable) | ~MAC_DIS_PORT; in spl2sw_mac_hw_start()
50 writel(reg, comm->l2sw_reg_base + L2SW_PORT_CNTL0); in spl2sw_mac_hw_start()
55 struct spl2sw_common *comm = mac->comm; in spl2sw_mac_addr_add()
59 /* Write 6-octet MAC address. */ in spl2sw_mac_addr_add()
60 writel((mac->mac_addr[0] << 0) + (mac->mac_addr[1] << 8), in spl2sw_mac_addr_add()
61 comm->l2sw_reg_base + L2SW_W_MAC_15_0); in spl2sw_mac_addr_add()
62 writel((mac->mac_addr[2] << 0) + (mac->mac_addr[3] << 8) + in spl2sw_mac_addr_add()
63 (mac->mac_addr[4] << 16) + (mac->mac_addr[5] << 24), in spl2sw_mac_addr_add()
64 comm->l2sw_reg_base + L2SW_W_MAC_47_16); in spl2sw_mac_addr_add()
67 reg = MAC_W_CPU_PORT_0 | FIELD_PREP(MAC_W_VID, mac->vlan_id) | in spl2sw_mac_addr_add()
69 writel(reg, comm->l2sw_reg_base + L2SW_WT_MAC_AD0); in spl2sw_mac_addr_add()
73 comm->l2sw_reg_base + L2SW_WT_MAC_AD0); in spl2sw_mac_addr_add()
75 netdev_err(mac->ndev, "Failed to add address to table!\n"); in spl2sw_mac_addr_add()
79 netdev_dbg(mac->ndev, "mac_ad0 = %08x, mac_ad = %08x%04x\n", in spl2sw_mac_addr_add()
80 readl(comm->l2sw_reg_base + L2SW_WT_MAC_AD0), in spl2sw_mac_addr_add()
82 readl(comm->l2sw_reg_base + L2SW_W_MAC_47_16)), in spl2sw_mac_addr_add()
84 readl(comm->l2sw_reg_base + L2SW_W_MAC_15_0))); in spl2sw_mac_addr_add()
90 struct spl2sw_common *comm = mac->comm; in spl2sw_mac_addr_del()
94 /* Write 6-octet MAC address. */ in spl2sw_mac_addr_del()
95 writel((mac->mac_addr[0] << 0) + (mac->mac_addr[1] << 8), in spl2sw_mac_addr_del()
96 comm->l2sw_reg_base + L2SW_W_MAC_15_0); in spl2sw_mac_addr_del()
97 writel((mac->mac_addr[2] << 0) + (mac->mac_addr[3] << 8) + in spl2sw_mac_addr_del()
98 (mac->mac_addr[4] << 16) + (mac->mac_addr[5] << 24), in spl2sw_mac_addr_del()
99 comm->l2sw_reg_base + L2SW_W_MAC_47_16); in spl2sw_mac_addr_del()
104 reg = MAC_W_LAN_PORT_0 | FIELD_PREP(MAC_W_VID, mac->vlan_id) | MAC_W_MAC_CMD; in spl2sw_mac_addr_del()
105 writel(reg, comm->l2sw_reg_base + L2SW_WT_MAC_AD0); in spl2sw_mac_addr_del()
109 comm->l2sw_reg_base + L2SW_WT_MAC_AD0); in spl2sw_mac_addr_del()
111 netdev_err(mac->ndev, "Failed to delete address from table!\n"); in spl2sw_mac_addr_del()
115 netdev_dbg(mac->ndev, "mac_ad0 = %08x, mac_ad = %08x%04x\n", in spl2sw_mac_addr_del()
116 readl(comm->l2sw_reg_base + L2SW_WT_MAC_AD0), in spl2sw_mac_addr_del()
118 readl(comm->l2sw_reg_base + L2SW_W_MAC_47_16)), in spl2sw_mac_addr_del()
120 readl(comm->l2sw_reg_base + L2SW_W_MAC_15_0))); in spl2sw_mac_addr_del()
128 /* Disable cpu0 and cpu 1 port. */ in spl2sw_mac_hw_init()
129 reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL); in spl2sw_mac_hw_init()
131 writel(reg, comm->l2sw_reg_base + L2SW_CPU_CNTL); in spl2sw_mac_hw_init()
133 /* Set base addresses of TX and RX queues. */ in spl2sw_mac_hw_init()
134 writel(comm->desc_dma, comm->l2sw_reg_base + L2SW_TX_LBASE_ADDR_0); in spl2sw_mac_hw_init()
135 writel(comm->desc_dma + sizeof(struct spl2sw_mac_desc) * TX_DESC_NUM, in spl2sw_mac_hw_init()
136 comm->l2sw_reg_base + L2SW_TX_HBASE_ADDR_0); in spl2sw_mac_hw_init()
137 writel(comm->desc_dma + sizeof(struct spl2sw_mac_desc) * (TX_DESC_NUM + in spl2sw_mac_hw_init()
138 MAC_GUARD_DESC_NUM), comm->l2sw_reg_base + L2SW_RX_HBASE_ADDR_0); in spl2sw_mac_hw_init()
139 writel(comm->desc_dma + sizeof(struct spl2sw_mac_desc) * (TX_DESC_NUM + in spl2sw_mac_hw_init()
141 comm->l2sw_reg_base + L2SW_RX_LBASE_ADDR_0); in spl2sw_mac_hw_init()
144 writel(0x4a3a2d1d, comm->l2sw_reg_base + L2SW_FL_CNTL_TH); in spl2sw_mac_hw_init()
147 writel(0x4a3a1212, comm->l2sw_reg_base + L2SW_CPU_FL_CNTL_TH); in spl2sw_mac_hw_init()
150 writel(0xf6680000, comm->l2sw_reg_base + L2SW_PRI_FL_CNTL); in spl2sw_mac_hw_init()
152 /* High-active LED */ in spl2sw_mac_hw_init()
153 reg = readl(comm->l2sw_reg_base + L2SW_LED_PORT0); in spl2sw_mac_hw_init()
155 writel(reg, comm->l2sw_reg_base + L2SW_LED_PORT0); in spl2sw_mac_hw_init()
161 reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL); in spl2sw_mac_hw_init()
166 writel(reg, comm->l2sw_reg_base + L2SW_CPU_CNTL); in spl2sw_mac_hw_init()
172 reg = readl(comm->l2sw_reg_base + L2SW_PORT_CNTL0); in spl2sw_mac_hw_init()
176 writel(reg, comm->l2sw_reg_base + L2SW_PORT_CNTL0); in spl2sw_mac_hw_init()
179 reg = readl(comm->l2sw_reg_base + L2SW_PORT_CNTL1); in spl2sw_mac_hw_init()
181 writel(reg, comm->l2sw_reg_base + L2SW_PORT_CNTL1); in spl2sw_mac_hw_init()
184 * set both external phy-address to 31. in spl2sw_mac_hw_init()
186 reg = readl(comm->l2sw_reg_base + L2SW_MAC_FORCE_MODE); in spl2sw_mac_hw_init()
190 writel(reg, comm->l2sw_reg_base + L2SW_MAC_FORCE_MODE); in spl2sw_mac_hw_init()
196 writel(reg, comm->l2sw_reg_base + L2SW_PVID_CONFIG0); in spl2sw_mac_hw_init()
198 /* VLAN group 0: cpu0 (bit3) + port0 (bit0) = 1001 = 0x9 in spl2sw_mac_hw_init()
199 * VLAN group 1: cpu0 (bit3) + port1 (bit1) = 1010 = 0xa in spl2sw_mac_hw_init()
202 writel(reg, comm->l2sw_reg_base + L2SW_VLAN_MEMSET_CONFIG0); in spl2sw_mac_hw_init()
208 reg = readl(comm->l2sw_reg_base + L2SW_SW_GLB_CNTL); in spl2sw_mac_hw_init()
213 writel(reg, comm->l2sw_reg_base + L2SW_SW_GLB_CNTL); in spl2sw_mac_hw_init()
215 writel(MAC_INT_MASK_DEF, comm->l2sw_reg_base + L2SW_SW_INT_MASK_0); in spl2sw_mac_hw_init()
220 struct spl2sw_common *comm = mac->comm; in spl2sw_mac_rx_mode_set()
221 struct net_device *ndev = mac->ndev; in spl2sw_mac_rx_mode_set()
224 netdev_dbg(ndev, "ndev->flags = %08x\n", ndev->flags); in spl2sw_mac_rx_mode_set()
225 mask = FIELD_PREP(MAC_DIS_MC2CPU, mac->lan_port) | in spl2sw_mac_rx_mode_set()
226 FIELD_PREP(MAC_DIS_UN2CPU, mac->lan_port); in spl2sw_mac_rx_mode_set()
227 reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL); in spl2sw_mac_rx_mode_set()
229 if (ndev->flags & IFF_PROMISC) { in spl2sw_mac_rx_mode_set()
231 rx_mode = FIELD_PREP(MAC_DIS_MC2CPU, mac->lan_port) | in spl2sw_mac_rx_mode_set()
232 FIELD_PREP(MAC_DIS_UN2CPU, mac->lan_port); in spl2sw_mac_rx_mode_set()
233 } else if ((!netdev_mc_empty(ndev) && (ndev->flags & IFF_MULTICAST)) || in spl2sw_mac_rx_mode_set()
234 (ndev->flags & IFF_ALLMULTI)) { in spl2sw_mac_rx_mode_set()
236 rx_mode = FIELD_PREP(MAC_DIS_MC2CPU, mac->lan_port); in spl2sw_mac_rx_mode_set()
242 writel((reg & (~mask)) | ((~rx_mode) & mask), comm->l2sw_reg_base + L2SW_CPU_CNTL); in spl2sw_mac_rx_mode_set()
243 netdev_dbg(ndev, "cpu_cntl = %08x\n", readl(comm->l2sw_reg_base + L2SW_CPU_CNTL)); in spl2sw_mac_rx_mode_set()
251 comm->rx_pos[i] = 0; in spl2sw_mac_init()
264 comm->tx_pos = 0; in spl2sw_mac_soft_reset()
265 comm->tx_done_pos = 0; in spl2sw_mac_soft_reset()
266 comm->tx_desc_full = 0; in spl2sw_mac_soft_reset()
269 comm->rx_pos[i] = 0; in spl2sw_mac_soft_reset()