ethernet/sunplus/spl2sw_define.h

1 /* SPDX-License-Identifier: GPL-2.0 */
9 #define MAX_NETDEV_NUM			2	/* Maximum # of net-device */
17 #define MAC_INT_PORT_ST_CHG		BIT(19) /* Port Status Change            */
21 #define MAC_INT_TX_SOC_PAUSE_ON		BIT(15) /* Soc Port TX Pause On          */
22 #define MAC_INT_RX_SOC_QUE_FULL		BIT(14) /* Soc Port Out Queue Full       */
23 #define MAC_INT_TX_LAN1_QUE_FULL	BIT(9)  /* Port 1 Out Queue Full         */
24 #define MAC_INT_TX_LAN0_QUE_FULL	BIT(8)  /* Port 0 Out Queue Full         */
27 #define MAC_INT_RX_DONE_L		BIT(5)  /* RX Low Priority Done          */
28 #define MAC_INT_RX_DONE_H		BIT(4)  /* RX High Priority Done         */
32 #define MAC_INT_RX_DES_ERR		BIT(0)  /* Rx Descriptor Error           */
97 /* Port ability */
116 /* Port control 0 */
127 /* Port control 1 */
131 /* Port control 2 */
140 /* LED port 0 */
171 #define RX_QUEUE0_DESC_NUM		16	/* # of descriptors in RX queue 0 */
172 #define RX_QUEUE1_DESC_NUM		16	/* # of descriptors in RX queue 1 */
174 #define RX_DESC_QUEUE_NUM		2	/* # of RX queue                  */
176 #define MAC_RX_LEN_MAX			2047	/* Size of RX buffer       */
191 /* Rx descriptor */
201 #define RXD_PKT_SP			GENMASK(14, 12)	/* packet source port */
218 	u32 mapping;  member