Lines Matching full:gp
117 static u16 __sungem_phy_read(struct gem *gp, int phy_addr, int reg) in __sungem_phy_read() argument
127 writel(cmd, gp->regs + MIF_FRAME); in __sungem_phy_read()
130 cmd = readl(gp->regs + MIF_FRAME); in __sungem_phy_read()
145 struct gem *gp = netdev_priv(dev); in _sungem_phy_read() local
146 return __sungem_phy_read(gp, mii_id, reg); in _sungem_phy_read()
149 static inline u16 sungem_phy_read(struct gem *gp, int reg) in sungem_phy_read() argument
151 return __sungem_phy_read(gp, gp->mii_phy_addr, reg); in sungem_phy_read()
154 static void __sungem_phy_write(struct gem *gp, int phy_addr, int reg, u16 val) in __sungem_phy_write() argument
165 writel(cmd, gp->regs + MIF_FRAME); in __sungem_phy_write()
168 cmd = readl(gp->regs + MIF_FRAME); in __sungem_phy_write()
178 struct gem *gp = netdev_priv(dev); in _sungem_phy_write() local
179 __sungem_phy_write(gp, mii_id, reg, val & 0xffff); in _sungem_phy_write()
182 static inline void sungem_phy_write(struct gem *gp, int reg, u16 val) in sungem_phy_write() argument
184 __sungem_phy_write(gp, gp->mii_phy_addr, reg, val); in sungem_phy_write()
187 static inline void gem_enable_ints(struct gem *gp) in gem_enable_ints() argument
190 writel(GREG_STAT_TXDONE, gp->regs + GREG_IMASK); in gem_enable_ints()
193 static inline void gem_disable_ints(struct gem *gp) in gem_disable_ints() argument
196 writel(GREG_STAT_NAPI | GREG_STAT_TXDONE, gp->regs + GREG_IMASK); in gem_disable_ints()
197 (void)readl(gp->regs + GREG_IMASK); /* write posting */ in gem_disable_ints()
200 static void gem_get_cell(struct gem *gp) in gem_get_cell() argument
202 BUG_ON(gp->cell_enabled < 0); in gem_get_cell()
203 gp->cell_enabled++; in gem_get_cell()
205 if (gp->cell_enabled == 1) { in gem_get_cell()
207 pmac_call_feature(PMAC_FTR_GMAC_ENABLE, gp->of_node, 0, 1); in gem_get_cell()
214 static void gem_put_cell(struct gem *gp) in gem_put_cell() argument
216 BUG_ON(gp->cell_enabled <= 0); in gem_put_cell()
217 gp->cell_enabled--; in gem_put_cell()
219 if (gp->cell_enabled == 0) { in gem_put_cell()
221 pmac_call_feature(PMAC_FTR_GMAC_ENABLE, gp->of_node, 0, 0); in gem_put_cell()
227 static inline void gem_netif_stop(struct gem *gp) in gem_netif_stop() argument
229 netif_trans_update(gp->dev); /* prevent tx timeout */ in gem_netif_stop()
230 napi_disable(&gp->napi); in gem_netif_stop()
231 netif_tx_disable(gp->dev); in gem_netif_stop()
234 static inline void gem_netif_start(struct gem *gp) in gem_netif_start() argument
240 netif_wake_queue(gp->dev); in gem_netif_start()
241 napi_enable(&gp->napi); in gem_netif_start()
244 static void gem_schedule_reset(struct gem *gp) in gem_schedule_reset() argument
246 gp->reset_task_pending = 1; in gem_schedule_reset()
247 schedule_work(&gp->reset_task); in gem_schedule_reset()
250 static void gem_handle_mif_event(struct gem *gp, u32 reg_val, u32 changed_bits) in gem_handle_mif_event() argument
252 if (netif_msg_intr(gp)) in gem_handle_mif_event()
253 printk(KERN_DEBUG "%s: mif interrupt\n", gp->dev->name); in gem_handle_mif_event()
256 static int gem_pcs_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status) in gem_pcs_interrupt() argument
258 u32 pcs_istat = readl(gp->regs + PCS_ISTAT); in gem_pcs_interrupt()
261 if (netif_msg_intr(gp)) in gem_pcs_interrupt()
263 gp->dev->name, pcs_istat); in gem_pcs_interrupt()
274 pcs_miistat = readl(gp->regs + PCS_MIISTAT); in gem_pcs_interrupt()
277 (readl(gp->regs + PCS_MIISTAT) & in gem_pcs_interrupt()
292 netif_carrier_on(gp->dev); in gem_pcs_interrupt()
295 netif_carrier_off(gp->dev); in gem_pcs_interrupt()
299 if (!timer_pending(&gp->link_timer)) in gem_pcs_interrupt()
306 static int gem_txmac_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status) in gem_txmac_interrupt() argument
308 u32 txmac_stat = readl(gp->regs + MAC_TXSTAT); in gem_txmac_interrupt()
310 if (netif_msg_intr(gp)) in gem_txmac_interrupt()
312 gp->dev->name, txmac_stat); in gem_txmac_interrupt()
359 static int gem_rxmac_reset(struct gem *gp) in gem_rxmac_reset() argument
361 struct net_device *dev = gp->dev; in gem_rxmac_reset()
367 writel(MAC_RXRST_CMD, gp->regs + MAC_RXRST); in gem_rxmac_reset()
369 if (!(readl(gp->regs + MAC_RXRST) & MAC_RXRST_CMD)) in gem_rxmac_reset()
378 writel(gp->mac_rx_cfg & ~MAC_RXCFG_ENAB, in gem_rxmac_reset()
379 gp->regs + MAC_RXCFG); in gem_rxmac_reset()
381 if (!(readl(gp->regs + MAC_RXCFG) & MAC_RXCFG_ENAB)) in gem_rxmac_reset()
391 writel(0, gp->regs + RXDMA_CFG); in gem_rxmac_reset()
393 if (!(readl(gp->regs + RXDMA_CFG) & RXDMA_CFG_ENABLE)) in gem_rxmac_reset()
405 writel(gp->swrst_base | GREG_SWRST_RXRST, in gem_rxmac_reset()
406 gp->regs + GREG_SWRST); in gem_rxmac_reset()
408 if (!(readl(gp->regs + GREG_SWRST) & GREG_SWRST_RXRST)) in gem_rxmac_reset()
419 struct gem_rxd *rxd = &gp->init_block->rxd[i]; in gem_rxmac_reset()
421 if (gp->rx_skbs[i] == NULL) { in gem_rxmac_reset()
426 rxd->status_word = cpu_to_le64(RXDCTRL_FRESH(gp)); in gem_rxmac_reset()
428 gp->rx_new = gp->rx_old = 0; in gem_rxmac_reset()
431 desc_dma = (u64) gp->gblock_dvma; in gem_rxmac_reset()
433 writel(desc_dma >> 32, gp->regs + RXDMA_DBHI); in gem_rxmac_reset()
434 writel(desc_dma & 0xffffffff, gp->regs + RXDMA_DBLOW); in gem_rxmac_reset()
435 writel(RX_RING_SIZE - 4, gp->regs + RXDMA_KICK); in gem_rxmac_reset()
438 writel(val, gp->regs + RXDMA_CFG); in gem_rxmac_reset()
439 if (readl(gp->regs + GREG_BIFCFG) & GREG_BIFCFG_M66EN) in gem_rxmac_reset()
442 gp->regs + RXDMA_BLANK); in gem_rxmac_reset()
446 gp->regs + RXDMA_BLANK); in gem_rxmac_reset()
447 val = (((gp->rx_pause_off / 64) << 0) & RXDMA_PTHRESH_OFF); in gem_rxmac_reset()
448 val |= (((gp->rx_pause_on / 64) << 12) & RXDMA_PTHRESH_ON); in gem_rxmac_reset()
449 writel(val, gp->regs + RXDMA_PTHRESH); in gem_rxmac_reset()
450 val = readl(gp->regs + RXDMA_CFG); in gem_rxmac_reset()
451 writel(val | RXDMA_CFG_ENABLE, gp->regs + RXDMA_CFG); in gem_rxmac_reset()
452 writel(MAC_RXSTAT_RCV, gp->regs + MAC_RXMASK); in gem_rxmac_reset()
453 val = readl(gp->regs + MAC_RXCFG); in gem_rxmac_reset()
454 writel(val | MAC_RXCFG_ENAB, gp->regs + MAC_RXCFG); in gem_rxmac_reset()
459 static int gem_rxmac_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status) in gem_rxmac_interrupt() argument
461 u32 rxmac_stat = readl(gp->regs + MAC_RXSTAT); in gem_rxmac_interrupt()
464 if (netif_msg_intr(gp)) in gem_rxmac_interrupt()
466 gp->dev->name, rxmac_stat); in gem_rxmac_interrupt()
469 u32 smac = readl(gp->regs + MAC_SMACHINE); in gem_rxmac_interrupt()
475 ret = gem_rxmac_reset(gp); in gem_rxmac_interrupt()
493 static int gem_mac_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status) in gem_mac_interrupt() argument
495 u32 mac_cstat = readl(gp->regs + MAC_CSTAT); in gem_mac_interrupt()
497 if (netif_msg_intr(gp)) in gem_mac_interrupt()
499 gp->dev->name, mac_cstat); in gem_mac_interrupt()
506 gp->pause_entered++; in gem_mac_interrupt()
509 gp->pause_last_time_recvd = (mac_cstat >> 16); in gem_mac_interrupt()
514 static int gem_mif_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status) in gem_mif_interrupt() argument
516 u32 mif_status = readl(gp->regs + MIF_STATUS); in gem_mif_interrupt()
522 gem_handle_mif_event(gp, reg_val, changed_bits); in gem_mif_interrupt()
527 static int gem_pci_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status) in gem_pci_interrupt() argument
529 u32 pci_estat = readl(gp->regs + GREG_PCIESTAT); in gem_pci_interrupt()
531 if (gp->pdev->vendor == PCI_VENDOR_ID_SUN && in gem_pci_interrupt()
532 gp->pdev->device == PCI_DEVICE_ID_SUN_GEM) { in gem_pci_interrupt()
553 pci_errs = pci_status_get_and_clear_errors(gp->pdev); in gem_pci_interrupt()
578 static int gem_abnormal_irq(struct net_device *dev, struct gem *gp, u32 gem_status) in gem_abnormal_irq() argument
582 if (netif_msg_rx_err(gp)) in gem_abnormal_irq()
584 gp->dev->name); in gem_abnormal_irq()
590 if (netif_msg_rx_err(gp)) in gem_abnormal_irq()
592 gp->dev->name); in gem_abnormal_irq()
599 if (gem_pcs_interrupt(dev, gp, gem_status)) in gem_abnormal_irq()
604 if (gem_txmac_interrupt(dev, gp, gem_status)) in gem_abnormal_irq()
609 if (gem_rxmac_interrupt(dev, gp, gem_status)) in gem_abnormal_irq()
614 if (gem_mac_interrupt(dev, gp, gem_status)) in gem_abnormal_irq()
619 if (gem_mif_interrupt(dev, gp, gem_status)) in gem_abnormal_irq()
624 if (gem_pci_interrupt(dev, gp, gem_status)) in gem_abnormal_irq()
631 static __inline__ void gem_tx(struct net_device *dev, struct gem *gp, u32 gem_status) in gem_tx() argument
635 entry = gp->tx_old; in gem_tx()
644 if (netif_msg_tx_done(gp)) in gem_tx()
646 gp->dev->name, entry); in gem_tx()
647 skb = gp->tx_skbs[entry]; in gem_tx()
664 gp->tx_skbs[entry] = NULL; in gem_tx()
668 txd = &gp->init_block->txd[entry]; in gem_tx()
673 dma_unmap_page(&gp->pdev->dev, dma_addr, dma_len, in gem_tx()
681 gp->tx_old = entry; in gem_tx()
691 TX_BUFFS_AVAIL(gp) > (MAX_SKB_FRAGS + 1))) { in gem_tx()
696 TX_BUFFS_AVAIL(gp) > (MAX_SKB_FRAGS + 1)) in gem_tx()
702 static __inline__ void gem_post_rxds(struct gem *gp, int limit) in gem_post_rxds() argument
706 cluster_start = curr = (gp->rx_new & ~(4 - 1)); in gem_post_rxds()
714 &gp->init_block->rxd[cluster_start]; in gem_post_rxds()
716 rxd->status_word = cpu_to_le64(RXDCTRL_FRESH(gp)); in gem_post_rxds()
728 writel(kick, gp->regs + RXDMA_KICK); in gem_post_rxds()
746 static int gem_rx(struct gem *gp, int work_to_do) in gem_rx() argument
748 struct net_device *dev = gp->dev; in gem_rx()
752 if (netif_msg_rx_status(gp)) in gem_rx()
754 gp->dev->name, readl(gp->regs + RXDMA_DONE), gp->rx_new); in gem_rx()
756 entry = gp->rx_new; in gem_rx()
758 done = readl(gp->regs + RXDMA_DONE); in gem_rx()
760 struct gem_rxd *rxd = &gp->init_block->rxd[entry]; in gem_rx()
780 done = readl(gp->regs + RXDMA_DONE); in gem_rx()
788 skb = gp->rx_skbs[entry]; in gem_rx()
808 new_skb = gem_alloc_skb(dev, RX_BUF_ALLOC_SIZE(gp), GFP_ATOMIC); in gem_rx()
813 dma_unmap_page(&gp->pdev->dev, dma_addr, in gem_rx()
814 RX_BUF_ALLOC_SIZE(gp), DMA_FROM_DEVICE); in gem_rx()
815 gp->rx_skbs[entry] = new_skb; in gem_rx()
816 skb_put(new_skb, (gp->rx_buf_sz + RX_OFFSET)); in gem_rx()
817 rxd->buffer = cpu_to_le64(dma_map_page(&gp->pdev->dev, in gem_rx()
820 RX_BUF_ALLOC_SIZE(gp), in gem_rx()
836 dma_sync_single_for_cpu(&gp->pdev->dev, dma_addr, len, in gem_rx()
839 dma_sync_single_for_device(&gp->pdev->dev, dma_addr, in gem_rx()
853 skb->protocol = eth_type_trans(skb, gp->dev); in gem_rx()
855 napi_gro_receive(&gp->napi, skb); in gem_rx()
864 gem_post_rxds(gp, entry); in gem_rx()
866 gp->rx_new = entry; in gem_rx()
869 netdev_info(gp->dev, "Memory squeeze, deferring packet\n"); in gem_rx()
876 struct gem *gp = container_of(napi, struct gem, napi); in gem_poll() local
877 struct net_device *dev = gp->dev; in gem_poll()
883 if (unlikely(gp->status & GREG_STAT_ABNORMAL)) { in gem_poll()
893 reset = gem_abnormal_irq(dev, gp, gp->status); in gem_poll()
896 gem_schedule_reset(gp); in gem_poll()
903 gem_tx(dev, gp, gp->status); in gem_poll()
910 work_done += gem_rx(gp, budget - work_done); in gem_poll()
915 gp->status = readl(gp->regs + GREG_STAT); in gem_poll()
916 } while (gp->status & GREG_STAT_NAPI); in gem_poll()
919 gem_enable_ints(gp); in gem_poll()
927 struct gem *gp = netdev_priv(dev); in gem_interrupt() local
929 if (napi_schedule_prep(&gp->napi)) { in gem_interrupt()
930 u32 gem_status = readl(gp->regs + GREG_STAT); in gem_interrupt()
933 napi_enable(&gp->napi); in gem_interrupt()
936 if (netif_msg_intr(gp)) in gem_interrupt()
938 gp->dev->name, gem_status); in gem_interrupt()
940 gp->status = gem_status; in gem_interrupt()
941 gem_disable_ints(gp); in gem_interrupt()
942 __napi_schedule(&gp->napi); in gem_interrupt()
954 struct gem *gp = netdev_priv(dev); in gem_tx_timeout() local
959 readl(gp->regs + TXDMA_CFG), in gem_tx_timeout()
960 readl(gp->regs + MAC_TXSTAT), in gem_tx_timeout()
961 readl(gp->regs + MAC_TXCFG)); in gem_tx_timeout()
963 readl(gp->regs + RXDMA_CFG), in gem_tx_timeout()
964 readl(gp->regs + MAC_RXSTAT), in gem_tx_timeout()
965 readl(gp->regs + MAC_RXCFG)); in gem_tx_timeout()
967 gem_schedule_reset(gp); in gem_tx_timeout()
982 struct gem *gp = netdev_priv(dev); in gem_start_xmit() local
996 if (unlikely(TX_BUFFS_AVAIL(gp) <= (skb_shinfo(skb)->nr_frags + 1))) { in gem_start_xmit()
1005 entry = gp->tx_new; in gem_start_xmit()
1006 gp->tx_skbs[entry] = skb; in gem_start_xmit()
1009 struct gem_txd *txd = &gp->init_block->txd[entry]; in gem_start_xmit()
1014 mapping = dma_map_page(&gp->pdev->dev, in gem_start_xmit()
1040 first_mapping = dma_map_page(&gp->pdev->dev, in gem_start_xmit()
1053 mapping = skb_frag_dma_map(&gp->pdev->dev, this_frag, in gem_start_xmit()
1059 txd = &gp->init_block->txd[entry]; in gem_start_xmit()
1069 txd = &gp->init_block->txd[first_entry]; in gem_start_xmit()
1076 gp->tx_new = entry; in gem_start_xmit()
1077 if (unlikely(TX_BUFFS_AVAIL(gp) <= (MAX_SKB_FRAGS + 1))) { in gem_start_xmit()
1086 if (TX_BUFFS_AVAIL(gp) > (MAX_SKB_FRAGS + 1)) in gem_start_xmit()
1089 if (netif_msg_tx_queued(gp)) in gem_start_xmit()
1093 writel(gp->tx_new, gp->regs + TXDMA_KICK); in gem_start_xmit()
1098 static void gem_pcs_reset(struct gem *gp) in gem_pcs_reset() argument
1104 val = readl(gp->regs + PCS_MIICTRL); in gem_pcs_reset()
1106 writel(val, gp->regs + PCS_MIICTRL); in gem_pcs_reset()
1109 while (readl(gp->regs + PCS_MIICTRL) & PCS_MIICTRL_RST) { in gem_pcs_reset()
1115 netdev_warn(gp->dev, "PCS reset bit would not clear\n"); in gem_pcs_reset()
1118 static void gem_pcs_reinit_adv(struct gem *gp) in gem_pcs_reinit_adv() argument
1125 val = readl(gp->regs + PCS_CFG); in gem_pcs_reinit_adv()
1127 writel(val, gp->regs + PCS_CFG); in gem_pcs_reinit_adv()
1132 val = readl(gp->regs + PCS_MIIADV); in gem_pcs_reinit_adv()
1135 writel(val, gp->regs + PCS_MIIADV); in gem_pcs_reinit_adv()
1140 val = readl(gp->regs + PCS_MIICTRL); in gem_pcs_reinit_adv()
1143 writel(val, gp->regs + PCS_MIICTRL); in gem_pcs_reinit_adv()
1145 val = readl(gp->regs + PCS_CFG); in gem_pcs_reinit_adv()
1147 writel(val, gp->regs + PCS_CFG); in gem_pcs_reinit_adv()
1153 val = readl(gp->regs + PCS_SCTRL); in gem_pcs_reinit_adv()
1154 if (gp->phy_type == phy_serialink) in gem_pcs_reinit_adv()
1158 writel(val, gp->regs + PCS_SCTRL); in gem_pcs_reinit_adv()
1163 static void gem_reset(struct gem *gp) in gem_reset() argument
1169 writel(0xffffffff, gp->regs + GREG_IMASK); in gem_reset()
1172 writel(gp->swrst_base | GREG_SWRST_TXRST | GREG_SWRST_RXRST, in gem_reset()
1173 gp->regs + GREG_SWRST); in gem_reset()
1179 val = readl(gp->regs + GREG_SWRST); in gem_reset()
1185 netdev_err(gp->dev, "SW reset is ghetto\n"); in gem_reset()
1187 if (gp->phy_type == phy_serialink || gp->phy_type == phy_serdes) in gem_reset()
1188 gem_pcs_reinit_adv(gp); in gem_reset()
1191 static void gem_start_dma(struct gem *gp) in gem_start_dma() argument
1196 val = readl(gp->regs + TXDMA_CFG); in gem_start_dma()
1197 writel(val | TXDMA_CFG_ENABLE, gp->regs + TXDMA_CFG); in gem_start_dma()
1198 val = readl(gp->regs + RXDMA_CFG); in gem_start_dma()
1199 writel(val | RXDMA_CFG_ENABLE, gp->regs + RXDMA_CFG); in gem_start_dma()
1200 val = readl(gp->regs + MAC_TXCFG); in gem_start_dma()
1201 writel(val | MAC_TXCFG_ENAB, gp->regs + MAC_TXCFG); in gem_start_dma()
1202 val = readl(gp->regs + MAC_RXCFG); in gem_start_dma()
1203 writel(val | MAC_RXCFG_ENAB, gp->regs + MAC_RXCFG); in gem_start_dma()
1205 (void) readl(gp->regs + MAC_RXCFG); in gem_start_dma()
1208 gem_enable_ints(gp); in gem_start_dma()
1210 writel(RX_RING_SIZE - 4, gp->regs + RXDMA_KICK); in gem_start_dma()
1215 static void gem_stop_dma(struct gem *gp) in gem_stop_dma() argument
1220 val = readl(gp->regs + TXDMA_CFG); in gem_stop_dma()
1221 writel(val & ~TXDMA_CFG_ENABLE, gp->regs + TXDMA_CFG); in gem_stop_dma()
1222 val = readl(gp->regs + RXDMA_CFG); in gem_stop_dma()
1223 writel(val & ~RXDMA_CFG_ENABLE, gp->regs + RXDMA_CFG); in gem_stop_dma()
1224 val = readl(gp->regs + MAC_TXCFG); in gem_stop_dma()
1225 writel(val & ~MAC_TXCFG_ENAB, gp->regs + MAC_TXCFG); in gem_stop_dma()
1226 val = readl(gp->regs + MAC_RXCFG); in gem_stop_dma()
1227 writel(val & ~MAC_RXCFG_ENAB, gp->regs + MAC_RXCFG); in gem_stop_dma()
1229 (void) readl(gp->regs + MAC_RXCFG); in gem_stop_dma()
1236 static void gem_begin_auto_negotiation(struct gem *gp, in gem_begin_auto_negotiation() argument
1249 if (gp->phy_type != phy_mii_mdio0 && in gem_begin_auto_negotiation()
1250 gp->phy_type != phy_mii_mdio1) in gem_begin_auto_negotiation()
1254 if (found_mii_phy(gp)) in gem_begin_auto_negotiation()
1255 features = gp->phy_mii.def->features; in gem_begin_auto_negotiation()
1260 if (gp->phy_mii.advertising != 0) in gem_begin_auto_negotiation()
1261 advertise &= gp->phy_mii.advertising; in gem_begin_auto_negotiation()
1263 autoneg = gp->want_autoneg; in gem_begin_auto_negotiation()
1264 speed = gp->phy_mii.speed; in gem_begin_auto_negotiation()
1265 duplex = gp->phy_mii.duplex; in gem_begin_auto_negotiation()
1300 if (!netif_device_present(gp->dev)) { in gem_begin_auto_negotiation()
1301 gp->phy_mii.autoneg = gp->want_autoneg = autoneg; in gem_begin_auto_negotiation()
1302 gp->phy_mii.speed = speed; in gem_begin_auto_negotiation()
1303 gp->phy_mii.duplex = duplex; in gem_begin_auto_negotiation()
1308 gp->want_autoneg = autoneg; in gem_begin_auto_negotiation()
1310 if (found_mii_phy(gp)) in gem_begin_auto_negotiation()
1311 gp->phy_mii.def->ops->setup_aneg(&gp->phy_mii, advertise); in gem_begin_auto_negotiation()
1312 gp->lstate = link_aneg; in gem_begin_auto_negotiation()
1314 if (found_mii_phy(gp)) in gem_begin_auto_negotiation()
1315 gp->phy_mii.def->ops->setup_forced(&gp->phy_mii, speed, duplex); in gem_begin_auto_negotiation()
1316 gp->lstate = link_force_ok; in gem_begin_auto_negotiation()
1320 gp->timer_ticks = 0; in gem_begin_auto_negotiation()
1321 mod_timer(&gp->link_timer, jiffies + ((12 * HZ) / 10)); in gem_begin_auto_negotiation()
1327 static int gem_set_link_modes(struct gem *gp) in gem_set_link_modes() argument
1329 struct netdev_queue *txq = netdev_get_tx_queue(gp->dev, 0); in gem_set_link_modes()
1337 if (found_mii_phy(gp)) { in gem_set_link_modes()
1338 if (gp->phy_mii.def->ops->read_link(&gp->phy_mii)) in gem_set_link_modes()
1340 full_duplex = (gp->phy_mii.duplex == DUPLEX_FULL); in gem_set_link_modes()
1341 speed = gp->phy_mii.speed; in gem_set_link_modes()
1342 pause = gp->phy_mii.pause; in gem_set_link_modes()
1343 } else if (gp->phy_type == phy_serialink || in gem_set_link_modes()
1344 gp->phy_type == phy_serdes) { in gem_set_link_modes()
1345 u32 pcs_lpa = readl(gp->regs + PCS_MIILP); in gem_set_link_modes()
1347 if ((pcs_lpa & PCS_MIIADV_FD) || gp->phy_type == phy_serdes) in gem_set_link_modes()
1352 netif_info(gp, link, gp->dev, "Link is up at %d Mbps, %s-duplex\n", in gem_set_link_modes()
1367 writel(val, gp->regs + MAC_TXCFG); in gem_set_link_modes()
1371 (gp->phy_type == phy_mii_mdio0 || in gem_set_link_modes()
1372 gp->phy_type == phy_mii_mdio1)) { in gem_set_link_modes()
1381 writel(val, gp->regs + MAC_XIFCFG); in gem_set_link_modes()
1387 val = readl(gp->regs + MAC_TXCFG); in gem_set_link_modes()
1388 writel(val | MAC_TXCFG_TCE, gp->regs + MAC_TXCFG); in gem_set_link_modes()
1390 val = readl(gp->regs + MAC_RXCFG); in gem_set_link_modes()
1391 writel(val | MAC_RXCFG_RCE, gp->regs + MAC_RXCFG); in gem_set_link_modes()
1393 val = readl(gp->regs + MAC_TXCFG); in gem_set_link_modes()
1394 writel(val & ~MAC_TXCFG_TCE, gp->regs + MAC_TXCFG); in gem_set_link_modes()
1396 val = readl(gp->regs + MAC_RXCFG); in gem_set_link_modes()
1397 writel(val & ~MAC_RXCFG_RCE, gp->regs + MAC_RXCFG); in gem_set_link_modes()
1400 if (gp->phy_type == phy_serialink || in gem_set_link_modes()
1401 gp->phy_type == phy_serdes) { in gem_set_link_modes()
1402 u32 pcs_lpa = readl(gp->regs + PCS_MIILP); in gem_set_link_modes()
1409 writel(512, gp->regs + MAC_STIME); in gem_set_link_modes()
1411 writel(64, gp->regs + MAC_STIME); in gem_set_link_modes()
1412 val = readl(gp->regs + MAC_MCCFG); in gem_set_link_modes()
1417 writel(val, gp->regs + MAC_MCCFG); in gem_set_link_modes()
1419 gem_start_dma(gp); in gem_set_link_modes()
1423 if (netif_msg_link(gp)) { in gem_set_link_modes()
1425 netdev_info(gp->dev, in gem_set_link_modes()
1427 gp->rx_fifo_sz, in gem_set_link_modes()
1428 gp->rx_pause_off, in gem_set_link_modes()
1429 gp->rx_pause_on); in gem_set_link_modes()
1431 netdev_info(gp->dev, "Pause is disabled\n"); in gem_set_link_modes()
1438 static int gem_mdio_link_not_up(struct gem *gp) in gem_mdio_link_not_up() argument
1440 switch (gp->lstate) { in gem_mdio_link_not_up()
1442 netif_info(gp, link, gp->dev, in gem_mdio_link_not_up()
1444 gp->phy_mii.def->ops->setup_forced(&gp->phy_mii, in gem_mdio_link_not_up()
1445 gp->last_forced_speed, DUPLEX_HALF); in gem_mdio_link_not_up()
1446 gp->timer_ticks = 5; in gem_mdio_link_not_up()
1447 gp->lstate = link_force_ok; in gem_mdio_link_not_up()
1454 if (gp->phy_mii.def->magic_aneg) in gem_mdio_link_not_up()
1456 netif_info(gp, link, gp->dev, "switching to forced 100bt\n"); in gem_mdio_link_not_up()
1458 gp->phy_mii.def->ops->setup_forced(&gp->phy_mii, SPEED_100, in gem_mdio_link_not_up()
1460 gp->timer_ticks = 5; in gem_mdio_link_not_up()
1461 gp->lstate = link_force_try; in gem_mdio_link_not_up()
1468 if (gp->phy_mii.speed == SPEED_100) { in gem_mdio_link_not_up()
1469 gp->phy_mii.def->ops->setup_forced(&gp->phy_mii, SPEED_10, in gem_mdio_link_not_up()
1471 gp->timer_ticks = 5; in gem_mdio_link_not_up()
1472 netif_info(gp, link, gp->dev, in gem_mdio_link_not_up()
1484 struct gem *gp = from_timer(gp, t, link_timer); in gem_link_timer() local
1485 struct net_device *dev = gp->dev; in gem_link_timer()
1489 if (gp->reset_task_pending) in gem_link_timer()
1492 if (gp->phy_type == phy_serialink || in gem_link_timer()
1493 gp->phy_type == phy_serdes) { in gem_link_timer()
1494 u32 val = readl(gp->regs + PCS_MIISTAT); in gem_link_timer()
1497 val = readl(gp->regs + PCS_MIISTAT); in gem_link_timer()
1500 if (gp->lstate == link_up) in gem_link_timer()
1503 gp->lstate = link_up; in gem_link_timer()
1505 (void)gem_set_link_modes(gp); in gem_link_timer()
1509 if (found_mii_phy(gp) && gp->phy_mii.def->ops->poll_link(&gp->phy_mii)) { in gem_link_timer()
1515 if (gp->lstate == link_force_try && gp->want_autoneg) { in gem_link_timer()
1516 gp->lstate = link_force_ret; in gem_link_timer()
1517 gp->last_forced_speed = gp->phy_mii.speed; in gem_link_timer()
1518 gp->timer_ticks = 5; in gem_link_timer()
1519 if (netif_msg_link(gp)) in gem_link_timer()
1522 gp->phy_mii.def->ops->setup_aneg(&gp->phy_mii, gp->phy_mii.advertising); in gem_link_timer()
1523 } else if (gp->lstate != link_up) { in gem_link_timer()
1524 gp->lstate = link_up; in gem_link_timer()
1526 if (gem_set_link_modes(gp)) in gem_link_timer()
1533 if (gp->lstate == link_up) { in gem_link_timer()
1534 gp->lstate = link_down; in gem_link_timer()
1535 netif_info(gp, link, dev, "Link down\n"); in gem_link_timer()
1537 gem_schedule_reset(gp); in gem_link_timer()
1540 } else if (++gp->timer_ticks > 10) { in gem_link_timer()
1541 if (found_mii_phy(gp)) in gem_link_timer()
1542 restart_aneg = gem_mdio_link_not_up(gp); in gem_link_timer()
1548 gem_begin_auto_negotiation(gp, NULL); in gem_link_timer()
1552 mod_timer(&gp->link_timer, jiffies + ((12 * HZ) / 10)); in gem_link_timer()
1555 static void gem_clean_rings(struct gem *gp) in gem_clean_rings() argument
1557 struct gem_init_block *gb = gp->init_block; in gem_clean_rings()
1566 if (gp->rx_skbs[i] != NULL) { in gem_clean_rings()
1567 skb = gp->rx_skbs[i]; in gem_clean_rings()
1569 dma_unmap_page(&gp->pdev->dev, dma_addr, in gem_clean_rings()
1570 RX_BUF_ALLOC_SIZE(gp), in gem_clean_rings()
1573 gp->rx_skbs[i] = NULL; in gem_clean_rings()
1581 if (gp->tx_skbs[i] != NULL) { in gem_clean_rings()
1585 skb = gp->tx_skbs[i]; in gem_clean_rings()
1586 gp->tx_skbs[i] = NULL; in gem_clean_rings()
1593 dma_unmap_page(&gp->pdev->dev, dma_addr, in gem_clean_rings()
1605 static void gem_init_rings(struct gem *gp) in gem_init_rings() argument
1607 struct gem_init_block *gb = gp->init_block; in gem_init_rings()
1608 struct net_device *dev = gp->dev; in gem_init_rings()
1612 gp->rx_new = gp->rx_old = gp->tx_new = gp->tx_old = 0; in gem_init_rings()
1614 gem_clean_rings(gp); in gem_init_rings()
1616 gp->rx_buf_sz = max(dev->mtu + ETH_HLEN + VLAN_HLEN, in gem_init_rings()
1623 skb = gem_alloc_skb(dev, RX_BUF_ALLOC_SIZE(gp), GFP_KERNEL); in gem_init_rings()
1630 gp->rx_skbs[i] = skb; in gem_init_rings()
1631 skb_put(skb, (gp->rx_buf_sz + RX_OFFSET)); in gem_init_rings()
1632 dma_addr = dma_map_page(&gp->pdev->dev, in gem_init_rings()
1635 RX_BUF_ALLOC_SIZE(gp), in gem_init_rings()
1639 rxd->status_word = cpu_to_le64(RXDCTRL_FRESH(gp)); in gem_init_rings()
1654 static void gem_init_phy(struct gem *gp) in gem_init_phy() argument
1659 mifcfg = readl(gp->regs + MIF_CFG); in gem_init_phy()
1661 writel(mifcfg, gp->regs + MIF_CFG); in gem_init_phy()
1663 if (gp->pdev->vendor == PCI_VENDOR_ID_APPLE) { in gem_init_phy()
1672 pmac_call_feature(PMAC_FTR_GMAC_PHY_RESET, gp->of_node, 0, 0); in gem_init_phy()
1678 sungem_phy_write(gp, MII_BMCR, BMCR_RESET); in gem_init_phy()
1680 if (sungem_phy_read(gp, MII_BMCR) != 0xffff) in gem_init_phy()
1683 netdev_warn(gp->dev, "GMAC PHY not responding !\n"); in gem_init_phy()
1687 if (gp->pdev->vendor == PCI_VENDOR_ID_SUN && in gem_init_phy()
1688 gp->pdev->device == PCI_DEVICE_ID_SUN_GEM) { in gem_init_phy()
1692 if (gp->phy_type == phy_mii_mdio0 || in gem_init_phy()
1693 gp->phy_type == phy_mii_mdio1) { in gem_init_phy()
1695 } else if (gp->phy_type == phy_serialink) { in gem_init_phy()
1701 writel(val, gp->regs + PCS_DMODE); in gem_init_phy()
1704 if (gp->phy_type == phy_mii_mdio0 || in gem_init_phy()
1705 gp->phy_type == phy_mii_mdio1) { in gem_init_phy()
1707 sungem_phy_probe(&gp->phy_mii, gp->mii_phy_addr); in gem_init_phy()
1710 if (gp->phy_mii.def && gp->phy_mii.def->ops->init) in gem_init_phy()
1711 gp->phy_mii.def->ops->init(&gp->phy_mii); in gem_init_phy()
1713 gem_pcs_reset(gp); in gem_init_phy()
1714 gem_pcs_reinit_adv(gp); in gem_init_phy()
1718 gp->timer_ticks = 0; in gem_init_phy()
1719 gp->lstate = link_down; in gem_init_phy()
1720 netif_carrier_off(gp->dev); in gem_init_phy()
1723 if (gp->phy_type == phy_mii_mdio0 || in gem_init_phy()
1724 gp->phy_type == phy_mii_mdio1) in gem_init_phy()
1725 netdev_info(gp->dev, "Found %s PHY\n", in gem_init_phy()
1726 gp->phy_mii.def ? gp->phy_mii.def->name : "no"); in gem_init_phy()
1728 gem_begin_auto_negotiation(gp, NULL); in gem_init_phy()
1731 static void gem_init_dma(struct gem *gp) in gem_init_dma() argument
1733 u64 desc_dma = (u64) gp->gblock_dvma; in gem_init_dma()
1737 writel(val, gp->regs + TXDMA_CFG); in gem_init_dma()
1739 writel(desc_dma >> 32, gp->regs + TXDMA_DBHI); in gem_init_dma()
1740 writel(desc_dma & 0xffffffff, gp->regs + TXDMA_DBLOW); in gem_init_dma()
1743 writel(0, gp->regs + TXDMA_KICK); in gem_init_dma()
1747 writel(val, gp->regs + RXDMA_CFG); in gem_init_dma()
1749 writel(desc_dma >> 32, gp->regs + RXDMA_DBHI); in gem_init_dma()
1750 writel(desc_dma & 0xffffffff, gp->regs + RXDMA_DBLOW); in gem_init_dma()
1752 writel(RX_RING_SIZE - 4, gp->regs + RXDMA_KICK); in gem_init_dma()
1754 val = (((gp->rx_pause_off / 64) << 0) & RXDMA_PTHRESH_OFF); in gem_init_dma()
1755 val |= (((gp->rx_pause_on / 64) << 12) & RXDMA_PTHRESH_ON); in gem_init_dma()
1756 writel(val, gp->regs + RXDMA_PTHRESH); in gem_init_dma()
1758 if (readl(gp->regs + GREG_BIFCFG) & GREG_BIFCFG_M66EN) in gem_init_dma()
1761 gp->regs + RXDMA_BLANK); in gem_init_dma()
1765 gp->regs + RXDMA_BLANK); in gem_init_dma()
1768 static u32 gem_setup_multicast(struct gem *gp) in gem_setup_multicast() argument
1773 if ((gp->dev->flags & IFF_ALLMULTI) || in gem_setup_multicast()
1774 (netdev_mc_count(gp->dev) > 256)) { in gem_setup_multicast()
1776 writel(0xffff, gp->regs + MAC_HASH0 + (i << 2)); in gem_setup_multicast()
1778 } else if (gp->dev->flags & IFF_PROMISC) { in gem_setup_multicast()
1787 netdev_for_each_mc_addr(ha, gp->dev) { in gem_setup_multicast()
1793 writel(hash_table[i], gp->regs + MAC_HASH0 + (i << 2)); in gem_setup_multicast()
1800 static void gem_init_mac(struct gem *gp) in gem_init_mac() argument
1802 const unsigned char *e = &gp->dev->dev_addr[0]; in gem_init_mac()
1804 writel(0x1bf0, gp->regs + MAC_SNDPAUSE); in gem_init_mac()
1806 writel(0x00, gp->regs + MAC_IPG0); in gem_init_mac()
1807 writel(0x08, gp->regs + MAC_IPG1); in gem_init_mac()
1808 writel(0x04, gp->regs + MAC_IPG2); in gem_init_mac()
1809 writel(0x40, gp->regs + MAC_STIME); in gem_init_mac()
1810 writel(0x40, gp->regs + MAC_MINFSZ); in gem_init_mac()
1813 writel(0x20000000 | (gp->rx_buf_sz + 4), gp->regs + MAC_MAXFSZ); in gem_init_mac()
1815 writel(0x07, gp->regs + MAC_PASIZE); in gem_init_mac()
1816 writel(0x04, gp->regs + MAC_JAMSIZE); in gem_init_mac()
1817 writel(0x10, gp->regs + MAC_ATTLIM); in gem_init_mac()
1818 writel(0x8808, gp->regs + MAC_MCTYPE); in gem_init_mac()
1820 writel((e[5] | (e[4] << 8)) & 0x3ff, gp->regs + MAC_RANDSEED); in gem_init_mac()
1822 writel((e[4] << 8) | e[5], gp->regs + MAC_ADDR0); in gem_init_mac()
1823 writel((e[2] << 8) | e[3], gp->regs + MAC_ADDR1); in gem_init_mac()
1824 writel((e[0] << 8) | e[1], gp->regs + MAC_ADDR2); in gem_init_mac()
1826 writel(0, gp->regs + MAC_ADDR3); in gem_init_mac()
1827 writel(0, gp->regs + MAC_ADDR4); in gem_init_mac()
1828 writel(0, gp->regs + MAC_ADDR5); in gem_init_mac()
1830 writel(0x0001, gp->regs + MAC_ADDR6); in gem_init_mac()
1831 writel(0xc200, gp->regs + MAC_ADDR7); in gem_init_mac()
1832 writel(0x0180, gp->regs + MAC_ADDR8); in gem_init_mac()
1834 writel(0, gp->regs + MAC_AFILT0); in gem_init_mac()
1835 writel(0, gp->regs + MAC_AFILT1); in gem_init_mac()
1836 writel(0, gp->regs + MAC_AFILT2); in gem_init_mac()
1837 writel(0, gp->regs + MAC_AF21MSK); in gem_init_mac()
1838 writel(0, gp->regs + MAC_AF0MSK); in gem_init_mac()
1840 gp->mac_rx_cfg = gem_setup_multicast(gp); in gem_init_mac()
1842 gp->mac_rx_cfg |= MAC_RXCFG_SFCS; in gem_init_mac()
1844 writel(0, gp->regs + MAC_NCOLL); in gem_init_mac()
1845 writel(0, gp->regs + MAC_FASUCC); in gem_init_mac()
1846 writel(0, gp->regs + MAC_ECOLL); in gem_init_mac()
1847 writel(0, gp->regs + MAC_LCOLL); in gem_init_mac()
1848 writel(0, gp->regs + MAC_DTIMER); in gem_init_mac()
1849 writel(0, gp->regs + MAC_PATMPS); in gem_init_mac()
1850 writel(0, gp->regs + MAC_RFCTR); in gem_init_mac()
1851 writel(0, gp->regs + MAC_LERR); in gem_init_mac()
1852 writel(0, gp->regs + MAC_AERR); in gem_init_mac()
1853 writel(0, gp->regs + MAC_FCSERR); in gem_init_mac()
1854 writel(0, gp->regs + MAC_RXCVERR); in gem_init_mac()
1859 writel(0, gp->regs + MAC_TXCFG); in gem_init_mac()
1860 writel(gp->mac_rx_cfg, gp->regs + MAC_RXCFG); in gem_init_mac()
1861 writel(0, gp->regs + MAC_MCCFG); in gem_init_mac()
1862 writel(0, gp->regs + MAC_XIFCFG); in gem_init_mac()
1868 writel(MAC_TXSTAT_XMIT, gp->regs + MAC_TXMASK); in gem_init_mac()
1869 writel(MAC_RXSTAT_RCV, gp->regs + MAC_RXMASK); in gem_init_mac()
1874 writel(0xffffffff, gp->regs + MAC_MCMASK); in gem_init_mac()
1878 if (gp->has_wol) in gem_init_mac()
1879 writel(0, gp->regs + WOL_WAKECSR); in gem_init_mac()
1882 static void gem_init_pause_thresholds(struct gem *gp) in gem_init_pause_thresholds() argument
1891 if (gp->rx_fifo_sz <= (2 * 1024)) { in gem_init_pause_thresholds()
1892 gp->rx_pause_off = gp->rx_pause_on = gp->rx_fifo_sz; in gem_init_pause_thresholds()
1894 int max_frame = (gp->rx_buf_sz + 4 + 64) & ~63; in gem_init_pause_thresholds()
1895 int off = (gp->rx_fifo_sz - (max_frame * 2)); in gem_init_pause_thresholds()
1898 gp->rx_pause_off = off; in gem_init_pause_thresholds()
1899 gp->rx_pause_on = on; in gem_init_pause_thresholds()
1907 if (gp->pdev->vendor == PCI_VENDOR_ID_APPLE) in gem_init_pause_thresholds()
1914 writel(cfg, gp->regs + GREG_CFG); in gem_init_pause_thresholds()
1919 if (!(readl(gp->regs + GREG_CFG) & GREG_CFG_IBURST)) { in gem_init_pause_thresholds()
1922 writel(cfg, gp->regs + GREG_CFG); in gem_init_pause_thresholds()
1926 static int gem_check_invariants(struct gem *gp) in gem_check_invariants() argument
1928 struct pci_dev *pdev = gp->pdev; in gem_check_invariants()
1936 gp->phy_type = phy_mii_mdio0; in gem_check_invariants()
1937 gp->tx_fifo_sz = readl(gp->regs + TXDMA_FSZ) * 64; in gem_check_invariants()
1938 gp->rx_fifo_sz = readl(gp->regs + RXDMA_FSZ) * 64; in gem_check_invariants()
1939 gp->swrst_base = 0; in gem_check_invariants()
1941 mif_cfg = readl(gp->regs + MIF_CFG); in gem_check_invariants()
1944 writel(mif_cfg, gp->regs + MIF_CFG); in gem_check_invariants()
1945 writel(PCS_DMODE_MGM, gp->regs + PCS_DMODE); in gem_check_invariants()
1946 writel(MAC_XIFCFG_OE, gp->regs + MAC_XIFCFG); in gem_check_invariants()
1952 if (gp->pdev->device == PCI_DEVICE_ID_APPLE_K2_GMAC) in gem_check_invariants()
1953 gp->mii_phy_addr = 1; in gem_check_invariants()
1955 gp->mii_phy_addr = 0; in gem_check_invariants()
1960 mif_cfg = readl(gp->regs + MIF_CFG); in gem_check_invariants()
1979 gp->phy_type = phy_mii_mdio1; in gem_check_invariants()
1981 writel(mif_cfg, gp->regs + MIF_CFG); in gem_check_invariants()
1983 gp->phy_type = phy_mii_mdio0; in gem_check_invariants()
1985 writel(mif_cfg, gp->regs + MIF_CFG); in gem_check_invariants()
1990 p = of_get_property(gp->of_node, "shared-pins", NULL); in gem_check_invariants()
1992 gp->phy_type = phy_serdes; in gem_check_invariants()
1995 gp->phy_type = phy_serialink; in gem_check_invariants()
1997 if (gp->phy_type == phy_mii_mdio1 || in gem_check_invariants()
1998 gp->phy_type == phy_mii_mdio0) { in gem_check_invariants()
2002 gp->mii_phy_addr = i; in gem_check_invariants()
2003 if (sungem_phy_read(gp, MII_BMCR) != 0xffff) in gem_check_invariants()
2011 gp->phy_type = phy_serdes; in gem_check_invariants()
2016 gp->tx_fifo_sz = readl(gp->regs + TXDMA_FSZ) * 64; in gem_check_invariants()
2017 gp->rx_fifo_sz = readl(gp->regs + RXDMA_FSZ) * 64; in gem_check_invariants()
2021 if (gp->tx_fifo_sz != (9 * 1024) || in gem_check_invariants()
2022 gp->rx_fifo_sz != (20 * 1024)) { in gem_check_invariants()
2024 gp->tx_fifo_sz, gp->rx_fifo_sz); in gem_check_invariants()
2027 gp->swrst_base = 0; in gem_check_invariants()
2029 if (gp->tx_fifo_sz != (2 * 1024) || in gem_check_invariants()
2030 gp->rx_fifo_sz != (2 * 1024)) { in gem_check_invariants()
2032 gp->tx_fifo_sz, gp->rx_fifo_sz); in gem_check_invariants()
2035 gp->swrst_base = (64 / 4) << GREG_SWRST_CACHE_SHIFT; in gem_check_invariants()
2042 static void gem_reinit_chip(struct gem *gp) in gem_reinit_chip() argument
2045 gem_reset(gp); in gem_reinit_chip()
2048 gem_disable_ints(gp); in gem_reinit_chip()
2051 gem_init_rings(gp); in gem_reinit_chip()
2054 gem_init_pause_thresholds(gp); in gem_reinit_chip()
2057 gem_init_dma(gp); in gem_reinit_chip()
2058 gem_init_mac(gp); in gem_reinit_chip()
2062 static void gem_stop_phy(struct gem *gp, int wol) in gem_stop_phy() argument
2074 mifcfg = readl(gp->regs + MIF_CFG); in gem_stop_phy()
2076 writel(mifcfg, gp->regs + MIF_CFG); in gem_stop_phy()
2078 if (wol && gp->has_wol) { in gem_stop_phy()
2079 const unsigned char *e = &gp->dev->dev_addr[0]; in gem_stop_phy()
2084 gp->regs + MAC_RXCFG); in gem_stop_phy()
2085 writel((e[4] << 8) | e[5], gp->regs + WOL_MATCH0); in gem_stop_phy()
2086 writel((e[2] << 8) | e[3], gp->regs + WOL_MATCH1); in gem_stop_phy()
2087 writel((e[0] << 8) | e[1], gp->regs + WOL_MATCH2); in gem_stop_phy()
2089 writel(WOL_MCOUNT_N | WOL_MCOUNT_M, gp->regs + WOL_MCOUNT); in gem_stop_phy()
2091 if ((readl(gp->regs + MAC_XIFCFG) & MAC_XIFCFG_GMII) == 0) in gem_stop_phy()
2093 writel(csr, gp->regs + WOL_WAKECSR); in gem_stop_phy()
2095 writel(0, gp->regs + MAC_RXCFG); in gem_stop_phy()
2096 (void)readl(gp->regs + MAC_RXCFG); in gem_stop_phy()
2104 writel(0, gp->regs + MAC_TXCFG); in gem_stop_phy()
2105 writel(0, gp->regs + MAC_XIFCFG); in gem_stop_phy()
2106 writel(0, gp->regs + TXDMA_CFG); in gem_stop_phy()
2107 writel(0, gp->regs + RXDMA_CFG); in gem_stop_phy()
2110 gem_reset(gp); in gem_stop_phy()
2111 writel(MAC_TXRST_CMD, gp->regs + MAC_TXRST); in gem_stop_phy()
2112 writel(MAC_RXRST_CMD, gp->regs + MAC_RXRST); in gem_stop_phy()
2114 if (found_mii_phy(gp) && gp->phy_mii.def->ops->suspend) in gem_stop_phy()
2115 gp->phy_mii.def->ops->suspend(&gp->phy_mii); in gem_stop_phy()
2120 writel(mifcfg | MIF_CFG_BBMODE, gp->regs + MIF_CFG); in gem_stop_phy()
2121 writel(0, gp->regs + MIF_BBCLK); in gem_stop_phy()
2122 writel(0, gp->regs + MIF_BBDATA); in gem_stop_phy()
2123 writel(0, gp->regs + MIF_BBOENAB); in gem_stop_phy()
2124 writel(MAC_XIFCFG_GMII | MAC_XIFCFG_LBCK, gp->regs + MAC_XIFCFG); in gem_stop_phy()
2125 (void) readl(gp->regs + MAC_XIFCFG); in gem_stop_phy()
2131 struct gem *gp = netdev_priv(dev); in gem_do_start() local
2134 pci_set_master(gp->pdev); in gem_do_start()
2137 gem_reinit_chip(gp); in gem_do_start()
2140 rc = request_irq(gp->pdev->irq, gem_interrupt, in gem_do_start()
2145 gem_reset(gp); in gem_do_start()
2146 gem_clean_rings(gp); in gem_do_start()
2147 gem_put_cell(gp); in gem_do_start()
2157 gem_netif_start(gp); in gem_do_start()
2163 gem_init_phy(gp); in gem_do_start()
2170 struct gem *gp = netdev_priv(dev); in gem_do_stop() local
2173 gem_netif_stop(gp); in gem_do_stop()
2180 gem_disable_ints(gp); in gem_do_stop()
2183 del_timer_sync(&gp->link_timer); in gem_do_stop()
2194 gp->reset_task_pending = 0; in gem_do_stop()
2197 gem_stop_dma(gp); in gem_do_stop()
2200 gem_reset(gp); in gem_do_stop()
2204 gem_clean_rings(gp); in gem_do_stop()
2207 free_irq(gp->pdev->irq, (void *) dev); in gem_do_stop()
2210 gem_stop_phy(gp, wol); in gem_do_stop()
2215 struct gem *gp = container_of(work, struct gem, reset_task); in gem_reset_task() local
2225 if (!netif_device_present(gp->dev) || in gem_reset_task()
2226 !netif_running(gp->dev) || in gem_reset_task()
2227 !gp->reset_task_pending) { in gem_reset_task()
2233 del_timer_sync(&gp->link_timer); in gem_reset_task()
2236 gem_netif_stop(gp); in gem_reset_task()
2239 gem_reinit_chip(gp); in gem_reset_task()
2240 if (gp->lstate == link_up) in gem_reset_task()
2241 gem_set_link_modes(gp); in gem_reset_task()
2244 gem_netif_start(gp); in gem_reset_task()
2247 gp->reset_task_pending = 0; in gem_reset_task()
2252 if (gp->lstate != link_up) in gem_reset_task()
2253 gem_begin_auto_negotiation(gp, NULL); in gem_reset_task()
2255 mod_timer(&gp->link_timer, jiffies + ((12 * HZ) / 10)); in gem_reset_task()
2262 struct gem *gp = netdev_priv(dev); in gem_open() local
2270 gem_get_cell(gp); in gem_open()
2273 rc = pci_enable_device(gp->pdev); in gem_open()
2280 gem_put_cell(gp); in gem_open()
2291 struct gem *gp = netdev_priv(dev); in gem_close() local
2297 pci_disable_device(gp->pdev); in gem_close()
2300 if (!gp->asleep_wol) in gem_close()
2301 gem_put_cell(gp); in gem_close()
2309 struct gem *gp = netdev_priv(dev); in gem_suspend() local
2325 (gp->wake_on_lan && netif_running(dev)) ? in gem_suspend()
2334 gp->asleep_wol = !!gp->wake_on_lan; in gem_suspend()
2335 gem_do_stop(dev, gp->asleep_wol); in gem_suspend()
2338 if (!gp->asleep_wol) in gem_suspend()
2339 gem_put_cell(gp); in gem_suspend()
2350 struct gem *gp = netdev_priv(dev); in gem_resume() local
2365 gem_get_cell(gp); in gem_resume()
2375 if (gp->asleep_wol) in gem_resume()
2376 gem_put_cell(gp); in gem_resume()
2386 struct gem *gp = netdev_priv(dev); in gem_get_stats() local
2399 if (WARN_ON(!gp->cell_enabled)) in gem_get_stats()
2402 dev->stats.rx_crc_errors += readl(gp->regs + MAC_FCSERR); in gem_get_stats()
2403 writel(0, gp->regs + MAC_FCSERR); in gem_get_stats()
2405 dev->stats.rx_frame_errors += readl(gp->regs + MAC_AERR); in gem_get_stats()
2406 writel(0, gp->regs + MAC_AERR); in gem_get_stats()
2408 dev->stats.rx_length_errors += readl(gp->regs + MAC_LERR); in gem_get_stats()
2409 writel(0, gp->regs + MAC_LERR); in gem_get_stats()
2411 dev->stats.tx_aborted_errors += readl(gp->regs + MAC_ECOLL); in gem_get_stats()
2413 (readl(gp->regs + MAC_ECOLL) + readl(gp->regs + MAC_LCOLL)); in gem_get_stats()
2414 writel(0, gp->regs + MAC_ECOLL); in gem_get_stats()
2415 writel(0, gp->regs + MAC_LCOLL); in gem_get_stats()
2424 struct gem *gp = netdev_priv(dev); in gem_set_mac_address() local
2436 if (WARN_ON(!gp->cell_enabled)) in gem_set_mac_address()
2439 writel((e[4] << 8) | e[5], gp->regs + MAC_ADDR0); in gem_set_mac_address()
2440 writel((e[2] << 8) | e[3], gp->regs + MAC_ADDR1); in gem_set_mac_address()
2441 writel((e[0] << 8) | e[1], gp->regs + MAC_ADDR2); in gem_set_mac_address()
2448 struct gem *gp = netdev_priv(dev); in gem_set_multicast() local
2456 if (gp->reset_task_pending || WARN_ON(!gp->cell_enabled)) in gem_set_multicast()
2459 rxcfg = readl(gp->regs + MAC_RXCFG); in gem_set_multicast()
2460 rxcfg_new = gem_setup_multicast(gp); in gem_set_multicast()
2464 gp->mac_rx_cfg = rxcfg_new; in gem_set_multicast()
2466 writel(rxcfg & ~MAC_RXCFG_ENAB, gp->regs + MAC_RXCFG); in gem_set_multicast()
2467 while (readl(gp->regs + MAC_RXCFG) & MAC_RXCFG_ENAB) { in gem_set_multicast()
2476 writel(rxcfg, gp->regs + MAC_RXCFG); in gem_set_multicast()
2489 struct gem *gp = netdev_priv(dev); in gem_change_mtu() local
2498 if (WARN_ON(!gp->cell_enabled)) in gem_change_mtu()
2501 gem_netif_stop(gp); in gem_change_mtu()
2502 gem_reinit_chip(gp); in gem_change_mtu()
2503 if (gp->lstate == link_up) in gem_change_mtu()
2504 gem_set_link_modes(gp); in gem_change_mtu()
2505 gem_netif_start(gp); in gem_change_mtu()
2512 struct gem *gp = netdev_priv(dev); in gem_get_drvinfo() local
2516 strscpy(info->bus_info, pci_name(gp->pdev), sizeof(info->bus_info)); in gem_get_drvinfo()
2522 struct gem *gp = netdev_priv(dev); in gem_get_link_ksettings() local
2525 if (gp->phy_type == phy_mii_mdio0 || in gem_get_link_ksettings()
2526 gp->phy_type == phy_mii_mdio1) { in gem_get_link_ksettings()
2527 if (gp->phy_mii.def) in gem_get_link_ksettings()
2528 supported = gp->phy_mii.def->features; in gem_get_link_ksettings()
2538 cmd->base.autoneg = gp->want_autoneg; in gem_get_link_ksettings()
2539 cmd->base.speed = gp->phy_mii.speed; in gem_get_link_ksettings()
2540 cmd->base.duplex = gp->phy_mii.duplex; in gem_get_link_ksettings()
2541 advertising = gp->phy_mii.advertising; in gem_get_link_ksettings()
2562 if (gp->phy_type == phy_serdes) { in gem_get_link_ksettings()
2569 if (gp->lstate == link_up) in gem_get_link_ksettings()
2587 struct gem *gp = netdev_priv(dev); in gem_set_link_ksettings() local
2612 if (netif_device_present(gp->dev)) { in gem_set_link_ksettings()
2613 del_timer_sync(&gp->link_timer); in gem_set_link_ksettings()
2614 gem_begin_auto_negotiation(gp, cmd); in gem_set_link_ksettings()
2622 struct gem *gp = netdev_priv(dev); in gem_nway_reset() local
2624 if (!gp->want_autoneg) in gem_nway_reset()
2628 if (netif_device_present(gp->dev)) { in gem_nway_reset()
2629 del_timer_sync(&gp->link_timer); in gem_nway_reset()
2630 gem_begin_auto_negotiation(gp, NULL); in gem_nway_reset()
2638 struct gem *gp = netdev_priv(dev); in gem_get_msglevel() local
2639 return gp->msg_enable; in gem_get_msglevel()
2644 struct gem *gp = netdev_priv(dev); in gem_set_msglevel() local
2645 gp->msg_enable = value; in gem_set_msglevel()
2656 struct gem *gp = netdev_priv(dev); in gem_get_wol() local
2659 if (gp->has_wol) { in gem_get_wol()
2661 wol->wolopts = gp->wake_on_lan; in gem_get_wol()
2670 struct gem *gp = netdev_priv(dev); in gem_set_wol() local
2672 if (!gp->has_wol) in gem_set_wol()
2674 gp->wake_on_lan = wol->wolopts & WOL_SUPPORTED_MASK; in gem_set_wol()
2692 struct gem *gp = netdev_priv(dev); in gem_ioctl() local
2703 data->phy_id = gp->mii_phy_addr; in gem_ioctl()
2707 data->val_out = __sungem_phy_read(gp, data->phy_id & 0x1f, in gem_ioctl()
2713 __sungem_phy_write(gp, data->phy_id & 0x1f, data->reg_num & 0x1f, in gem_ioctl()
2773 static int gem_get_device_address(struct gem *gp) in gem_get_device_address() argument
2776 struct net_device *dev = gp->dev; in gem_get_device_address()
2779 addr = of_get_property(gp->of_node, "local-mac-address", NULL); in gem_get_device_address()
2793 get_gem_mac_nonobp(gp->pdev, addr); in gem_get_device_address()
2794 eth_hw_addr_set(gp->dev, addr); in gem_get_device_address()
2804 struct gem *gp = netdev_priv(dev); in gem_remove_one() local
2809 cancel_work_sync(&gp->reset_task); in gem_remove_one()
2813 gp->init_block, gp->gblock_dvma); in gem_remove_one()
2814 iounmap(gp->regs); in gem_remove_one()
2837 struct gem *gp; in gem_init_one() local
2886 dev = alloc_etherdev(sizeof(*gp)); in gem_init_one()
2893 gp = netdev_priv(dev); in gem_init_one()
2901 gp->pdev = pdev; in gem_init_one()
2902 gp->dev = dev; in gem_init_one()
2904 gp->msg_enable = DEFAULT_MSG; in gem_init_one()
2906 timer_setup(&gp->link_timer, gem_link_timer, 0); in gem_init_one()
2908 INIT_WORK(&gp->reset_task, gem_reset_task); in gem_init_one()
2910 gp->lstate = link_down; in gem_init_one()
2911 gp->timer_ticks = 0; in gem_init_one()
2914 gp->regs = ioremap(gemreg_base, gemreg_len); in gem_init_one()
2915 if (!gp->regs) { in gem_init_one()
2925 gp->of_node = pci_device_to_OF_node(pdev); in gem_init_one()
2930 gp->has_wol = 1; in gem_init_one()
2933 gem_get_cell(gp); in gem_init_one()
2936 gem_reset(gp); in gem_init_one()
2939 gp->phy_mii.dev = dev; in gem_init_one()
2940 gp->phy_mii.mdio_read = _sungem_phy_read; in gem_init_one()
2941 gp->phy_mii.mdio_write = _sungem_phy_write; in gem_init_one()
2943 gp->phy_mii.platform_data = gp->of_node; in gem_init_one()
2946 gp->want_autoneg = 1; in gem_init_one()
2949 if (gem_check_invariants(gp)) { in gem_init_one()
2957 gp->init_block = dma_alloc_coherent(&pdev->dev, sizeof(struct gem_init_block), in gem_init_one()
2958 &gp->gblock_dvma, GFP_KERNEL); in gem_init_one()
2959 if (!gp->init_block) { in gem_init_one()
2965 err = gem_get_device_address(gp); in gem_init_one()
2970 netif_napi_add(dev, &gp->napi, gem_poll); in gem_init_one()
2999 gem_put_cell(gp); in gem_init_one()
3009 gem_put_cell(gp); in gem_init_one()
3010 iounmap(gp->regs); in gem_init_one()