Lines Matching refs:FZC_DMC
20 #define FZC_DMC 0x680000UL macro
1519 #define RX_DMA_CK_DIV (FZC_DMC + 0x00000UL)
1522 #define DEF_RDC(IDX) (FZC_DMC + 0x00008UL + (IDX) * 0x8UL)
1525 #define PT_DRR_WT(IDX) (FZC_DMC + 0x00028UL + (IDX) * 0x8UL)
1531 #define PT_USE(IDX) (FZC_DMC + 0x00048UL + (IDX) * 0x8UL)
1534 #define RED_RAN_INIT (FZC_DMC + 0x00068UL)
1538 #define RX_ADDR_MD (FZC_DMC + 0x00070UL)
1543 #define RDMC_PRE_PAR_ERR (FZC_DMC + 0x00078UL)
1548 #define RDMC_SHA_PAR_ERR (FZC_DMC + 0x00080UL)
1553 #define RDMC_MEM_ADDR (FZC_DMC + 0x00088UL)
1557 #define RDMC_MEM_DAT0 (FZC_DMC + 0x00090UL)
1560 #define RDMC_MEM_DAT1 (FZC_DMC + 0x00098UL)
1563 #define RDMC_MEM_DAT2 (FZC_DMC + 0x000a0UL)
1566 #define RDMC_MEM_DAT3 (FZC_DMC + 0x000a8UL)
1569 #define RDMC_MEM_DAT4 (FZC_DMC + 0x000b0UL)
1572 #define RX_CTL_DAT_FIFO_STAT (FZC_DMC + 0x000b8UL)
1577 #define RX_CTL_DAT_FIFO_MASK (FZC_DMC + 0x000c0UL)
1582 #define RDMC_TRAINING_VECTOR (FZC_DMC + 0x000c8UL)
1585 #define RX_CTL_DAT_FIFO_STAT_DBG (FZC_DMC + 0x000d0UL)
1595 #define RX_LOG_PAGE_VLD(IDX) (FZC_DMC + 0x20000UL + (IDX) * 0x40UL)
1601 #define RX_LOG_MASK1(IDX) (FZC_DMC + 0x20008UL + (IDX) * 0x40UL)
1604 #define RX_LOG_VAL1(IDX) (FZC_DMC + 0x20010UL + (IDX) * 0x40UL)
1607 #define RX_LOG_MASK2(IDX) (FZC_DMC + 0x20018UL + (IDX) * 0x40UL)
1610 #define RX_LOG_VAL2(IDX) (FZC_DMC + 0x20020UL + (IDX) * 0x40UL)
1613 #define RX_LOG_PAGE_RELO1(IDX) (FZC_DMC + 0x20028UL + (IDX) * 0x40UL)
1616 #define RX_LOG_PAGE_RELO2(IDX) (FZC_DMC + 0x20030UL + (IDX) * 0x40UL)
1619 #define RX_LOG_PAGE_HDL(IDX) (FZC_DMC + 0x20038UL + (IDX) * 0x40UL)
1622 #define TX_LOG_PAGE_VLD(IDX) (FZC_DMC + 0x40000UL + (IDX) * 0x200UL)
1628 #define TX_LOG_MASK1(IDX) (FZC_DMC + 0x40008UL + (IDX) * 0x200UL)
1631 #define TX_LOG_VAL1(IDX) (FZC_DMC + 0x40010UL + (IDX) * 0x200UL)
1634 #define TX_LOG_MASK2(IDX) (FZC_DMC + 0x40018UL + (IDX) * 0x200UL)
1637 #define TX_LOG_VAL2(IDX) (FZC_DMC + 0x40020UL + (IDX) * 0x200UL)
1640 #define TX_LOG_PAGE_RELO1(IDX) (FZC_DMC + 0x40028UL + (IDX) * 0x200UL)
1643 #define TX_LOG_PAGE_RELO2(IDX) (FZC_DMC + 0x40030UL + (IDX) * 0x200UL)
1646 #define TX_LOG_PAGE_HDL(IDX) (FZC_DMC + 0x40038UL + (IDX) * 0x200UL)
1649 #define TX_ADDR_MD (FZC_DMC + 0x45000UL)
1652 #define RDC_RED_PARA(IDX) (FZC_DMC + 0x30000UL + (IDX) * 0x40UL)
1662 #define RED_DIS_CNT(IDX) (FZC_DMC + 0x30008UL + (IDX) * 0x40UL)