Lines Matching +full:rx +full:- +full:burst +full:- +full:length
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 Copyright (C) 2007-2009 STMicroelectronics Ltd
23 #define GMAC_WAKEUP_FILTER 0x00000028 /* Wake-up Frame Filter */
79 #define GMAC_ADDR_HIGH(reg) ((reg > 15) ? 0x00000800 + (reg - 16) * 8 : \
81 #define GMAC_ADDR_LOW(reg) ((reg > 15) ? 0x00000804 + (reg - 16) * 8 : \
108 #define GMAC_CONTROL_BE 0x00200000 /* Frame Burst Enable */
118 #define GMAC_CONTROL_DO 0x00002000 /* Disable Rx Own */
119 #define GMAC_CONTROL_LM 0x00001000 /* Loop-back mode */
151 #define GMAC_FLOW_CTRL_RFE 0x00000004 /* Rx Flow Control Enable */
177 #define GMAC_DEBUG_RXFSTS_MASK GENMASK(9, 8) /* MTL Rx FIFO Fill-level */
183 #define GMAC_DEBUG_RRCSTS_MASK GENMASK(6, 5) /* MTL Rx FIFO Read Controller */
189 #define GMAC_DEBUG_RWCSTS BIT(4) /* MTL Rx FIFO Write Controller Active */
196 /*--- DMA BLOCK defines ---*/
199 #define DMA_BUS_MODE_DSL_MASK 0x0000007c /* Descriptor Skip Length */
201 /* Programmable burst length (passed thorugh platform)*/
202 #define DMA_BUS_MODE_PBL_MASK 0x00003f00 /* Programmable Burst Len */
212 #define DMA_BUS_MODE_FB 0x00010000 /* Fixed burst */
213 #define DMA_BUS_MODE_MB 0x04000000 /* Mixed burst */
214 #define DMA_BUS_MODE_RPBL_MASK 0x007e0000 /* Rx-Programmable Burst Len */
222 #define DMA_HOST_RX_DESC 0x0000104c /* Current Host Rx descriptor */
224 #define DMA_BUS_PR_RATIO_MASK 0x0000c000 /* Rx/Tx priority ratio */
226 #define DMA_BUS_FB 0x00010000 /* Fixed Burst */
228 /* DMA operation mode defines (start/stop tx/rx are placed in common header)*/
278 * 0,00 - Full minus 1KB (only valid when rxfifo >= 4KB and EFC enabled)
279 * 0,01 - Full minus 2KB (only valid when rxfifo >= 4KB and EFC enabled)
280 * 0,10 - Full minus 3KB (only valid when rxfifo >= 4KB and EFC enabled)
281 * 0,11 - Full minus 4KB (only valid when rxfifo > 4KB and EFC enabled)
282 * 1,00 - Full minus 5KB (only valid when rxfifo > 8KB and EFC enabled)
283 * 1,01 - Full minus 6KB (only valid when rxfifo > 8KB and EFC enabled)
284 * 1,10 - Full minus 7KB (only valid when rxfifo > 8KB and EFC enabled)
285 * 1,11 - Reserved