stmicro/stmmac/dwmac1000.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
3   Copyright (C) 2007-2009  STMicroelectronics Ltd
15 #define GMAC_FRAME_FILTER	0x00000004	/* Frame Filter */
23 #define GMAC_WAKEUP_FILTER	0x00000028	/* Wake-up Frame Filter */
79 #define GMAC_ADDR_HIGH(reg)	((reg > 15) ? 0x00000800 + (reg - 16) * 8 : \
81 #define GMAC_ADDR_LOW(reg)	((reg > 15) ? 0x00000804 + (reg - 16) * 8 : \
108 #define GMAC_CONTROL_BE	0x00200000	/* Frame Burst Enable */
109 #define GMAC_CONTROL_JE	0x00100000	/* Jumbo frame */
119 #define GMAC_CONTROL_LM		0x00001000	/* Loop-back mode */
132 /* GMAC Frame Filter defines */
150 #define GMAC_FLOW_CTRL_UP	0x00000008	/* Unicast pause frame enable */
157 #define GMAC_DEBUG_TXSTSFSTS	BIT(25)	/* MTL TxStatus FIFO Full Status */
168 /* MAC Transmit Frame Controller Status */
177 #define GMAC_DEBUG_RXFSTS_MASK	GENMASK(9, 8) /* MTL Rx FIFO Fill-level */
190 /* MAC Receive Frame Controller FIFO Status */
196 /*--- DMA BLOCK defines ---*/
214 #define DMA_BUS_MODE_RPBL_MASK	0x007e0000	/* Rx-Programmable Burst Len */
278  *   0,00 - Full minus 1KB (only valid when rxfifo >= 4KB and EFC enabled)
279  *   0,01 - Full minus 2KB (only valid when rxfifo >= 4KB and EFC enabled)
280  *   0,10 - Full minus 3KB (only valid when rxfifo >= 4KB and EFC enabled)
281  *   0,11 - Full minus 4KB (only valid when rxfifo > 4KB and EFC enabled)
282  *   1,00 - Full minus 5KB (only valid when rxfifo > 8KB and EFC enabled)
283  *   1,01 - Full minus 6KB (only valid when rxfifo > 8KB and EFC enabled)
284  *   1,10 - Full minus 7KB (only valid when rxfifo > 8KB and EFC enabled)
285  *   1,11 - Reserved
290  * Be sure that bit 3 in GMAC Register 6 is set for Unicast Pause frame
323 #define DMA_CONTROL_OSF	0x00000004	/* Operate on second frame */