Lines Matching +full:ref +full:- +full:clock +full:- +full:period +full:- +full:ns
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2018-19, Linaro Limited
127 return readl(ethqos->rgmii_base + offset); in rgmii_readl()
133 writel(value, ethqos->rgmii_base + offset); in rgmii_writel()
149 struct device *dev = ðqos->pdev->dev; in rgmii_dump()
172 /* Clock rates */
180 if (!phy_interface_mode_is_rgmii(ethqos->phy_mode)) in ethqos_update_link_clk()
185 ethqos->link_clk_rate = RGMII_1000_NOM_CLK_FREQ; in ethqos_update_link_clk()
189 ethqos->link_clk_rate = RGMII_ID_MODE_100_LOW_SVS_CLK_FREQ; in ethqos_update_link_clk()
193 ethqos->link_clk_rate = RGMII_ID_MODE_10_LOW_SVS_CLK_FREQ; in ethqos_update_link_clk()
197 clk_set_rate(ethqos->link_clk, ethqos->link_clk_rate); in ethqos_update_link_clk()
203 if (!ethqos->needs_sgmii_loopback || in qcom_ethqos_set_sgmii_loopback()
204 ethqos->phy_mode != PHY_INTERFACE_MODE_2500BASEX) in qcom_ethqos_set_sgmii_loopback()
322 struct device *dev = ðqos->pdev->dev; in ethqos_dll_configure()
342 if (!ethqos->has_emac_ge_3) { in ethqos_dll_configure()
357 retry--; in ethqos_dll_configure()
374 retry--; in ethqos_dll_configure()
383 if (!ethqos->has_emac_ge_3) { in ethqos_dll_configure()
403 struct device *dev = ðqos->pdev->dev; in ethqos_rgmii_macro_init()
407 /* Determine if the PHY adds a 2 ns TX delay or the MAC handles it */ in ethqos_rgmii_macro_init()
408 if (ethqos->phy_mode == PHY_INTERFACE_MODE_RGMII_ID || in ethqos_rgmii_macro_init()
409 ethqos->phy_mode == PHY_INTERFACE_MODE_RGMII_TXID) in ethqos_rgmii_macro_init()
419 if (ethqos->rgmii_config_loopback_en) in ethqos_rgmii_macro_init()
428 switch (ethqos->speed) { in ethqos_rgmii_macro_init()
450 /* PRG_RCLK_DLY = TCXO period * TCXO_CYCLES_CNT / 2 * RX delay ns, in ethqos_rgmii_macro_init()
451 * in practice this becomes PRG_RCLK_DLY = 52 * 4 / 2 * RX delay ns in ethqos_rgmii_macro_init()
453 if (ethqos->has_emac_ge_3) { in ethqos_rgmii_macro_init()
454 /* 0.9 ns */ in ethqos_rgmii_macro_init()
458 /* 1.8 ns */ in ethqos_rgmii_macro_init()
488 if (ethqos->has_emac_ge_3) in ethqos_rgmii_macro_init()
528 if (ethqos->has_emac_ge_3) in ethqos_rgmii_macro_init()
548 dev_err(dev, "Invalid speed %d\n", ethqos->speed); in ethqos_rgmii_macro_init()
549 return -EINVAL; in ethqos_rgmii_macro_init()
557 struct device *dev = ðqos->pdev->dev; in ethqos_configure_rgmii()
562 for (i = 0; i < ethqos->num_por; i++) in ethqos_configure_rgmii()
563 rgmii_writel(ethqos, ethqos->por[i].value, in ethqos_configure_rgmii()
564 ethqos->por[i].offset); in ethqos_configure_rgmii()
577 if (ethqos->has_emac_ge_3) { in ethqos_configure_rgmii()
578 if (ethqos->speed == SPEED_1000) { in ethqos_configure_rgmii()
596 if (ethqos->speed != SPEED_100 && ethqos->speed != SPEED_10) { in ethqos_configure_rgmii()
607 if (!ethqos->has_emac_ge_3) in ethqos_configure_rgmii()
617 retry--; in ethqos_configure_rgmii()
623 if (ethqos->speed == SPEED_1000) in ethqos_configure_rgmii()
633 if (ethqos->serdes_speed != speed) { in ethqos_set_serdes_speed()
634 phy_set_speed(ethqos->serdes_phy, speed); in ethqos_set_serdes_speed()
635 ethqos->serdes_speed = speed; in ethqos_set_serdes_speed()
644 struct net_device *dev = platform_get_drvdata(ethqos->pdev); in ethqos_configure_sgmii()
648 val = readl(ethqos->mac_base + MAC_CTRL_REG); in ethqos_configure_sgmii()
650 switch (ethqos->speed) { in ethqos_configure_sgmii()
657 stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 0, 0, 0); in ethqos_configure_sgmii()
665 stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0); in ethqos_configure_sgmii()
670 stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0); in ethqos_configure_sgmii()
680 stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0); in ethqos_configure_sgmii()
684 writel(val, ethqos->mac_base + MAC_CTRL_REG); in ethqos_configure_sgmii()
693 priv->plat->max_speed = 2500; in qcom_ethqos_speed_mode_2500()
694 priv->plat->phy_interface = PHY_INTERFACE_MODE_2500BASEX; in qcom_ethqos_speed_mode_2500()
699 return ethqos->configure_func(ethqos); in ethqos_configure()
707 ethqos->speed = speed; in ethqos_fix_mac_speed()
717 ret = phy_init(ethqos->serdes_phy); in qcom_ethqos_serdes_powerup()
721 ret = phy_power_on(ethqos->serdes_phy); in qcom_ethqos_serdes_powerup()
725 return phy_set_speed(ethqos->serdes_phy, ethqos->speed); in qcom_ethqos_serdes_powerup()
732 phy_power_off(ethqos->serdes_phy); in qcom_ethqos_serdes_powerdown()
733 phy_exit(ethqos->serdes_phy); in qcom_ethqos_serdes_powerdown()
742 ret = clk_prepare_enable(ethqos->link_clk); in ethqos_clks_config()
744 dev_err(ðqos->pdev->dev, "link_clk enable failed\n"); in ethqos_clks_config()
748 /* Enable functional clock to prevent DMA reset to timeout due in ethqos_clks_config()
749 * to lacking PHY clock after the hardware block has been power in ethqos_clks_config()
755 clk_disable_unprepare(ethqos->link_clk); in ethqos_clks_config()
768 struct plat_stmmacenet_data *plat_dat = priv->plat; in ethqos_ptp_clk_freq_config()
771 if (!plat_dat->clk_ptp_ref) in ethqos_ptp_clk_freq_config()
774 /* Max the PTP ref clock out to get the best resolution possible */ in ethqos_ptp_clk_freq_config()
775 err = clk_set_rate(plat_dat->clk_ptp_ref, ULONG_MAX); in ethqos_ptp_clk_freq_config()
777 netdev_err(priv->dev, "Failed to max out clk_ptp_ref: %d\n", err); in ethqos_ptp_clk_freq_config()
778 plat_dat->clk_ptp_rate = clk_get_rate(plat_dat->clk_ptp_ref); in ethqos_ptp_clk_freq_config()
780 netdev_dbg(priv->dev, "PTP rate %d\n", plat_dat->clk_ptp_rate); in ethqos_ptp_clk_freq_config()
785 struct device_node *np = pdev->dev.of_node; in qcom_ethqos_probe()
789 struct device *dev = &pdev->dev; in qcom_ethqos_probe()
804 plat_dat->clks_config = ethqos_clks_config; in qcom_ethqos_probe()
808 return -ENOMEM; in qcom_ethqos_probe()
810 ret = of_get_phy_mode(np, ðqos->phy_mode); in qcom_ethqos_probe()
813 switch (ethqos->phy_mode) { in qcom_ethqos_probe()
818 ethqos->configure_func = ethqos_configure_rgmii; in qcom_ethqos_probe()
821 plat_dat->speed_mode_2500 = qcom_ethqos_speed_mode_2500; in qcom_ethqos_probe()
824 ethqos->configure_func = ethqos_configure_sgmii; in qcom_ethqos_probe()
828 phy_modes(ethqos->phy_mode)); in qcom_ethqos_probe()
829 return -EINVAL; in qcom_ethqos_probe()
832 ethqos->pdev = pdev; in qcom_ethqos_probe()
833 ethqos->rgmii_base = devm_platform_ioremap_resource_byname(pdev, "rgmii"); in qcom_ethqos_probe()
834 if (IS_ERR(ethqos->rgmii_base)) in qcom_ethqos_probe()
835 return dev_err_probe(dev, PTR_ERR(ethqos->rgmii_base), in qcom_ethqos_probe()
838 ethqos->mac_base = stmmac_res.addr; in qcom_ethqos_probe()
841 ethqos->por = data->por; in qcom_ethqos_probe()
842 ethqos->num_por = data->num_por; in qcom_ethqos_probe()
843 ethqos->rgmii_config_loopback_en = data->rgmii_config_loopback_en; in qcom_ethqos_probe()
844 ethqos->has_emac_ge_3 = data->has_emac_ge_3; in qcom_ethqos_probe()
845 ethqos->needs_sgmii_loopback = data->needs_sgmii_loopback; in qcom_ethqos_probe()
847 ethqos->link_clk = devm_clk_get(dev, data->link_clk_name ?: "rgmii"); in qcom_ethqos_probe()
848 if (IS_ERR(ethqos->link_clk)) in qcom_ethqos_probe()
849 return dev_err_probe(dev, PTR_ERR(ethqos->link_clk), in qcom_ethqos_probe()
860 ethqos->serdes_phy = devm_phy_optional_get(dev, "serdes"); in qcom_ethqos_probe()
861 if (IS_ERR(ethqos->serdes_phy)) in qcom_ethqos_probe()
862 return dev_err_probe(dev, PTR_ERR(ethqos->serdes_phy), in qcom_ethqos_probe()
865 ethqos->speed = SPEED_1000; in qcom_ethqos_probe()
866 ethqos->serdes_speed = SPEED_1000; in qcom_ethqos_probe()
870 plat_dat->bsp_priv = ethqos; in qcom_ethqos_probe()
871 plat_dat->fix_mac_speed = ethqos_fix_mac_speed; in qcom_ethqos_probe()
872 plat_dat->dump_debug_regs = rgmii_dump; in qcom_ethqos_probe()
873 plat_dat->ptp_clk_freq_config = ethqos_ptp_clk_freq_config; in qcom_ethqos_probe()
874 plat_dat->has_gmac4 = 1; in qcom_ethqos_probe()
875 if (ethqos->has_emac_ge_3) in qcom_ethqos_probe()
876 plat_dat->dwmac4_addrs = &data->dwmac4_addrs; in qcom_ethqos_probe()
877 plat_dat->pmt = 1; in qcom_ethqos_probe()
879 plat_dat->flags |= STMMAC_FLAG_TSO_EN; in qcom_ethqos_probe()
880 if (of_device_is_compatible(np, "qcom,qcs404-ethqos")) in qcom_ethqos_probe()
881 plat_dat->flags |= STMMAC_FLAG_RX_CLK_RUNS_IN_LPI; in qcom_ethqos_probe()
882 if (data->has_integrated_pcs) in qcom_ethqos_probe()
883 plat_dat->flags |= STMMAC_FLAG_HAS_INTEGRATED_PCS; in qcom_ethqos_probe()
884 if (data->dma_addr_width) in qcom_ethqos_probe()
885 plat_dat->host_dma_width = data->dma_addr_width; in qcom_ethqos_probe()
887 if (ethqos->serdes_phy) { in qcom_ethqos_probe()
888 plat_dat->serdes_powerup = qcom_ethqos_serdes_powerup; in qcom_ethqos_probe()
889 plat_dat->serdes_powerdown = qcom_ethqos_serdes_powerdown; in qcom_ethqos_probe()
893 for (i = 1; i < plat_dat->tx_queues_to_use; i++) in qcom_ethqos_probe()
894 plat_dat->tx_queues_cfg[i].tbs_en = 1; in qcom_ethqos_probe()
900 { .compatible = "qcom,qcs404-ethqos", .data = &emac_v2_3_0_data},
901 { .compatible = "qcom,sa8775p-ethqos", .data = &emac_v4_0_0_data},
902 { .compatible = "qcom,sc8280xp-ethqos", .data = &emac_v3_0_0_data},
903 { .compatible = "qcom,sm8150-ethqos", .data = &emac_v2_1_0_data},
911 .name = "qcom-ethqos",