3  * Amlogic Meson8b, Meson8m2 and GXBB DWMAC glue layer
84 	int (*set_phy_mode)(struct meson8b_dwmac *dwmac);
107 static void meson8b_dwmac_mask_bits(struct meson8b_dwmac *dwmac, u32 reg,  in meson8b_dwmac_mask_bits()  argument
112 	data = readl(dwmac->regs + reg);  in meson8b_dwmac_mask_bits()
116 	writel(data, dwmac->regs + reg);  in meson8b_dwmac_mask_bits()
119 static struct clk *meson8b_dwmac_register_clk(struct meson8b_dwmac *dwmac,  in meson8b_dwmac_register_clk()  argument
129 	snprintf(clk_name, sizeof(clk_name), "%s#%s", dev_name(dwmac->dev),  in meson8b_dwmac_register_clk()
140 	return devm_clk_register(dwmac->dev, hw);  in meson8b_dwmac_register_clk()
143 static int meson8b_init_rgmii_tx_clk(struct meson8b_dwmac *dwmac)  in meson8b_init_rgmii_tx_clk()  argument
146 	struct device *dev = dwmac->dev;  in meson8b_init_rgmii_tx_clk()
167 	clk_configs->m250_mux.reg = dwmac->regs + PRG_ETH0;  in meson8b_init_rgmii_tx_clk()
171 	clk = meson8b_dwmac_register_clk(dwmac, "m250_sel", mux_parents,  in meson8b_init_rgmii_tx_clk()
178 	clk_configs->m250_div.reg = dwmac->regs + PRG_ETH0;  in meson8b_init_rgmii_tx_clk()
184 	clk = meson8b_dwmac_register_clk(dwmac, "m250_div", &parent_data, 1,  in meson8b_init_rgmii_tx_clk()
193 	clk = meson8b_dwmac_register_clk(dwmac, "fixed_div2", &parent_data, 1,  in meson8b_init_rgmii_tx_clk()
200 	clk_configs->rgmii_tx_en.reg = dwmac->regs + PRG_ETH0;  in meson8b_init_rgmii_tx_clk()
202 	clk = meson8b_dwmac_register_clk(dwmac, "rgmii_tx_en", &parent_data, 1,  in meson8b_init_rgmii_tx_clk()
208 	dwmac->rgmii_tx_clk = clk;  in meson8b_init_rgmii_tx_clk()
213 static int meson8b_set_phy_mode(struct meson8b_dwmac *dwmac)  in meson8b_set_phy_mode()  argument
215 	switch (dwmac->phy_mode) {  in meson8b_set_phy_mode()
221 		meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,  in meson8b_set_phy_mode()
227 		meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,  in meson8b_set_phy_mode()
231 		dev_err(dwmac->dev, "fail to set phy-mode %s\n",  in meson8b_set_phy_mode()
232 			phy_modes(dwmac->phy_mode));  in meson8b_set_phy_mode()
239 static int meson_axg_set_phy_mode(struct meson8b_dwmac *dwmac)  in meson_axg_set_phy_mode()  argument
241 	switch (dwmac->phy_mode) {  in meson_axg_set_phy_mode()
247 		meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,  in meson_axg_set_phy_mode()
253 		meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,  in meson_axg_set_phy_mode()
258 		dev_err(dwmac->dev, "fail to set phy-mode %s\n",  in meson_axg_set_phy_mode()
259 			phy_modes(dwmac->phy_mode));  in meson_axg_set_phy_mode()
271 static int meson8b_devm_clk_prepare_enable(struct meson8b_dwmac *dwmac,  in meson8b_devm_clk_prepare_enable()  argument
280 	return devm_add_action_or_reset(dwmac->dev,  in meson8b_devm_clk_prepare_enable()
284 static int meson8b_init_rgmii_delays(struct meson8b_dwmac *dwmac)  in meson8b_init_rgmii_delays()  argument
292 				   dwmac->tx_delay_ns >> 1);  in meson8b_init_rgmii_delays()
294 	if (dwmac->data->has_prg_eth1_rgmii_rx_delay)  in meson8b_init_rgmii_delays()
296 					   dwmac->rx_delay_ps / 200);  in meson8b_init_rgmii_delays()
297 	else if (dwmac->rx_delay_ps == 2000)  in meson8b_init_rgmii_delays()
300 	switch (dwmac->phy_mode) {  in meson8b_init_rgmii_delays()
317 		dev_err(dwmac->dev, "unsupported phy-mode %s\n",  in meson8b_init_rgmii_delays()
318 			phy_modes(dwmac->phy_mode));  in meson8b_init_rgmii_delays()
323 		if (!dwmac->timing_adj_clk) {  in meson8b_init_rgmii_delays()
324 			dev_err(dwmac->dev,  in meson8b_init_rgmii_delays()
330 		ret = meson8b_devm_clk_prepare_enable(dwmac,  in meson8b_init_rgmii_delays()
331 						      dwmac->timing_adj_clk);  in meson8b_init_rgmii_delays()
333 			dev_err(dwmac->dev,  in meson8b_init_rgmii_delays()
339 	meson8b_dwmac_mask_bits(dwmac, PRG_ETH0, PRG_ETH0_TXDLY_MASK |  in meson8b_init_rgmii_delays()
344 	meson8b_dwmac_mask_bits(dwmac, PRG_ETH1, PRG_ETH1_CFG_RXCLK_DLY,  in meson8b_init_rgmii_delays()
350 static int meson8b_init_prg_eth(struct meson8b_dwmac *dwmac)  in meson8b_init_prg_eth()  argument
354 	if (phy_interface_mode_is_rgmii(dwmac->phy_mode)) {  in meson8b_init_prg_eth()
356 		meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,  in meson8b_init_prg_eth()
364 		ret = clk_set_rate(dwmac->rgmii_tx_clk, 125 * 1000 * 1000);  in meson8b_init_prg_eth()
366 			dev_err(dwmac->dev,  in meson8b_init_prg_eth()
371 		ret = meson8b_devm_clk_prepare_enable(dwmac,  in meson8b_init_prg_eth()
372 						      dwmac->rgmii_tx_clk);  in meson8b_init_prg_eth()
374 			dev_err(dwmac->dev,  in meson8b_init_prg_eth()
380 		meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,  in meson8b_init_prg_eth()
386 	meson8b_dwmac_mask_bits(dwmac, PRG_ETH0, PRG_ETH0_TX_AND_PHY_REF_CLK,  in meson8b_init_prg_eth()
396 	struct meson8b_dwmac *dwmac;  in meson8b_dwmac_probe()  local
407 	dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);  in meson8b_dwmac_probe()
408 	if (!dwmac)  in meson8b_dwmac_probe()
411 	dwmac->data = (const struct meson8b_dwmac_data *)  in meson8b_dwmac_probe()
413 	if (!dwmac->data)  in meson8b_dwmac_probe()
415 	dwmac->regs = devm_platform_ioremap_resource(pdev, 1);  in meson8b_dwmac_probe()
416 	if (IS_ERR(dwmac->regs))  in meson8b_dwmac_probe()
417 		return PTR_ERR(dwmac->regs);  in meson8b_dwmac_probe()
419 	dwmac->dev = &pdev->dev;  in meson8b_dwmac_probe()
420 	ret = of_get_phy_mode(pdev->dev.of_node, &dwmac->phy_mode);  in meson8b_dwmac_probe()
428 				 &dwmac->tx_delay_ns))  in meson8b_dwmac_probe()
429 		dwmac->tx_delay_ns = 2;  in meson8b_dwmac_probe()
433 				 &dwmac->rx_delay_ps)) {  in meson8b_dwmac_probe()
436 					  &dwmac->rx_delay_ps))  in meson8b_dwmac_probe()
438 			dwmac->rx_delay_ps *= 1000;  in meson8b_dwmac_probe()
441 	if (dwmac->data->has_prg_eth1_rgmii_rx_delay) {  in meson8b_dwmac_probe()
442 		if (dwmac->rx_delay_ps > 3000 || dwmac->rx_delay_ps % 200) {  in meson8b_dwmac_probe()
443 			dev_err(dwmac->dev,  in meson8b_dwmac_probe()
448 		if (dwmac->rx_delay_ps != 0 && dwmac->rx_delay_ps != 2000) {  in meson8b_dwmac_probe()
449 			dev_err(dwmac->dev,  in meson8b_dwmac_probe()
455 	dwmac->timing_adj_clk = devm_clk_get_optional(dwmac->dev,  in meson8b_dwmac_probe()
457 	if (IS_ERR(dwmac->timing_adj_clk))  in meson8b_dwmac_probe()
458 		return PTR_ERR(dwmac->timing_adj_clk);  in meson8b_dwmac_probe()
460 	ret = meson8b_init_rgmii_delays(dwmac);  in meson8b_dwmac_probe()
464 	ret = meson8b_init_rgmii_tx_clk(dwmac);  in meson8b_dwmac_probe()
468 	ret = dwmac->data->set_phy_mode(dwmac);  in meson8b_dwmac_probe()
472 	ret = meson8b_init_prg_eth(dwmac);  in meson8b_dwmac_probe()
476 	plat_dat->bsp_priv = dwmac;  in meson8b_dwmac_probe()
498 		.compatible = "amlogic,meson8b-dwmac",
502 		.compatible = "amlogic,meson8m2-dwmac",
506 		.compatible = "amlogic,meson-gxbb-dwmac",
510 		.compatible = "amlogic,meson-axg-dwmac",
514 		.compatible = "amlogic,meson-g12a-dwmac",
525 		.name           = "meson8b-dwmac",
533 MODULE_DESCRIPTION("Amlogic Meson8b, Meson8m2 and GXBB DWMAC glue layer");