149 		/* 550ps per stage for MII/RMII */  in mt2712_delay_ps2stage()
174 		/* 550ps per stage for MII/RMII */  in mt2712_delay_stage2ps()
211 			/* case 1: mac provides the rmii reference clock,  in mt2712_set_delay()
224 			/* case 2: the rmii reference clock is from external phy,  in mt2712_set_delay()
231 				/* the rmii reference clock from outside is connected  in mt2712_set_delay()
239 				/* the rmii reference clock from outside is connected  in mt2712_set_delay()
362 			/* case 1: mac provides the rmii reference clock,  in mt8195_set_delay()
381 			/* case 2: the rmii reference clock is from external phy,  in mt8195_set_delay()
388 				/* the rmii reference clock from outside is connected  in mt8195_set_delay()
399 				/* the rmii reference clock from outside is connected  in mt8195_set_delay()
493 	plat->rmii_rxc = of_property_read_bool(plat->np, "mediatek,rmii-rxc");  in mediatek_dwmac_config_dt()
494 	plat->rmii_clk_from_mac = of_property_read_bool(plat->np, "mediatek,rmii-clk-from-mac");  in mediatek_dwmac_config_dt()
516 	/* The clock labeled as "rmii_internal" is needed only in RMII(when  in mediatek_dwmac_clk_init()
518 	 * RMII(when PHY provides the reference clock).  in mediatek_dwmac_clk_init()
520 	 * reference clock of RMII is from MAC.  in mediatek_dwmac_clk_init()
573 			dev_err(plat->dev, "failed to enable rmii internal clk, err = %d\n", ret);  in mediatek_dwmac_clks_config()