15  *	nowait	= 0 for normal wait states, 1 eliminates additional wait states
52 #define SMC_DEBUG		0
88 # define SMC_NOWAIT		0
137 #define THROTTLE_TX_PKTS	0
149 	} while (0)
153 		if (SMC_DEBUG > 0)				\
157 	} while (0)
169 	for (i = 0; i < lines ; i ++) {  in PRINT_PKT()
172 		for (cur = 0; cur < 8; cur++) {  in PRINT_PKT()
181 	for (i = 0; i < remainder/2 ; i++) {  in PRINT_PKT()
203 } while (0)
214 } while (0)
233 } while (0)
251 	SMC_SET_INT_MASK(lp, 0);  in smc_reset()
267 	SMC_SELECT_BANK(lp, 0);  in smc_reset()
306 	SMC_SELECT_BANK(lp, 0);  in smc_reset()
342 	SMC_SELECT_BANK(lp, 0);  in smc_enable()
378 	SMC_SET_INT_MASK(lp, 0);  in smc_shutdown()
385 	SMC_SELECT_BANK(lp, 0);  in smc_shutdown()
418 	packet_len &= 0x07ff;  /* mask off top bits */  in smc_rcv()
419 	DBG(2, dev, "RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",  in smc_rcv()
473 		if (lp->version == 0x90)  in smc_rcv()
532 #define smc_special_lock(lock, flags)   	do { flags = 0; } while (0)
533 #define smc_special_unlock(lock, flags)	do { flags = 0; } while (0)
579 	DBG(2, dev, "TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",  in smc_hardware_send_pkt()
587 	SMC_PUT_PKT_HDR(lp, 0, len + 6);  in smc_hardware_send_pkt()
593 	SMC_outw(lp, ((len & 1) ? (0x2000 | buf[len - 1]) : 0), ioaddr,  in smc_hardware_send_pkt()
643 	 * 'pages', minus 1 (since a packet can't ever have 0 pages :))  in smc_hard_start_xmit()
726 	DBG(2, dev, "TX STATUS 0x%04x PNR 0x%02x\n",  in smc_tx()
754 	SMC_SELECT_BANK(lp, 0);  in smc_tx()
793 	for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {  in smc_mii_in()
818 	smc_mii_out(dev, 0xffffffff, 32);  in smc_phy_read()
829 	DBG(3, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",  in smc_phy_read()
848 	smc_mii_out(dev, 0xffffffff, 32);  in smc_phy_write()
856 	DBG(3, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",  in smc_phy_write()
872 	lp->phy_type = 0;  in smc_phy_detect()
876 	 * PHY#1 to PHY#31, and then PHY#0 last.  in smc_phy_detect()
885 		DBG(3, dev, "phy_id1=0x%x, phy_id2=0x%x\n",  in smc_phy_detect()
889 		if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&  in smc_phy_detect()
890 		    id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {  in smc_phy_detect()
920 	bmcr = 0;  in smc_phy_fixed()
932 	SMC_SELECT_BANK(lp, 0);  in smc_phy_fixed()
985 	if (lp->phy_type == 0)  in smc_phy_powerdown()
1018 		SMC_SELECT_BANK(lp, 0);  in smc_phy_check_media()
1049 	if (lp->phy_type == 0)  in smc_phy_configure()
1067 	SMC_SELECT_BANK(lp, 0);  in smc_phy_configure()
1143 	if (lp->phy_type == 0)  in smc_phy_interrupt()
1147 		smc_phy_check_media(dev, 0);  in smc_phy_interrupt()
1151 		if ((phy18 & PHY_INT_INT) == 0)  in smc_phy_interrupt()
1164 	old_carrier = netif_carrier_ok(dev) ? 1 : 0;  in smc_10bt_check_media()
1166 	SMC_SELECT_BANK(lp, 0);  in smc_10bt_check_media()
1167 	new_carrier = (SMC_GET_EPH_STATUS(lp) & ES_LINK_OK) ? 1 : 0;  in smc_10bt_check_media()
1188 	smc_10bt_check_media(dev, 0);  in smc_eph_interrupt()
1220 	SMC_SET_INT_MASK(lp, 0);  in smc_interrupt()
1228 		DBG(2, dev, "INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",  in smc_interrupt()
1230 		    ({ int meminfo; SMC_SELECT_BANK(lp, 0);  in smc_interrupt()
1258 			SMC_SELECT_BANK(lp, 0);  in smc_interrupt()
1263 			dev->stats.collisions += card_stats & 0xF;  in smc_interrupt()
1267 			dev->stats.collisions += card_stats & 0xF;  in smc_interrupt()
1269 			DBG(1, dev, "RX overrun (EPH_ST 0x%04x)\n",  in smc_interrupt()
1270 			    ({ int eph_st; SMC_SELECT_BANK(lp, 0);  in smc_interrupt()
1294 		PRINTK(dev, "spurious interrupt (mask = 0x%02x)\n",  in smc_interrupt()
1337 	SMC_SELECT_BANK(lp, 0);  in smc_timeout()
1342 	PRINTK(dev, "TX timeout (INT 0x%02x INTMASK 0x%02x MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",  in smc_timeout()
1353 	if (lp->phy_type != 0)  in smc_timeout()
1372 	int update_multicast = 0;  in smc_set_multicast_list()
1412 		static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};  in smc_set_multicast_list()
1415 		memset(multicast_table, 0, sizeof(multicast_table));  in smc_set_multicast_list()
1421 			position = crc32_le(~0, ha->addr, 6) & 0x3f;  in smc_set_multicast_list()
1441 		memset(multicast_table, 0, sizeof(multicast_table));  in smc_set_multicast_list()
1446 	SMC_SELECT_BANK(lp, 0);  in smc_set_multicast_list()
1480 	if (lp->phy_type == 0)  in smc_open()
1488 	if (lp->phy_type != 0)  in smc_open()
1497 	return 0;  in smc_open()
1520 	return 0;  in smc_close()
1532 	if (lp->phy_type != 0) {  in smc_ethtool_get_link_ksettings()
1547 		cmd->base.port = 0;  in smc_ethtool_get_link_ksettings()
1555 	return 0;  in smc_ethtool_get_link_ksettings()
1565 	if (lp->phy_type != 0) {  in smc_ethtool_set_link_ksettings()
1579 		ret = 0;  in smc_ethtool_set_link_ksettings()
1599 	if (lp->phy_type != 0) {  in smc_ethtool_nwayreset()
1645 	return 0;  in smc_write_eeprom_word()
1660 	SMC_SET_GP(lp, 0xffff);	/* init to known */  in smc_read_eeprom_word()
1673 	return 0;  in smc_read_eeprom_word()
1678 	return 0x23 * 2;  in smc_ethtool_geteeprom_len()
1687 	DBG(1, dev, "Reading %d bytes at %d(0x%x)\n",  in smc_ethtool_geteeprom()
1690 	for (i = 0; i < eeprom->len; i += 2) {  in smc_ethtool_geteeprom()
1697 		if (ret != 0)  in smc_ethtool_geteeprom()
1699 		DBG(2, dev, "Read 0x%x from 0x%x\n", wbuf, offset >> 1);  in smc_ethtool_geteeprom()
1700 		data[i] = (wbuf >> 8) & 0xff;  in smc_ethtool_geteeprom()
1701 		data[i+1] = wbuf & 0xff;  in smc_ethtool_geteeprom()
1703 	return 0;  in smc_ethtool_geteeprom()
1712 	DBG(1, dev, "Writing %d bytes to %d(0x%x)\n",  in smc_ethtool_seteeprom()
1715 	for (i = 0; i < eeprom->len; i += 2) {  in smc_ethtool_seteeprom()
1722 		DBG(2, dev, "Writing 0x%x to 0x%x\n", wbuf, offset >> 1);  in smc_ethtool_seteeprom()
1724 		if (ret != 0)  in smc_ethtool_seteeprom()
1727 	return 0;  in smc_ethtool_seteeprom()
1808 	 * as autoirq_report will return a 0 anyway, which is what I  in smc_findirq()
1814 	SMC_SET_INT_MASK(lp, 0);  in smc_findirq()
1825  *	Returns a 0 on success
1828  *	(1) see if the high byte of BANK_SELECT is 0x33
1855 	/* First, see if the high byte is 0x33 */  in smc_probe()
1857 	DBG(2, dev, "%s: bank signature probe returned 0x%04x\n",  in smc_probe()
1859 	if ((val & 0xFF00) != 0x3300) {  in smc_probe()
1860 		if ((val & 0xFF) == 0x33) {  in smc_probe()
1873 	SMC_SELECT_BANK(lp, 0);  in smc_probe()
1875 	if ((val & 0xFF00) != 0x3300) {  in smc_probe()
1888 	val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;  in smc_probe()
1889 	if (((unsigned long)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {  in smc_probe()
1901 	DBG(2, dev, "%s: revision = 0x%04x\n", CARDNAME, revision_register);  in smc_probe()
1902 	version_string = chip_ids[ (revision_register >> 4) & 0xF];  in smc_probe()
1903 	if (!version_string || (revision_register & 0xff00) != 0x3300) {  in smc_probe()
1905 		netdev_warn(dev, "%s: IO %p: Unrecognized revision register 0x%04x, Contact author.\n",  in smc_probe()
1918 	lp->version = revision_register & 0xff;  in smc_probe()
1930 	 * If dev->irq is 0, then the device has to be banged on to see  in smc_probe()
1956 	if (dev->irq == 0) {  in smc_probe()
1970 	lp->mii.phy_id_mask = 0x1f;  in smc_probe()
1971 	lp->mii.reg_num_mask = 0x1f;  in smc_probe()
1972 	lp->mii.force_media = 0;  in smc_probe()
1973 	lp->mii.full_duplex = 0;  in smc_probe()
1990 	lp->ctl_rfduplx = 0;  in smc_probe()
2017 	if (retval == 0) {  in smc_probe()
2020 			    version_string, revision_register & 0x0f,  in smc_probe()
2038 		if (lp->phy_type == 0) {  in smc_probe()
2040 		} else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {  in smc_probe()
2042 		} else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {  in smc_probe()
2066 		return 0;  in smc_enable_device()
2115 	return 0;  in smc_enable_device()
2125 		return 0;  in smc_request_attrib()
2130 	return 0;  in smc_request_attrib()
2179 	{ "LNRO0003", 0 },
2220 	return 0;  in try_toggle_control_gpio()
2227  *	dev->base_addr == 0, try to find all possible locations
2228  *	dev->base_addr > 0x1ff, this is the address to check
2232  *	0 --> there is a device
2259 	lp->cfg.flags = 0;  in smc_drv_probe()
2280 					      "power", 0, 0, 100);  in smc_drv_probe()
2289 					      "reset", 0, 0, 100);  in smc_drv_probe()
2305 			if ((val == 0) || (val & 2))  in smc_drv_probe()
2321 		lp->cfg.flags |= (SMC_CAN_USE_8BIT)  ? SMC91X_USE_8BIT  : 0;  in smc_drv_probe()
2322 		lp->cfg.flags |= (SMC_CAN_USE_16BIT) ? SMC91X_USE_16BIT : 0;  in smc_drv_probe()
2323 		lp->cfg.flags |= (SMC_CAN_USE_32BIT) ? SMC91X_USE_32BIT : 0;  in smc_drv_probe()
2324 		lp->cfg.flags |= (nowait) ? SMC91X_NOWAIT : 0;  in smc_drv_probe()
2336 		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);  in smc_drv_probe()
2348 	ndev->irq = platform_get_irq(pdev, 0);  in smc_drv_probe()
2349 	if (ndev->irq < 0) {  in smc_drv_probe()
2390 	if (ret != 0)  in smc_drv_probe()
2395 	return 0;  in smc_drv_probe()
2432 		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);  in smc_drv_remove()
2449 	return 0;  in smc_drv_suspend()
2463 			if (lp->phy_type != 0)  in smc_drv_resume()
2468 	return 0;  in smc_drv_resume()