Lines Matching +full:dma +full:- +full:channel +full:- +full:mask
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2013 Solarflare Communications Inc.
34 buffer->addr = dma_alloc_coherent(&efx->pci_dev->dev, len, in efx_nic_alloc_buffer()
35 &buffer->dma_addr, gfp_flags); in efx_nic_alloc_buffer()
36 if (!buffer->addr) in efx_nic_alloc_buffer()
37 return -ENOMEM; in efx_nic_alloc_buffer()
38 buffer->len = len; in efx_nic_alloc_buffer()
44 if (buffer->addr) { in efx_nic_free_buffer()
45 dma_free_coherent(&efx->pci_dev->dev, buffer->len, in efx_nic_free_buffer()
46 buffer->addr, buffer->dma_addr); in efx_nic_free_buffer()
47 buffer->addr = NULL; in efx_nic_free_buffer()
52 * read pointer. Only useful for self-test.
54 bool efx_nic_event_present(struct efx_channel *channel) in efx_nic_event_present() argument
56 return efx_event_present(efx_event(channel, channel->eventq_read_ptr)); in efx_nic_event_present()
59 void efx_nic_event_test_start(struct efx_channel *channel) in efx_nic_event_test_start() argument
61 channel->event_test_cpu = -1; in efx_nic_event_test_start()
63 channel->efx->type->ev_test_generate(channel); in efx_nic_event_test_start()
68 efx->last_irq_cpu = -1; in efx_nic_irq_test_start()
70 return efx->type->irq_test_generate(efx); in efx_nic_irq_test_start()
78 struct efx_channel *channel; in efx_nic_init_interrupt() local
83 rc = request_irq(efx->legacy_irq, in efx_nic_init_interrupt()
84 efx->type->irq_handle_legacy, IRQF_SHARED, in efx_nic_init_interrupt()
85 efx->name, efx); in efx_nic_init_interrupt()
87 netif_err(efx, drv, efx->net_dev, in efx_nic_init_interrupt()
89 efx->pci_dev->irq); in efx_nic_init_interrupt()
92 efx->irqs_hooked = true; in efx_nic_init_interrupt()
97 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) { in efx_nic_init_interrupt()
98 efx->net_dev->rx_cpu_rmap = in efx_nic_init_interrupt()
99 alloc_irq_cpu_rmap(efx->n_rx_channels); in efx_nic_init_interrupt()
100 if (!efx->net_dev->rx_cpu_rmap) { in efx_nic_init_interrupt()
101 rc = -ENOMEM; in efx_nic_init_interrupt()
107 /* Hook MSI or MSI-X interrupt */ in efx_nic_init_interrupt()
109 efx_for_each_channel(channel, efx) { in efx_nic_init_interrupt()
110 rc = request_irq(channel->irq, efx->type->irq_handle_msi, in efx_nic_init_interrupt()
112 efx->msi_context[channel->channel].name, in efx_nic_init_interrupt()
113 &efx->msi_context[channel->channel]); in efx_nic_init_interrupt()
115 netif_err(efx, drv, efx->net_dev, in efx_nic_init_interrupt()
116 "failed to hook IRQ %d\n", channel->irq); in efx_nic_init_interrupt()
122 if (efx->interrupt_mode == EFX_INT_MODE_MSIX && in efx_nic_init_interrupt()
123 channel->channel < efx->n_rx_channels) { in efx_nic_init_interrupt()
124 rc = irq_cpu_rmap_add(efx->net_dev->rx_cpu_rmap, in efx_nic_init_interrupt()
125 channel->irq); in efx_nic_init_interrupt()
132 efx->irqs_hooked = true; in efx_nic_init_interrupt()
137 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap); in efx_nic_init_interrupt()
138 efx->net_dev->rx_cpu_rmap = NULL; in efx_nic_init_interrupt()
140 efx_for_each_channel(channel, efx) { in efx_nic_init_interrupt()
141 if (n_irqs-- == 0) in efx_nic_init_interrupt()
143 free_irq(channel->irq, &efx->msi_context[channel->channel]); in efx_nic_init_interrupt()
151 struct efx_channel *channel; in efx_nic_fini_interrupt() local
154 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap); in efx_nic_fini_interrupt()
155 efx->net_dev->rx_cpu_rmap = NULL; in efx_nic_fini_interrupt()
158 if (!efx->irqs_hooked) in efx_nic_fini_interrupt()
161 /* Disable MSI/MSI-X interrupts */ in efx_nic_fini_interrupt()
162 efx_for_each_channel(channel, efx) in efx_nic_fini_interrupt()
163 free_irq(channel->irq, in efx_nic_fini_interrupt()
164 &efx->msi_context[channel->channel]); in efx_nic_fini_interrupt()
167 free_irq(efx->legacy_irq, efx); in efx_nic_fini_interrupt()
169 efx->irqs_hooked = false; in efx_nic_fini_interrupt()
230 if (efx->type->revision >= reg->min_revision && in efx_nic_get_regs_len()
231 efx->type->revision <= reg->max_revision) in efx_nic_get_regs_len()
237 if (efx->type->revision >= table->min_revision && in efx_nic_get_regs_len()
238 efx->type->revision <= table->max_revision) in efx_nic_get_regs_len()
239 len += table->rows * min_t(size_t, table->step, 16); in efx_nic_get_regs_len()
252 if (efx->type->revision >= reg->min_revision && in efx_nic_get_regs()
253 efx->type->revision <= reg->max_revision) { in efx_nic_get_regs()
254 efx_reado(efx, (efx_oword_t *)buf, reg->offset); in efx_nic_get_regs()
264 if (!(efx->type->revision >= table->min_revision && in efx_nic_get_regs()
265 efx->type->revision <= table->max_revision)) in efx_nic_get_regs()
268 size = min_t(size_t, table->step, 16); in efx_nic_get_regs()
270 for (i = 0; i < table->rows; i++) { in efx_nic_get_regs()
271 switch (table->step) { in efx_nic_get_regs()
272 case 4: /* 32-bit SRAM */ in efx_nic_get_regs()
273 efx_readd(efx, buf, table->offset + 4 * i); in efx_nic_get_regs()
275 case 16: /* 128-bit-readable register */ in efx_nic_get_regs()
276 efx_reado_table(efx, buf, table->offset, i); in efx_nic_get_regs()
278 case 32: /* 128-bit register, interleaved */ in efx_nic_get_regs()
279 efx_reado_table(efx, buf, table->offset, 2 * i); in efx_nic_get_regs()
291 * efx_nic_describe_stats - Describe supported statistics for ethtool
294 * @mask: Bitmask of which elements of @desc are enabled
299 * bits in the first @count bits of @mask for which a name is defined.
302 const unsigned long *mask, u8 *names) in efx_nic_describe_stats() argument
307 for_each_set_bit(index, mask, count) { in efx_nic_describe_stats()
322 * efx_nic_copy_stats - Copy stats from the DMA buffer in to an
324 * set of stats while the DMA buffer can be written at any time
327 * @dest: Destination buffer. Must be the same size as the DMA buffer.
331 __le64 *dma_stats = efx->stats_buffer.addr; in efx_nic_copy_stats()
341 /* If we're unlucky enough to read statistics during the DMA, wait in efx_nic_copy_stats()
345 generation_end = dma_stats[efx->num_mac_stats - 1]; in efx_nic_copy_stats()
349 memcpy(dest, dma_stats, efx->num_mac_stats * sizeof(__le64)); in efx_nic_copy_stats()
357 rc = -EIO; in efx_nic_copy_stats()
360 memset(dest, 0, efx->num_mac_stats * sizeof(u64)); in efx_nic_copy_stats()
365 * efx_nic_update_stats - Convert statistics DMA buffer to array of u64
366 * @desc: Array of &struct efx_hw_stat_desc describing the DMA buffer
367 * layout. DMA widths of 0, 16, 32 and 64 are supported; where
371 * @mask: Bitmask of which elements of @desc are enabled
374 * @dma_buf: DMA buffer containing hardware statistics
379 const unsigned long *mask, in efx_nic_update_stats() argument
384 for_each_set_bit(index, mask, count) { in efx_nic_update_stats()
416 if (!(efx->net_dev->flags & IFF_UP) || !efx->rx_nodesc_drops_prev_state) in efx_nic_fix_nodesc_drop_stat()
417 efx->rx_nodesc_drops_while_down += in efx_nic_fix_nodesc_drop_stat()
418 *rx_nodesc_drops - efx->rx_nodesc_drops_total; in efx_nic_fix_nodesc_drop_stat()
419 efx->rx_nodesc_drops_total = *rx_nodesc_drops; in efx_nic_fix_nodesc_drop_stat()
420 efx->rx_nodesc_drops_prev_state = !!(efx->net_dev->flags & IFF_UP); in efx_nic_fix_nodesc_drop_stat()
421 *rx_nodesc_drops -= efx->rx_nodesc_drops_while_down; in efx_nic_fix_nodesc_drop_stat()