Lines Matching +full:rx +full:- +full:ping +full:- +full:pong
1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
63 /* Checksum generation is a per-queue option in hardware, so each
83 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
86 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
89 * of every buffer. Otherwise, we just need to ensure 4-byte
98 /* Non-standard XDP_PACKET_HEADROOM and tailroom to satisfy XDP_REDIRECT and
111 * struct efx_buffer - A general-purpose DMA buffer
126 * struct efx_tx_buffer - buffer state for a TX descriptor
131 * @option: When @flags & %EFX_TX_BUF_OPTION, an EF10-specific option
164 * struct efx_tx_queue - An Efx TX queue
179 * Is our index within @channel->tx_queue array.
187 * %EFX_TX_CB_ORDER into %EFX_TX_CB_SIZE-sized chunks.
200 * only get the up-to-date value of @write_count if this
202 * avoid cache-line ping-pong between the xmit path and the
217 * Filled in iff @efx->type->option_descriptors; only used for PIO.
221 * only get the up-to-date value of read_count if this
223 * avoid cache-line ping-pong between the xmit path and the
237 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0.
292 #define EFX_TX_CB_SIZE (1 << EFX_TX_CB_ORDER) - NET_IP_ALIGN
295 * struct efx_rx_buffer - An Efx RX data buffer
321 * struct efx_rx_page_state - Page-based rx buffer state
324 * Used to facilitate sharing dma mappings between recycled rx buffers
336 * struct efx_rx_queue - An Efx RX queue
338 * @core_index: Index of network core RX queue. Will be >= 0 iff this
339 * is associated with a real RX queue.
344 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as
346 * @grant_credits: Posted RX descriptors need to be granted to the MAE with
363 * @page_ptr_mask: The number of pages in the RX recycle ring minus 1.
364 * @max_fill: RX descriptor maximum fill level (<= ring size)
365 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
367 * @min_fill: RX descriptor minimum non-zero fill level.
370 * @recycle_count: RX buffer recycle counter.
373 * @xdp_rxq_info: XDP specific RX queue information.
421 * struct efx_channel - An Efx channel
424 * one RX queue, and an associated tasklet for processing the event
432 * @irq: IRQ number (MSI and MSI-X only)
455 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
456 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
460 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
461 * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to
463 * @n_rx_merge_events: Number of RX merged completion events
464 * @n_rx_merge_packets: Number of RX packets completed by merged events
465 * @n_rx_xdp_drops: Count of RX packets intentionally dropped due to XDP
466 * @n_rx_xdp_bad_drops: Count of RX packets dropped due to XDP errors
467 * @n_rx_xdp_tx: Count of RX packets retransmitted due to XDP
468 * @n_rx_xdp_redirect: Count of RX packets redirected to a different NIC by XDP
469 * @n_rx_mport_bad: Count of RX packets dropped because their ingress mport was
475 * @rx_list: list of SKBs from current RX, awaiting processing
476 * @rx_queue: RX queue for this channel
550 * struct efx_msi_context - Context for each MSI
565 * struct efx_channel_type - distinguishes traffic and extra channels
576 * @receive_raw: Handle an RX buffer ready to be passed to __efx_rx_packet()
611 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
620 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
675 /* Pseudo bit-mask flow control field */
681 * struct efx_link_state - Current state of the link
683 * @fd: Link is full-duplex
697 return left->up == right->up && left->fd == right->fd &&
698 left->fc == right->fc && left->speed == right->speed;
702 * enum efx_phy_mode - PHY operating mode flags
723 * struct efx_hw_stat_desc - Description of a hardware statistic
726 * @dma_width: Width in bits (0 for non-DMA statistics)
727 * @offset: Offset within stats (ignored for non-DMA statistics)
740 * struct efx_rss_context_priv - driver private data for an RSS context
743 * @rx_hash_udp_4tuple: UDP 4-tuple hashing enabled
751 * struct efx_rss_context - an RSS context
752 * @priv: hardware-specific state
766 #define EFX_ARFS_FILTER_ID_PENDING -1
767 #define EFX_ARFS_FILTER_ID_ERROR -2
768 #define EFX_ARFS_FILTER_ID_REMOVING -3
770 * struct efx_arfs_rule - record of an ARFS filter and its IDs
772 * @spec: details of the filter (used as key for hash table). Use efx->type to
793 * struct efx_async_filter_insertion - Request to asynchronously insert a filter
798 * @flow_id: Identifies the kernel-side flow for which this request was made
821 * struct efx_nic - an Efx NIC
839 * @vi_stride: step between per-VI registers / memory regions
843 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
845 * @irq_rx_mod_step_us: Step size for IRQ moderation for RX event queues
846 * @irq_rx_moderation_us: IRQ moderation time for RX event queues
851 * @rx_queue: RX DMA queues
854 * @extra_channel_types: Types of extra (non-traffic) channels that
865 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches
868 * @n_rx_channels: Number of channels used for RX (= number of RX queues)
875 * @rx_ip_align: RX DMA address offset to have IP header aligned in
877 * @rx_dma_len: Current maximum RX DMA length
878 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
879 * @rx_buffer_truesize: Amortised allocation size of an RX buffer,
881 * @rx_prefix_size: Size of RX prefix before packet data
882 * @rx_packet_hash_offset: Offset of RX flow hash from start of packet data
884 * @rx_packet_len_offset: Offset of RX packet length from start of packet data
887 * (valid only if channel->sync_timestamps_enabled; always negative)
894 * @irq_soft_enabled: Are IRQs soft-enabled? If not, IRQ handler will
899 * @selftest_work: Work item for asynchronous self-test
902 * @mcdi: Management-Controller-to-Driver Interface state
917 * @phy_data: PHY private data (including PHY-specific stats)
927 * @fc_disable: When non-zero flow control is disabled. Typically used to
933 * @loopback_selftest: Offline self-test private state
936 * @filter_state: Architecture-dependent filter table state
938 * @rps_slot_map: bitmap of in-flight entries in @rps_slot
944 * @active_queues: Count of RX and TX queues that haven't been flushed and drained.
947 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet
959 * @xdp_rxq_info_failed: Have any of the rx queues failed to initialise their
975 * @n_rx_noskb_drops: Count of RX packets dropped due to failure to allocate an skb
1164 * struct efx_probe_data - State after hardware probe
1178 return &probe_data->efx;
1183 return efx->net_dev->reg_state == NETREG_REGISTERED;
1188 return efx->port_num;
1206 * struct efx_nic_type - Efx device type definition
1223 * @fini_dmaq: Flush and finalise DMA queues (RX and TX queues)
1248 * The SDU length may be any value from 0 up to the protocol-
1261 * @irq_disable_non_ev: Disable non-event IRQs on the NIC. Each event
1278 * @rx_probe: Allocate resources for RX queue
1279 * @rx_init: Initialise RX queue on the NIC
1280 * @rx_remove: Free resources for RX queue
1281 * @rx_write: Write RX descriptors and doorbell
1283 * @rx_packet: Receive the queued RX buffer on a channel
1284 * @rx_buf_hash_valid: Determine whether the RX prefix contains a valid hash
1295 * @filter_update_rx_scatter: Update filters after change to rx scatter setting
1299 * @filter_clear_rx: Remove all RX filters whose priority is less than or
1303 * @filter_get_rx_ids: Get list of RX filters at a given priority
1313 * @mtd_sync: Wait for write-back to complete on MTD partition. This
1317 * @ptp_set_ts_sync_events: Enable or disable sync events for inline RX
1324 * @tso_versions: Returns mask of firmware-assisted TSO versions supported.
1328 * @print_additional_fwver: Dump NIC-specific additional FW version info
1330 * @rx_recycle_ring_size: Size of the RX recycle ring
1333 * @rxd_ptr_tbl_base: RX descriptor ring base address
1336 * @evq_rptr_tbl_base: Event queue read-pointer table base address
1338 * @rx_prefix_size: Size of RX prefix before packet data
1339 * @rx_hash_offset: Offset of RX flow hash within prefix
1341 * @rx_buffer_padding: Size of padding at end of RX packet
1539 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_channels);
1540 return efx->channel[index];
1545 for (_channel = (_efx)->channel[0]; \
1547 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \
1548 (_efx)->channel[_channel->channel + 1] : NULL)
1552 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \
1554 _channel = _channel->channel ? \
1555 (_efx)->channel[_channel->channel - 1] : NULL)
1560 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_tx_channels);
1561 return efx->channel[efx->tx_channel_offset + index];
1567 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_xdp_channels);
1568 return efx->channel[efx->xdp_channel_offset + index];
1573 return channel->channel - channel->efx->xdp_channel_offset <
1574 channel->efx->n_xdp_channels;
1579 return channel && channel->channel >= channel->efx->tx_channel_offset;
1585 return channel->efx->xdp_tx_per_channel;
1586 return channel->efx->tx_queues_per_channel;
1593 return channel->tx_queue_by_type[type];
1609 for (_tx_queue = (_channel)->tx_queue; \
1610 _tx_queue < (_channel)->tx_queue + \
1616 return channel->rx_queue.core_index >= 0;
1623 return &channel->rx_queue;
1626 /* Iterate over all RX queues belonging to a channel */
1631 for (_rx_queue = &(_channel)->rx_queue; \
1643 return efx_rx_queue_channel(rx_queue)->channel;
1646 /* Returns a pointer to the specified receive buffer in the RX
1652 return &rx_queue->buffer[index];
1658 if (unlikely(rx_buf == efx_rx_buffer(rx_queue, rx_queue->ptr_mask)))
1665 * EFX_MAX_FRAME_LEN - calculate maximum frame length
1673 * The 10G MAC requires 8-byte alignment on the frame
1676 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1687 return skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP;
1691 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1703 tx_queue->insert_count - tx_queue->read_count);
1717 tx_queue->insert_count - tx_queue->old_read_count);
1729 const struct net_device *net_dev = efx->net_dev;
1731 return net_dev->features | net_dev->hw_features;
1738 return tx_queue->insert_count & tx_queue->ptr_mask;
1745 return &tx_queue->buffer[efx_tx_queue_get_insert_index(tx_queue)];
1755 EFX_WARN_ON_ONCE_PARANOID(buffer->len);
1756 EFX_WARN_ON_ONCE_PARANOID(buffer->flags);
1757 EFX_WARN_ON_ONCE_PARANOID(buffer->unmap_len);