Lines Matching full:bar
37 unsigned int bar; member
71 u32 bar = ef100_pci_get_bar_bits(efx, entry_location, EF100_BAR); in ef100_pci_parse_ef100_entry() local
74 "Found EF100 function control window bar=%d offset=0x%llx\n", in ef100_pci_parse_ef100_entry()
75 bar, offset); in ef100_pci_parse_ef100_entry()
83 if (bar == ESE_GZ_CFGBAR_EF100_BAR_NUM_EXPANSION_ROM || in ef100_pci_parse_ef100_entry()
84 bar == ESE_GZ_CFGBAR_EF100_BAR_NUM_INVALID) { in ef100_pci_parse_ef100_entry()
86 "Bad BAR value of %d in Xilinx capabilities EF100 entry.\n", in ef100_pci_parse_ef100_entry()
87 bar); in ef100_pci_parse_ef100_entry()
91 result->bar = bar; in ef100_pci_parse_ef100_entry()
97 static bool ef100_pci_does_bar_overflow(struct efx_nic *efx, int bar, in ef100_pci_does_bar_overflow() argument
101 pci_resource_len(efx->pci_dev, bar); in ef100_pci_does_bar_overflow()
114 u32 bar; in ef100_pci_parse_continue_entry() local
118 bar = EFX_OWORD_FIELD32(entry, ESF_GZ_CFGBAR_CONT_CAP_BAR); in ef100_pci_parse_continue_entry()
125 if (bar == ESE_GZ_VSEC_BAR_NUM_EXPANSION_ROM || in ef100_pci_parse_continue_entry()
126 bar == ESE_GZ_VSEC_BAR_NUM_INVALID) { in ef100_pci_parse_continue_entry()
128 "Bad BAR value of %d in Xilinx capabilities sub-table.\n", in ef100_pci_parse_continue_entry()
129 bar); in ef100_pci_parse_continue_entry()
133 if (bar != previous_bar) { in ef100_pci_parse_continue_entry()
136 if (ef100_pci_does_bar_overflow(efx, bar, offset)) { in ef100_pci_parse_continue_entry()
138 "Xilinx table will overrun BAR[%d] offset=0x%llx\n", in ef100_pci_parse_continue_entry()
139 bar, offset); in ef100_pci_parse_continue_entry()
143 /* Temporarily map new BAR. */ in ef100_pci_parse_continue_entry()
144 rc = efx_init_io(efx, bar, in ef100_pci_parse_continue_entry()
146 pci_resource_len(efx->pci_dev, bar)); in ef100_pci_parse_continue_entry()
149 "Mapping new BAR for Xilinx table failed, rc=%d\n", rc); in ef100_pci_parse_continue_entry()
158 if (bar != previous_bar) { in ef100_pci_parse_continue_entry()
161 /* Put old BAR back. */ in ef100_pci_parse_continue_entry()
167 "Putting old BAR back failed, rc=%d\n", rc); in ef100_pci_parse_continue_entry()
175 /* Iterate over the Xilinx capabilities table in the currently mapped BAR and
197 "Seen Xilinx table entry 0x%x size 0x%x at 0x%llx in BAR[%d]\n", in ef100_pci_walk_xilinx_table()
287 u32 bar = 0; in ef100_pci_parse_xilinx_cap() local
290 rc = ef100_pci_get_config_bits(efx, vndr_cap, TBL_BAR, &bar); in ef100_pci_parse_xilinx_cap()
298 if (bar == ESE_GZ_CFGBAR_CONT_CAP_BAR_NUM_EXPANSION_ROM || in ef100_pci_parse_xilinx_cap()
299 bar == ESE_GZ_CFGBAR_CONT_CAP_BAR_NUM_INVALID) { in ef100_pci_parse_xilinx_cap()
301 "Bad BAR value of %d in Xilinx capabilities sub-table.\n", in ef100_pci_parse_xilinx_cap()
302 bar); in ef100_pci_parse_xilinx_cap()
328 if (offset > pci_resource_len(efx->pci_dev, bar) - sizeof(u32) * 2) { in ef100_pci_parse_xilinx_cap()
330 "Xilinx table will overrun BAR[%d] offset=0x%llx\n", in ef100_pci_parse_xilinx_cap()
331 bar, offset); in ef100_pci_parse_xilinx_cap()
335 /* Temporarily map BAR. */ in ef100_pci_parse_xilinx_cap()
336 rc = efx_init_io(efx, bar, in ef100_pci_parse_xilinx_cap()
338 pci_resource_len(efx->pci_dev, bar)); in ef100_pci_parse_xilinx_cap()
347 /* Unmap temporarily mapped BAR. */ in ef100_pci_parse_xilinx_cap()
483 fcw.bar = EFX_EF100_PCI_DEFAULT_BAR; in ef100_pci_probe()
488 if (fcw.offset > pci_resource_len(efx->pci_dev, fcw.bar) - ESE_GZ_FCW_LEN) { in ef100_pci_probe()
489 pci_err(pci_dev, "Func control window overruns BAR\n"); in ef100_pci_probe()
494 /* Set up basic I/O (BAR mappings etc) */ in ef100_pci_probe()
495 rc = efx_init_io(efx, fcw.bar, in ef100_pci_probe()
497 pci_resource_len(efx->pci_dev, fcw.bar)); in ef100_pci_probe()