Lines Matching +full:fine +full:- +full:tune
1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2003 - 2007 Francois Romieu <romieu@fr.zoreil.com>
63 while (len-- > 0) { in __rtl_writephy_batch()
64 __phy_write(phydev, regs->reg, regs->val); in __rtl_writephy_batch()
479 * Fine Tune Switching regulator parameter in rtl8168d_1_hw_phy_config()
497 /* Fine tune PLL performance */ in rtl8168d_1_hw_phy_config()
518 /* Fine tune PLL performance */ in rtl8168d_2_hw_phy_config()
542 /* Channel estimation fine tune */ in rtl8168e_1_hw_phy_config()
591 /* Channel estimation fine tune */ in rtl8168e_2_hw_phy_config()
599 /* For 4-corner performance improve */ in rtl8168e_2_hw_phy_config()
612 /* Improve 2-pair detection performance */ in rtl8168e_2_hw_phy_config()
628 /* For 4-corner performance improve */ in rtl8168f_hw_phy_config()
646 /* Channel estimation fine tune */ in rtl8168f_1_hw_phy_config()
665 /* Improve 2-pair detection performance */ in rtl8168f_1_hw_phy_config()
684 /* Improve 2-pair detection performance */ in rtl8411_hw_phy_config()
687 /* Channel estimation fine tune */ in rtl8411_hw_phy_config()
713 /* uc same-seed solution */ in rtl8411_hw_phy_config()
765 /* EEE auto-fallback function */ in rtl8168g_1_hw_phy_config()
768 /* Enable UC LPF tune function */ in rtl8168g_1_hw_phy_config()
807 /* enable R-tune & PGA-retune function */ in rtl8168h_2_hw_phy_config()
822 rlen = data - 3; in rtl8168h_2_hw_phy_config()
841 /* Enable UC LPF tune function */ in rtl8168ep_2_hw_phy_config()
870 /* Force PWM-mode */ in rtl8168ep_2_hw_phy_config()
889 /* CHN EST parameters adjust - fnet */ in rtl8117_hw_phy_config()
1123 /* PCI-E devices. */ in r8169_hw_phy_config()