Lines Matching refs:mii_control
1391 u32 mii_status, mii_control, mii_control_1000, reg; in phy_init() local
1461 mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); in phy_init()
1462 mii_control |= BMCR_ANENABLE; in phy_init()
1468 mii_control |= BMCR_ANRESTART; in phy_init()
1469 if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) { in phy_init()
1478 if (phy_reset(dev, mii_control)) { in phy_init()
1521 mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); in phy_init()
1522 mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE); in phy_init()
1524 mii_control |= BMCR_PDOWN; in phy_init()
1525 if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) in phy_init()
6163 u16 phy_reserved, mii_control; in nv_restore_phy() local
6176 mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); in nv_restore_phy()
6177 mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE); in nv_restore_phy()
6178 mii_rw(dev, np->phyaddr, MII_BMCR, mii_control); in nv_restore_phy()