Lines Matching refs:writeq
1138 writeq(val64, &bar0->tti_data1_mem); in init_tti()
1163 writeq(val64, &bar0->tti_data2_mem); in init_tti()
1168 writeq(val64, &bar0->tti_command_mem); in init_tti()
1213 writeq(val64, &bar0->sw_reset); in init_nic()
1220 writeq(val64, &bar0->sw_reset); in init_nic()
1242 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1244 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1254 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); in init_nic()
1275 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1276 writeq(val64, &bar0->tx_fifo_partition_1); in init_nic()
1277 writeq(val64, &bar0->tx_fifo_partition_2); in init_nic()
1278 writeq(val64, &bar0->tx_fifo_partition_3); in init_nic()
1293 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1298 writeq(val64, &bar0->tx_fifo_partition_1); in init_nic()
1303 writeq(val64, &bar0->tx_fifo_partition_2); in init_nic()
1308 writeq(val64, &bar0->tx_fifo_partition_3); in init_nic()
1323 writeq(PCC_ENABLE_FOUR, &bar0->pcc_enable); in init_nic()
1338 writeq(val64, &bar0->tx_pa_cfg); in init_nic()
1347 writeq(val64, &bar0->rx_queue_priority); in init_nic()
1396 writeq(val64, &bar0->rx_queue_cfg); in init_nic()
1405 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1406 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1407 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1408 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1409 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1413 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1414 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1415 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1416 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1418 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1422 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1424 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1426 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1428 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1430 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1434 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1435 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1436 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1437 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1439 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1443 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1445 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1447 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1449 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1451 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1455 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1457 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1459 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1461 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1463 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1467 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1469 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1471 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1473 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1475 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1479 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1480 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1481 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1482 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1484 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1491 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1500 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1501 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1502 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1503 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1504 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1507 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1511 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1512 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1513 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1514 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1516 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1519 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1523 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1525 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1527 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1529 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1531 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1534 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1538 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1539 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1540 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1541 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1543 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1546 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1550 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1552 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1554 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1556 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1558 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1561 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1565 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1567 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1569 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1571 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1573 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1576 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1580 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1582 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1584 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1586 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1588 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1591 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1595 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1596 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1597 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1598 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1600 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1603 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1610 writeq(val64, &bar0->rts_frm_len_n[i]); in init_nic()
1615 writeq(val64, &bar0->rts_frm_len_n[i]); in init_nic()
1628 writeq(MAC_RTS_FRM_LEN_SET(rts_frm_len[i]), in init_nic()
1644 writeq(mac_control->stats_mem_phy, &bar0->stat_addr); in init_nic()
1648 writeq(val64, &bar0->stat_byte_cnt); in init_nic()
1657 writeq(val64, &bar0->mac_link_util); in init_nic()
1683 writeq(val64, &bar0->rti_data1_mem); in init_nic()
1693 writeq(val64, &bar0->rti_data2_mem); in init_nic()
1699 writeq(val64, &bar0->rti_command_mem); in init_nic()
1728 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q0q3); in init_nic()
1729 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q4q7); in init_nic()
1735 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1737 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1746 writeq(val64, &bar0->mac_cfg); in init_nic()
1748 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1750 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1761 writeq(val64, &bar0->rmac_pause_cfg); in init_nic()
1775 writeq(val64, &bar0->mc_pause_thresh_q0q3); in init_nic()
1783 writeq(val64, &bar0->mc_pause_thresh_q4q7); in init_nic()
1791 writeq(val64, &bar0->pic_control); in init_nic()
1794 writeq(TXREQTO_VAL(0x7f) | TXREQTO_EN, &bar0->txreqtimeout); in init_nic()
1795 writeq(0x0, &bar0->read_retry_delay); in init_nic()
1796 writeq(0x0, &bar0->write_retry_delay); in init_nic()
1806 writeq(val64, &bar0->misc_control); in init_nic()
1809 writeq(val64, &bar0->pic_control2); in init_nic()
1813 writeq(val64, &bar0->tmac_avg_ipg); in init_nic()
1848 writeq(temp64, addr); in do_s2io_write_bits()
1857 writeq(DISABLE_ALL_INTRS, &bar0->general_int_mask); in en_dis_err_alarms()
2015 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask); in en_dis_able_nic_intrs()
2021 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask); in en_dis_able_nic_intrs()
2033 writeq(0x0, &bar0->tx_traffic_mask); in en_dis_able_nic_intrs()
2039 writeq(DISABLE_ALL_INTRS, &bar0->tx_traffic_mask); in en_dis_able_nic_intrs()
2048 writeq(0x0, &bar0->rx_traffic_mask); in en_dis_able_nic_intrs()
2054 writeq(DISABLE_ALL_INTRS, &bar0->rx_traffic_mask); in en_dis_able_nic_intrs()
2063 writeq(temp64, &bar0->general_int_mask); in en_dis_able_nic_intrs()
2191 writeq(fix_mac[i++], &bar0->gpio_control); in fix_mac_address()
2223 writeq((u64)ring->rx_blocks[0].block_dma_addr, in start_nic()
2235 writeq(val64, &bar0->prc_ctrl_n[i]); in start_nic()
2242 writeq(val64, &bar0->rx_pa_cfg); in start_nic()
2248 writeq(val64, &bar0->rx_pa_cfg); in start_nic()
2267 writeq(val64, &bar0->adapter_control); in start_nic()
2292 writeq(val64, &bar0->adapter_control); in start_nic()
2307 writeq(val64, &bar0->gpio_control); in start_nic()
2309 writeq(val64, (void __iomem *)bar0 + 0x2700); in start_nic()
2428 writeq(val64, &bar0->adapter_control); in stop_nic()
2815 writeq(0, &bar0->rx_traffic_mask); in s2io_poll_inta()
2846 writeq(val64, &bar0->rx_traffic_int); in s2io_netpoll()
2847 writeq(val64, &bar0->tx_traffic_int); in s2io_netpoll()
3097 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3099 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3108 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3110 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3117 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3119 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3143 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3145 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3153 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3155 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3420 writeq(val64, &bar0->sw_reset); in s2io_reset()
3460 writeq(s2BIT(62), &bar0->txpic_int_reg); in s2io_reset()
3497 writeq(val64, &bar0->gpio_control); in s2io_reset()
3499 writeq(val64, (void __iomem *)bar0 + 0x2700); in s2io_reset()
3508 writeq(val64, &bar0->pcc_err_reg); in s2io_reset()
3546 writeq(value[i], &bar0->swapper_ctrl); in s2io_set_swapper()
3564 writeq(valt, &bar0->xmsi_address); in s2io_set_swapper()
3577 writeq((value[i] | valr), &bar0->swapper_ctrl); in s2io_set_swapper()
3578 writeq(valt, &bar0->xmsi_address); in s2io_set_swapper()
3612 writeq(val64, &bar0->swapper_ctrl); in s2io_set_swapper()
3636 writeq(val64, &bar0->swapper_ctrl); in s2io_set_swapper()
3688 writeq(nic->msix_info[i].addr, &bar0->xmsi_address); in restore_xmsi_data()
3689 writeq(nic->msix_info[i].data, &bar0->xmsi_data); in restore_xmsi_data()
3691 writeq(val64, &bar0->xmsi_access); in restore_xmsi_data()
3711 writeq(val64, &bar0->xmsi_access); in store_xmsi_data()
3780 writeq(rx_mat, &bar0->rx_mat); in s2io_enable_msi_x()
3844 writeq(val64, &bar0->scheduled_int_ctrl); in s2io_test_msi()
3859 writeq(saved64, &bar0->scheduled_int_ctrl); in s2io_test_msi()
4156 writeq(val64, &tx_fifo->TxDL_Pointer); in s2io_xmit()
4163 writeq(val64, &tx_fifo->List_Control); in s2io_xmit()
4250 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask); in s2io_msix_fifo_handle()
4256 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int); in s2io_msix_fifo_handle()
4261 writeq(sp->general_int_mask, &bar0->general_int_mask); in s2io_msix_fifo_handle()
4285 writeq(val64, &bar0->gpio_int_reg); in s2io_txpic_intr_handle()
4289 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4295 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4297 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4309 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4318 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4323 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4345 writeq(val64, addr); in do_s2io_chk_alarm_bit()
4394 writeq(val64, &bar0->mac_rmac_err_reg); in s2io_handle_errors()
4626 writeq(val64, &bar0->mc_err_reg); in s2io_handle_errors()
4697 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask); in s2io_isr()
4702 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_mask); in s2io_isr()
4703 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int); in s2io_isr()
4713 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int); in s2io_isr()
4728 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int); in s2io_isr()
4746 writeq(sp->general_int_mask, &bar0->general_int_mask); in s2io_isr()
4772 writeq(val64, &bar0->stat_cfg); in s2io_updt_stats()
4901 writeq(RMAC_ADDR_DATA0_MEM_ADDR(multi_mac), in s2io_set_multicast()
4903 writeq(RMAC_ADDR_DATA1_MEM_MASK(mask), in s2io_set_multicast()
4908 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
4918 writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr), in s2io_set_multicast()
4920 writeq(RMAC_ADDR_DATA1_MEM_MASK(0x0), in s2io_set_multicast()
4925 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
4941 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4943 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4949 writeq(val64, &bar0->rx_pa_cfg); in s2io_set_multicast()
4963 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4965 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4971 writeq(val64, &bar0->rx_pa_cfg); in s2io_set_multicast()
4996 writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr), in s2io_set_multicast()
4998 writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL), in s2io_set_multicast()
5004 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
5026 writeq(RMAC_ADDR_DATA0_MEM_ADDR(mac_addr), in s2io_set_multicast()
5028 writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL), in s2io_set_multicast()
5034 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
5129 writeq(RMAC_ADDR_DATA0_MEM_ADDR(addr), in do_s2io_add_mac()
5134 writeq(val64, &bar0->rmac_addr_cmd_mem); in do_s2io_add_mac()
5178 writeq(val64, &bar0->rmac_addr_cmd_mem); in do_s2io_read_unicast_mc()
5397 writeq(val64, &bar0->gpio_control); in s2io_set_led()
5405 writeq(val64, &bar0->adapter_control); in s2io_set_led()
5452 writeq(sp->adapt_ctrl_org, &bar0->gpio_control); in s2io_ethtool_set_led()
5539 writeq(val64, &bar0->rmac_pause_cfg); in s2io_ethtool_setpause_data()
5654 writeq(SPI_DATA_WRITE(data, (cnt << 3)), &bar0->spi_data); in write_eeprom()
5882 writeq(val64, &bar0->xmsi_data); in s2io_register_test()
5890 writeq(val64, &bar0->xmsi_data); in s2io_register_test()
6087 writeq(val64, &bar0->adapter_control); in s2io_rldram_test()
6104 writeq(val64, &bar0->mc_rldram_test_d0); in s2io_rldram_test()
6109 writeq(val64, &bar0->mc_rldram_test_d1); in s2io_rldram_test()
6114 writeq(val64, &bar0->mc_rldram_test_d2); in s2io_rldram_test()
6117 writeq(val64, &bar0->mc_rldram_test_add); in s2io_rldram_test()
6655 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); in s2io_change_mtu()
6701 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6706 writeq(val64, &bar0->gpio_control); in s2io_set_link()
6710 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6722 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6729 writeq(val64, &bar0->gpio_control); in s2io_set_link()
6735 writeq(val64, &bar0->adapter_control); in s2io_set_link()
7615 writeq(val64, &bar0->rts_ds_mem_data); in rts_ds_steer()
7621 writeq(val64, &bar0->rts_ds_mem_ctrl); in rts_ds_steer()
7935 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_init_nic()
8003 writeq(val64, &bar0->gpio_control); in s2io_init_nic()
8005 writeq(val64, (void __iomem *)bar0 + 0x2700); in s2io_init_nic()