Lines Matching refs:spx5_wr

18 	spx5_wr(mask[0], sparx5, ANA_L3_VLAN_MASK_CFG(vid));  in sparx5_vlant_set_mask()
19 spx5_wr(mask[1], sparx5, ANA_L3_VLAN_MASK_CFG1(vid)); in sparx5_vlant_set_mask()
20 spx5_wr(mask[2], sparx5, ANA_L3_VLAN_MASK_CFG2(vid)); in sparx5_vlant_set_mask()
143 spx5_wr(0, spx5, ANA_AC_PGID_CFG(pgid)); in sparx5_pgid_clear()
144 spx5_wr(0, spx5, ANA_AC_PGID_CFG1(pgid)); in sparx5_pgid_clear()
145 spx5_wr(0, spx5, ANA_AC_PGID_CFG2(pgid)); in sparx5_pgid_clear()
166 spx5_wr(mask[0], sparx5, ANA_AC_PGID_CFG(port)); in sparx5_update_fwd()
167 spx5_wr(mask[1], sparx5, ANA_AC_PGID_CFG1(port)); in sparx5_update_fwd()
168 spx5_wr(mask[2], sparx5, ANA_AC_PGID_CFG2(port)); in sparx5_update_fwd()
178 spx5_wr(mask[0], sparx5, ANA_AC_SRC_CFG(port)); in sparx5_update_fwd()
179 spx5_wr(mask[1], sparx5, ANA_AC_SRC_CFG1(port)); in sparx5_update_fwd()
180 spx5_wr(mask[2], sparx5, ANA_AC_SRC_CFG2(port)); in sparx5_update_fwd()
182 spx5_wr(0, sparx5, ANA_AC_SRC_CFG(port)); in sparx5_update_fwd()
183 spx5_wr(0, sparx5, ANA_AC_SRC_CFG1(port)); in sparx5_update_fwd()
184 spx5_wr(0, sparx5, ANA_AC_SRC_CFG2(port)); in sparx5_update_fwd()
194 spx5_wr(mask[0], sparx5, ANA_L2_AUTO_LRN_CFG); in sparx5_update_fwd()
195 spx5_wr(mask[1], sparx5, ANA_L2_AUTO_LRN_CFG1); in sparx5_update_fwd()
196 spx5_wr(mask[2], sparx5, ANA_L2_AUTO_LRN_CFG2); in sparx5_update_fwd()
209 spx5_wr(val, sparx5, ANA_CL_VLAN_CTRL(port->portno)); in sparx5_vlan_port_apply()
219 spx5_wr(val, sparx5, in sparx5_vlan_port_apply()
231 spx5_wr(val, sparx5, REW_TAG_CTRL(port->portno)); in sparx5_vlan_port_apply()