1 // SPDX-License-Identifier: GPL-2.0+
10 static int sparx5_vlant_set_mask(struct sparx5 *sparx5, u16 vid)  in sparx5_vlant_set_mask()
12 	u32 mask[3];  in sparx5_vlant_set_mask()  local
14 	/* Divide up mask in 32 bit words */  in sparx5_vlant_set_mask()
15 	bitmap_to_arr32(mask, sparx5->vlan_mask[vid], SPX5_PORTS);  in sparx5_vlant_set_mask()
17 	/* Output mask to respective registers */  in sparx5_vlant_set_mask()
18 	spx5_wr(mask[0], sparx5, ANA_L3_VLAN_MASK_CFG(vid));  in sparx5_vlant_set_mask()
19 	spx5_wr(mask[1], sparx5, ANA_L3_VLAN_MASK_CFG1(vid));  in sparx5_vlant_set_mask()
20 	spx5_wr(mask[2], sparx5, ANA_L3_VLAN_MASK_CFG2(vid));  in sparx5_vlant_set_mask()
42 void sparx5_vlan_port_setup(struct sparx5 *sparx5, int portno)  in sparx5_vlan_port_setup()
44 	struct sparx5_port *port = sparx5->ports[portno];  in sparx5_vlan_port_setup()
48 		 ANA_CL_VLAN_CTRL_PORT_VID_SET(port->pvid),  in sparx5_vlan_port_setup()
52 		 ANA_CL_VLAN_CTRL(port->portno));  in sparx5_vlan_port_setup()
55 int sparx5_vlan_vid_add(struct sparx5_port *port, u16 vid, bool pvid,  in sparx5_vlan_vid_add()
58 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_vlan_vid_add()
59 	int ret;  in sparx5_vlan_vid_add()
62 	if (untagged && port->vid != vid) {  in sparx5_vlan_vid_add()
63 		if (port->vid) {  in sparx5_vlan_vid_add()
64 			netdev_err(port->ndev,  in sparx5_vlan_vid_add()
66 				   port->vid);  in sparx5_vlan_vid_add()
67 			return -EBUSY;  in sparx5_vlan_vid_add()
69 		port->vid = vid;  in sparx5_vlan_vid_add()
73 	set_bit(port->portno, sparx5->vlan_mask[vid]);  in sparx5_vlan_vid_add()
80 		port->pvid = vid;  in sparx5_vlan_vid_add()
87 int sparx5_vlan_vid_del(struct sparx5_port *port, u16 vid)  in sparx5_vlan_vid_del()
89 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_vlan_vid_del()
90 	int ret;  in sparx5_vlan_vid_del()
100 	clear_bit(port->portno, sparx5->vlan_mask[vid]);  in sparx5_vlan_vid_del()
106 	if (port->pvid == vid)  in sparx5_vlan_vid_del()
107 		port->pvid = 0;  in sparx5_vlan_vid_del()
110 	if (port->vid == vid)  in sparx5_vlan_vid_del()
111 		port->vid = 0;  in sparx5_vlan_vid_del()
118 void sparx5_pgid_update_mask(struct sparx5_port *port, int pgid, bool enable)  in sparx5_pgid_update_mask()
120 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_pgid_update_mask()
121 	u32 val, mask;  in sparx5_pgid_update_mask()  local
123 	/* mask is spread across 3 registers x 32 bit */  in sparx5_pgid_update_mask()
124 	if (port->portno < 32) {  in sparx5_pgid_update_mask()
125 		mask = BIT(port->portno);  in sparx5_pgid_update_mask()
126 		val = enable ? mask : 0;  in sparx5_pgid_update_mask()
127 		spx5_rmw(val, mask, sparx5, ANA_AC_PGID_CFG(pgid));  in sparx5_pgid_update_mask()
128 	} else if (port->portno < 64) {  in sparx5_pgid_update_mask()
129 		mask = BIT(port->portno - 32);  in sparx5_pgid_update_mask()
130 		val = enable ? mask : 0;  in sparx5_pgid_update_mask()
131 		spx5_rmw(val, mask, sparx5, ANA_AC_PGID_CFG1(pgid));  in sparx5_pgid_update_mask()
132 	} else if (port->portno < SPX5_PORTS) {  in sparx5_pgid_update_mask()
133 		mask = BIT(port->portno - 64);  in sparx5_pgid_update_mask()
134 		val = enable ? mask : 0;  in sparx5_pgid_update_mask()
135 		spx5_rmw(val, mask, sparx5, ANA_AC_PGID_CFG2(pgid));  in sparx5_pgid_update_mask()
137 		netdev_err(port->ndev, "Invalid port no: %d\n", port->portno);  in sparx5_pgid_update_mask()
141 void sparx5_pgid_clear(struct sparx5 *spx5, int pgid)  in sparx5_pgid_clear()
148 void sparx5_pgid_read_mask(struct sparx5 *spx5, int pgid, u32 portmask[3])  in sparx5_pgid_read_mask()
158 	u32 mask[3];  in sparx5_update_fwd()  local
159 	int port;  in sparx5_update_fwd()
161 	/* Divide up fwd mask in 32 bit words */  in sparx5_update_fwd()
162 	bitmap_to_arr32(mask, sparx5->bridge_fwd_mask, SPX5_PORTS);  in sparx5_update_fwd()
166 		spx5_wr(mask[0], sparx5, ANA_AC_PGID_CFG(port));  in sparx5_update_fwd()
167 		spx5_wr(mask[1], sparx5, ANA_AC_PGID_CFG1(port));  in sparx5_update_fwd()
168 		spx5_wr(mask[2], sparx5, ANA_AC_PGID_CFG2(port));  in sparx5_update_fwd()
173 		if (test_bit(port, sparx5->bridge_fwd_mask)) {  in sparx5_update_fwd()
175 			bitmap_copy(workmask, sparx5->bridge_fwd_mask, SPX5_PORTS);  in sparx5_update_fwd()
177 			bitmap_to_arr32(mask, workmask, SPX5_PORTS);  in sparx5_update_fwd()
178 			spx5_wr(mask[0], sparx5, ANA_AC_SRC_CFG(port));  in sparx5_update_fwd()
179 			spx5_wr(mask[1], sparx5, ANA_AC_SRC_CFG1(port));  in sparx5_update_fwd()
180 			spx5_wr(mask[2], sparx5, ANA_AC_SRC_CFG2(port));  in sparx5_update_fwd()
189 	bitmap_and(workmask, sparx5->bridge_fwd_mask,  in sparx5_update_fwd()
190 		   sparx5->bridge_lrn_mask, SPX5_PORTS);  in sparx5_update_fwd()
191 	bitmap_to_arr32(mask, workmask, SPX5_PORTS);  in sparx5_update_fwd()
193 	/* Apply learning mask */  in sparx5_update_fwd()
194 	spx5_wr(mask[0], sparx5, ANA_L2_AUTO_LRN_CFG);  in sparx5_update_fwd()
195 	spx5_wr(mask[1], sparx5, ANA_L2_AUTO_LRN_CFG1);  in sparx5_update_fwd()
196 	spx5_wr(mask[2], sparx5, ANA_L2_AUTO_LRN_CFG2);  in sparx5_update_fwd()
206 	val = ANA_CL_VLAN_CTRL_VLAN_AWARE_ENA_SET(port->vlan_aware) |  in sparx5_vlan_port_apply()
207 		ANA_CL_VLAN_CTRL_VLAN_POP_CNT_SET(port->vlan_aware) |  in sparx5_vlan_port_apply()
208 		ANA_CL_VLAN_CTRL_PORT_VID_SET(port->pvid);  in sparx5_vlan_port_apply()
209 	spx5_wr(val, sparx5, ANA_CL_VLAN_CTRL(port->portno));  in sparx5_vlan_port_apply()
212 	if (port->vlan_aware && !port->pvid)  in sparx5_vlan_port_apply()
213 		/* If port is vlan-aware and tagged, drop untagged and  in sparx5_vlan_port_apply()
220 		ANA_CL_VLAN_FILTER_CTRL(port->portno, 0));  in sparx5_vlan_port_apply()
224 	if (port->vlan_aware) {  in sparx5_vlan_port_apply()
225 		if (port->vid)  in sparx5_vlan_port_apply()
231 	spx5_wr(val, sparx5, REW_TAG_CTRL(port->portno));  in sparx5_vlan_port_apply()
234 	spx5_rmw(REW_PORT_VLAN_CFG_PORT_VID_SET(port->vid),  in sparx5_vlan_port_apply()
237 		 REW_PORT_VLAN_CFG(port->portno));  in sparx5_vlan_port_apply()