410 	spx5_wr(ANA_AC_STAT_RESET_RESET_SET(1), sparx5, ANA_AC_STAT_RESET);  in sparx5_init_switchcore()
411 	spx5_wr(ASM_STAT_CFG_STAT_CNT_CLR_SHOT_SET(1), sparx5, ASM_STAT_CFG);  in sparx5_init_switchcore()
414 	spx5_wr(HSCH_RESET_CFG_CORE_ENA_SET(1), sparx5, HSCH_RESET_CFG);  in sparx5_init_switchcore()
554 			spx5_wr(0xFFF, sparx5,  in sparx5_qlim_set()
558 			spx5_wr(0xFFF, sparx5,  in sparx5_qlim_set()
563 	spx5_wr(QLIM_WM(80), sparx5, XQS_QLIMIT_SHR_QLIM_CFG(0));  in sparx5_qlim_set()
564 	spx5_wr(QLIM_WM(90), sparx5, XQS_QLIMIT_SHR_CTOP_CFG(0));  in sparx5_qlim_set()
565 	spx5_wr(QLIM_WM(95), sparx5, XQS_QLIMIT_SHR_ATOP_CFG(0));  in sparx5_qlim_set()
566 	spx5_wr(QLIM_WM(100), sparx5, XQS_QLIMIT_SHR_TOP_CFG(0));  in sparx5_qlim_set()
591 				spx5_wr(sparx5->ports[idx]->conf.sd_sgpio,  in sparx5_board_init()
605 		spx5_wr(idx, sparx5, ANA_AC_OWN_UPSID(idx));  in sparx5_start()
606 		spx5_wr(idx, sparx5, ANA_CL_OWN_UPSID(idx));  in sparx5_start()
607 		spx5_wr(idx, sparx5, ANA_L2_OWN_UPSID(idx));  in sparx5_start()
608 		spx5_wr(idx, sparx5, REW_OWN_UPSID(idx));  in sparx5_start()
622 	spx5_wr(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_SET(1),  in sparx5_start()
624 	spx5_wr(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_SET(1),  in sparx5_start()