Lines Matching +full:lan966x +full:- +full:switch
1 // SPDX-License-Identifier: GPL-2.0+
17 value = (MULTIPLIER_BIT - 1); in lan966x_wm_enc()
27 struct lan966x *lan966x = port->lan966x; in lan966x_port_link_down() local
35 lan966x, AFI_PORT_CFG(port->chip_port)); in lan966x_port_link_down()
39 val = lan_rd(lan966x, AFI_PORT_FRM_OUT(port->chip_port)); in lan966x_port_link_down()
46 pr_err("AFI timeout chip port %u", port->chip_port); in lan966x_port_link_down()
56 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_link_down()
61 lan966x, DEV_MAC_ENA_CFG(port->chip_port)); in lan966x_port_link_down()
63 /* 3: Disable traffic being sent to or from switch port */ in lan966x_port_link_down()
66 lan966x, QSYS_SW_PORT_MODE(port->chip_port)); in lan966x_port_link_down()
71 lan966x, QSYS_PORT_MODE(port->chip_port)); in lan966x_port_link_down()
76 lan966x, SYS_PAUSE_CFG(port->chip_port)); in lan966x_port_link_down()
81 lan966x, QSYS_SW_PORT_MODE(port->chip_port)); in lan966x_port_link_down()
89 lan966x, SYS_FRONT_PORT_MODE(port->chip_port)); in lan966x_port_link_down()
94 lan966x, QSYS_SW_PORT_MODE(port->chip_port)); in lan966x_port_link_down()
99 lan966x, QSYS_PORT_MODE(port->chip_port)); in lan966x_port_link_down()
103 val = lan_rd(lan966x, QSYS_SW_STATUS(port->chip_port)); in lan966x_port_link_down()
110 pr_err("Flush timeout chip port %u", port->chip_port); in lan966x_port_link_down()
118 lan966x, DEV_MAC_ENA_CFG(port->chip_port)); in lan966x_port_link_down()
122 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_link_down()
132 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_link_down()
137 lan966x, QSYS_SW_PORT_MODE(port->chip_port)); in lan966x_port_link_down()
146 struct lan966x_port_config *config = &port->config; in lan966x_port_link_up()
147 struct lan966x *lan966x = port->lan966x; in lan966x_port_link_up() local
151 switch (config->speed) { in lan966x_port_link_up()
168 lan966x_taprio_speed_set(port, config->speed); in lan966x_port_link_up()
173 if (phy_interface_num_ports(config->portmode) == 4 || in lan966x_port_link_up()
174 config->portmode == PHY_INTERFACE_MODE_SGMII) in lan966x_port_link_up()
177 lan_wr(config->duplex | mode, in lan966x_port_link_up()
178 lan966x, DEV_MAC_MODE_CFG(port->chip_port)); in lan966x_port_link_up()
180 lan_rmw(DEV_MAC_IFG_CFG_TX_IFG_SET(config->duplex ? 6 : 5) | in lan966x_port_link_up()
181 DEV_MAC_IFG_CFG_RX_IFG1_SET(config->speed == SPEED_10 ? 2 : 1) | in lan966x_port_link_up()
186 lan966x, DEV_MAC_IFG_CFG(port->chip_port)); in lan966x_port_link_up()
192 lan966x, DEV_MAC_HDX_CFG(port->chip_port)); in lan966x_port_link_up()
194 if (config->portmode == PHY_INTERFACE_MODE_GMII) { in lan966x_port_link_up()
195 if (config->speed == SPEED_1000) in lan966x_port_link_up()
198 lan966x, in lan966x_port_link_up()
199 CHIP_TOP_CUPHY_PORT_CFG(port->chip_port)); in lan966x_port_link_up()
203 lan966x, in lan966x_port_link_up()
204 CHIP_TOP_CUPHY_PORT_CFG(port->chip_port)); in lan966x_port_link_up()
209 lan966x, ANA_PFC_CFG(port->chip_port)); in lan966x_port_link_up()
213 lan966x, DEV_PCS1G_CFG(port->chip_port)); in lan966x_port_link_up()
217 lan966x, DEV_PCS1G_SD_CFG(port->chip_port)); in lan966x_port_link_up()
223 lan966x, SYS_PAUSE_CFG(port->chip_port)); in lan966x_port_link_up()
226 lan_wr(0, lan966x, DEV_FC_MAC_LOW_CFG(port->chip_port)); in lan966x_port_link_up()
227 lan_wr(0, lan966x, DEV_FC_MAC_HIGH_CFG(port->chip_port)); in lan966x_port_link_up()
234 SYS_MAC_FC_CFG_RX_FC_ENA_SET(config->pause & MLO_PAUSE_RX ? 1 : 0) | in lan966x_port_link_up()
235 SYS_MAC_FC_CFG_TX_FC_ENA_SET(config->pause & MLO_PAUSE_TX ? 1 : 0), in lan966x_port_link_up()
242 lan966x, SYS_MAC_FC_CFG(port->chip_port)); in lan966x_port_link_up()
245 atop_wm = lan966x->shared_queue_sz; in lan966x_port_link_up()
250 lan_wr(lan966x_wm_enc(atop_wm / lan966x->num_phys_ports + 1), lan966x, in lan966x_port_link_up()
251 SYS_ATOP(port->chip_port)); in lan966x_port_link_up()
252 lan_wr(lan966x_wm_enc(atop_wm), lan966x, SYS_ATOP_TOT_CFG); in lan966x_port_link_up()
258 lan966x, DEV_MAC_ENA_CFG(port->chip_port)); in lan966x_port_link_up()
262 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_link_up()
268 lan966x, QSYS_SW_PORT_MODE(port->chip_port)); in lan966x_port_link_up()
274 lan966x, AFI_PORT_CFG(port->chip_port)); in lan966x_port_link_up()
290 struct lan966x *lan966x = port->lan966x; in lan966x_port_status_get() local
296 val = lan_rd(lan966x, DEV_PCS1G_STICKY(port->chip_port)); in lan966x_port_status_get()
299 lan_wr(val, lan966x, DEV_PCS1G_STICKY(port->chip_port)); in lan966x_port_status_get()
302 val = lan_rd(lan966x, DEV_PCS1G_LINK_STATUS(port->chip_port)); in lan966x_port_status_get()
303 state->link = DEV_PCS1G_LINK_STATUS_LINK_STATUS_GET(val) && in lan966x_port_status_get()
305 state->link &= !link_down; in lan966x_port_status_get()
308 val = lan_rd(lan966x, DEV_PCS1G_ANEG_STATUS(port->chip_port)); in lan966x_port_status_get()
311 state->an_complete = true; in lan966x_port_status_get()
313 bmsr |= state->link ? BMSR_LSTATUS : 0; in lan966x_port_status_get()
319 if (!state->link) in lan966x_port_status_get()
322 if (state->interface == PHY_INTERFACE_MODE_1000BASEX) in lan966x_port_status_get()
323 state->speed = SPEED_1000; in lan966x_port_status_get()
324 else if (state->interface == PHY_INTERFACE_MODE_2500BASEX) in lan966x_port_status_get()
325 state->speed = SPEED_2500; in lan966x_port_status_get()
327 state->duplex = DUPLEX_FULL; in lan966x_port_status_get()
334 struct lan966x *lan966x = port->lan966x; in lan966x_port_pcs_set() local
339 if (config->portmode == PHY_INTERFACE_MODE_QUSGMII) in lan966x_port_pcs_set()
342 if (config->inband) { in lan966x_port_pcs_set()
343 if (config->portmode == PHY_INTERFACE_MODE_SGMII || in lan966x_port_pcs_set()
344 phy_interface_num_ports(config->portmode) == 4) in lan966x_port_pcs_set()
345 inband_aneg = true; /* Cisco-SGMII in-band-aneg */ in lan966x_port_pcs_set()
346 else if (config->portmode == PHY_INTERFACE_MODE_1000BASEX && in lan966x_port_pcs_set()
347 config->autoneg) in lan966x_port_pcs_set()
348 inband_aneg = true; /* Clause-37 in-band-aneg */ in lan966x_port_pcs_set()
364 lan966x, DEV_PCS1G_MODE_CFG(port->chip_port)); in lan966x_port_pcs_set()
368 lan966x, DEV_PCS1G_CFG(port->chip_port)); in lan966x_port_pcs_set()
371 int adv = phylink_mii_c22_pcs_encode_advertisement(config->portmode, in lan966x_port_pcs_set()
372 config->advertising); in lan966x_port_pcs_set()
374 /* Enable in-band aneg */ in lan966x_port_pcs_set()
379 lan966x, DEV_PCS1G_ANEG_CFG(port->chip_port)); in lan966x_port_pcs_set()
381 lan_wr(0, lan966x, DEV_PCS1G_ANEG_CFG(port->chip_port)); in lan966x_port_pcs_set()
391 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_pcs_set()
393 port->config = *config; in lan966x_port_pcs_set()
401 u8 *pcp_itr = qos->map; in lan966x_port_qos_pcp_set()
404 lan_rmw(ANA_QOS_CFG_QOS_PCP_ENA_SET(qos->enable), in lan966x_port_qos_pcp_set()
406 port->lan966x, ANA_QOS_CFG(port->chip_port)); in lan966x_port_qos_pcp_set()
409 for (int i = 0; i < ARRAY_SIZE(qos->map); i++) { in lan966x_port_qos_pcp_set()
417 port->lan966x, in lan966x_port_qos_pcp_set()
418 ANA_PCP_DEI_CFG(port->chip_port, i)); in lan966x_port_qos_pcp_set()
425 struct lan966x *lan966x = port->lan966x; in lan966x_port_qos_dscp_set() local
428 lan_rmw(ANA_QOS_CFG_QOS_DSCP_ENA_SET(qos->enable), in lan966x_port_qos_dscp_set()
430 lan966x, ANA_QOS_CFG(port->chip_port)); in lan966x_port_qos_dscp_set()
433 for (int i = 0; i < ARRAY_SIZE(qos->map); i++) in lan966x_port_qos_dscp_set()
435 ANA_DSCP_CFG_QOS_DSCP_VAL_SET(*(qos->map + i)), in lan966x_port_qos_dscp_set()
438 lan966x, ANA_DSCP_CFG(i)); in lan966x_port_qos_dscp_set()
440 /* Set per-dscp trust */ in lan966x_port_qos_dscp_set()
441 for (int i = 0; i < ARRAY_SIZE(qos->map); i++) in lan966x_port_qos_dscp_set()
442 lan_rmw(ANA_DSCP_CFG_DSCP_TRUST_ENA_SET(qos->enable), in lan966x_port_qos_dscp_set()
444 lan966x, ANA_DSCP_CFG(i)); in lan966x_port_qos_dscp_set()
452 ANA_QOS_CFG_QOS_DEFAULT_VAL_SET(qos->default_prio), in lan966x_port_qos_default_set()
455 port->lan966x, ANA_QOS_CFG(port->chip_port)); in lan966x_port_qos_default_set()
462 port->lan966x, ANA_VLAN_CFG(port->chip_port)); in lan966x_port_qos_default_set()
473 if (qos->enable) in lan966x_port_qos_pcp_rewr_set()
483 port->lan966x, REW_TAG_CFG(port->chip_port)); in lan966x_port_qos_pcp_rewr_set()
486 for (int i = 0; i < ARRAY_SIZE(qos->map); i++) { in lan966x_port_qos_pcp_rewr_set()
487 pcp = qos->map[i]; in lan966x_port_qos_pcp_rewr_set()
497 port->lan966x, in lan966x_port_qos_pcp_rewr_set()
498 REW_PCP_DEI_CFG(port->chip_port, in lan966x_port_qos_pcp_rewr_set()
509 if (qos->enable) in lan966x_port_qos_dscp_rewr_set()
517 port->lan966x, REW_DSCP_CFG(port->chip_port)); in lan966x_port_qos_dscp_rewr_set()
520 for (int i = 0; i < ARRAY_SIZE(qos->map); i++) { in lan966x_port_qos_dscp_rewr_set()
521 dscp = qos->map[i]; in lan966x_port_qos_dscp_rewr_set()
525 port->lan966x, ANA_DSCP_REWR_CFG(i)); in lan966x_port_qos_dscp_rewr_set()
534 port->lan966x, ANA_QOS_CFG(port->chip_port)); in lan966x_port_qos_dscp_rewr_mode_set()
540 lan966x_port_qos_pcp_set(port, &qos->pcp); in lan966x_port_qos_set()
541 lan966x_port_qos_dscp_set(port, &qos->dscp); in lan966x_port_qos_set()
543 lan966x_port_qos_pcp_rewr_set(port, &qos->pcp_rewr); in lan966x_port_qos_set()
544 lan966x_port_qos_dscp_rewr_set(port, &qos->dscp_rewr); in lan966x_port_qos_set()
549 struct lan966x_port_config *config = &port->config; in lan966x_port_init()
550 struct lan966x *lan966x = port->lan966x; in lan966x_port_init() local
554 lan966x, ANA_PORT_CFG(port->chip_port)); in lan966x_port_init()
558 if (lan966x->fdma) in lan966x_port_init()
559 lan966x_fdma_netdev_init(lan966x, port->dev); in lan966x_port_init()
561 if (phy_interface_num_ports(config->portmode) != 4) in lan966x_port_init()
570 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_init()