242 	lan_wr(QS_INJ_CTRL_GAP_SIZE_SET(1) |  in lan966x_port_ifh_xmit()
253 		lan_wr((__force u32)ifh[i], lan966x, QS_INJ_WR(grp));  in lan966x_port_ifh_xmit()
265 		lan_wr(((u32 *)skb->data)[i], lan966x, QS_INJ_WR(grp));  in lan966x_port_ifh_xmit()
275 		lan_wr(0, lan966x, QS_INJ_WR(grp));  in lan966x_port_ifh_xmit()
280 	lan_wr(QS_INJ_CTRL_GAP_SIZE_SET(1) |  in lan966x_port_ifh_xmit()
287 	lan_wr(0, lan966x, QS_INJ_WR(grp));  in lan966x_port_ifh_xmit()
403 	lan_wr(DEV_MAC_MAXLEN_CFG_MAX_LEN_SET(LAN966X_HW_MTU(new_mtu)),  in lan966x_port_change_mtu()
412 		lan_wr(DEV_MAC_MAXLEN_CFG_MAX_LEN_SET(LAN966X_HW_MTU(old_mtu)),  in lan966x_port_change_mtu()
891 	lan_wr(lan_rd(lan966x, QS_XTR_FLUSH) |  in lan966x_init()
899 	lan_wr(lan_rd(lan966x, QS_XTR_FLUSH) &  in lan966x_init()
906 	lan_wr(ANA_AUTOAGE_AGE_PERIOD_SET(BR_DEFAULT_AGEING_TIME / 2 / HZ),  in lan966x_init()
915 	lan_wr(SYS_FRM_AGING_AGE_TX_ENA_SET(1) |  in lan966x_init()
920 	lan_wr(0, lan966x, QSYS_CPU_GROUP_MAP);  in lan966x_init()
925 	lan_wr(QS_XTR_GRP_CFG_MODE_SET(lan966x->fdma ? 2 : 1) |  in lan966x_init()
930 	lan_wr(QS_INJ_GRP_CFG_MODE_SET(lan966x->fdma ? 2 : 1) |  in lan966x_init()
939 	lan_wr(SYS_PORT_MODE_INCL_INJ_HDR_SET(1) |  in lan966x_init()
944 	lan_wr(ANA_FLOODING_IPMC_FLD_MC4_DATA_SET(PGID_MCIPV4) |  in lan966x_init()
975 		lan_wr(0xffff, lan966x, ANA_CPU_FWD_BPDU_CFG(p));  in lan966x_init()
980 		lan_wr(1500 / 64, lan966x, QSYS_RES_CFG(i));  in lan966x_init()
981 		lan_wr(1500 / 64, lan966x, QSYS_RES_CFG(512 + i));  in lan966x_init()
985 	lan_wr(QSYS_SW_PORT_MODE_PORT_ENA_SET(1) |  in lan966x_init()
1022 	lan_wr(REW_PORT_CFG_NO_REWRITE_SET(1),  in lan966x_init()
1063 	lan_wr(SYS_RESET_CFG_CORE_ENA_SET(0), lan966x, SYS_RESET_CFG);  in lan966x_reset_switch()
1064 	lan_wr(SYS_RAM_INIT_RAM_INIT_SET(1), lan966x, SYS_RAM_INIT);  in lan966x_reset_switch()
1071 	lan_wr(SYS_RESET_CFG_CORE_ENA_SET(1), lan966x, SYS_RESET_CFG);  in lan966x_reset_switch()