Lines Matching refs:pci
74 MLXSW_ITEM32(pci, wqe, c, 0x00, 31, 1);
86 MLXSW_ITEM32(pci, wqe, lp, 0x00, 30, 1);
91 MLXSW_ITEM32(pci, wqe, type, 0x00, 23, 4);
96 MLXSW_ITEM16_INDEXED(pci, wqe, byte_count, 0x02, 0, 14, 0x02, 0x00, false);
102 MLXSW_ITEM64_INDEXED(pci, wqe, address, 0x08, 0, 64, 0x8, 0x0, false);
143 MLXSW_ITEM32(pci, cqe0, lag, 0x00, 23, 1);
144 MLXSW_ITEM32(pci, cqe12, lag, 0x00, 24, 1);
153 MLXSW_ITEM32(pci, cqe, system_port, 0x00, 0, 16);
154 MLXSW_ITEM32(pci, cqe0, lag_id, 0x00, 4, 12);
155 MLXSW_ITEM32(pci, cqe12, lag_id, 0x00, 0, 16);
157 MLXSW_ITEM32(pci, cqe0, lag_subport, 0x00, 0, 4);
158 MLXSW_ITEM32(pci, cqe12, lag_subport, 0x00, 16, 8);
164 MLXSW_ITEM32(pci, cqe, wqe_counter, 0x04, 16, 16);
171 MLXSW_ITEM32(pci, cqe, byte_count, 0x04, 0, 14);
180 MLXSW_ITEM32(pci, cqe2, mirror_cong_high, 0x08, 16, 4);
185 MLXSW_ITEM32(pci, cqe, trap_id, 0x08, 0, 10);
191 MLXSW_ITEM32(pci, cqe0, crc, 0x0C, 8, 1);
192 MLXSW_ITEM32(pci, cqe12, crc, 0x0C, 9, 1);
198 MLXSW_ITEM32(pci, cqe0, e, 0x0C, 7, 1);
199 MLXSW_ITEM32(pci, cqe12, e, 0x00, 27, 1);
206 MLXSW_ITEM32(pci, cqe0, sr, 0x0C, 6, 1);
207 MLXSW_ITEM32(pci, cqe12, sr, 0x00, 26, 1);
213 MLXSW_ITEM32(pci, cqe0, dqn, 0x0C, 1, 5);
214 MLXSW_ITEM32(pci, cqe12, dqn, 0x0C, 1, 6);
234 MLXSW_ITEM32(pci, cqe2, time_stamp_low, 0x0C, 16, 16);
242 MLXSW_ITEM32(pci, cqe2, mirror_tclass, 0x10, 27, 5);
247 MLXSW_ITEM32(pci, cqe2, tx_lag, 0x10, 24, 1);
253 MLXSW_ITEM32(pci, cqe2, tx_lag_subport, 0x10, 16, 8);
263 MLXSW_ITEM32(pci, cqe2, tx_lag_id, 0x10, 0, 16);
270 MLXSW_ITEM32(pci, cqe2, tx_system_port, 0x10, 0, 16);
277 MLXSW_ITEM32(pci, cqe2, mirror_cong_low, 0x14, 20, 12);
292 MLXSW_ITEM32(pci, cqe2, user_def_val_orig_pkt_len, 0x14, 0, 20);
297 MLXSW_ITEM32(pci, cqe2, mirror_reason, 0x18, 24, 8);
315 MLXSW_ITEM32(pci, cqe2, time_stamp_type, 0x18, 22, 2);
336 MLXSW_ITEM32(pci, cqe2, time_stamp_high, 0x18, 0, 22);
365 MLXSW_ITEM32(pci, cqe2, mirror_latency, 0x1C, 8, 24);
370 MLXSW_ITEM32(pci, cqe01, owner, 0x0C, 0, 1);
371 MLXSW_ITEM32(pci, cqe2, owner, 0x1C, 0, 1);
377 MLXSW_ITEM32(pci, eqe, event_type, 0x0C, 24, 8);
384 MLXSW_ITEM32(pci, eqe, event_sub_type, 0x0C, 16, 8);
389 MLXSW_ITEM32(pci, eqe, cqn, 0x0C, 8, 7);
394 MLXSW_ITEM32(pci, eqe, owner, 0x0C, 0, 1);
399 MLXSW_ITEM32(pci, eqe, cmd_token, 0x00, 16, 16);
404 MLXSW_ITEM32(pci, eqe, cmd_status, 0x00, 0, 8);
409 MLXSW_ITEM32(pci, eqe, cmd_out_param_h, 0x04, 0, 32);
414 MLXSW_ITEM32(pci, eqe, cmd_out_param_l, 0x08, 0, 32);