Lines Matching full:eq
97 static void eq_set_ci(struct mlx4_eq *eq, int req_not) in eq_set_ci() argument
99 __raw_writel((__force u32) cpu_to_be32((eq->cons_index & 0xffffff) | in eq_set_ci()
101 eq->doorbell); in eq_set_ci()
106 static struct mlx4_eqe *get_eqe(struct mlx4_eq *eq, u32 entry, u8 eqe_factor, in get_eqe() argument
109 /* (entry & (eq->nent - 1)) gives us a cyclic array */ in get_eqe()
110 unsigned long offset = (entry & (eq->nent - 1)) * eqe_size; in get_eqe()
118 …return eq->page_list[offset / PAGE_SIZE].buf + (offset + (eqe_factor ? MLX4_EQ_ENTRY_SIZE : 0)) % … in get_eqe()
121 static struct mlx4_eqe *next_eqe_sw(struct mlx4_eq *eq, u8 eqe_factor, u8 size) in next_eqe_sw() argument
123 struct mlx4_eqe *eqe = get_eqe(eq, eq->cons_index, eqe_factor, size); in next_eqe_sw()
124 return !!(eqe->owner & 0x80) ^ !!(eq->cons_index & eq->nent) ? NULL : eqe; in next_eqe_sw()
241 struct mlx4_eq *eq = &priv->eq_table.eq[vec]; in mlx4_set_eq_affinity_hint() local
243 if (!cpumask_available(eq->affinity_mask) || in mlx4_set_eq_affinity_hint()
244 cpumask_empty(eq->affinity_mask)) in mlx4_set_eq_affinity_hint()
247 hint_err = irq_update_affinity_hint(eq->irq, eq->affinity_mask); in mlx4_set_eq_affinity_hint()
494 static int mlx4_eq_int(struct mlx4_dev *dev, struct mlx4_eq *eq) in mlx4_eq_int() argument
512 while ((eqe = next_eqe_sw(eq, dev->caps.eqe_factor, eqe_size))) { in mlx4_eq_int()
514 * Make sure we read EQ entry contents after we've in mlx4_eq_int()
541 mlx4_dbg(dev, "QP event %02x(%02x) on EQ %d at index %u: could not get slave id (%d)\n", in mlx4_eq_int()
543 eq->eqn, eq->cons_index, ret); in mlx4_eq_int()
558 mlx4_dbg(dev, "%s: MLX4_EVENT_TYPE_SRQ_LIMIT. srq_no=0x%x, eq 0x%x\n", in mlx4_eq_int()
560 eq->eqn); in mlx4_eq_int()
571 mlx4_warn(dev, "SRQ event %02x(%02x) on EQ %d at index %u: could not get slave id (%d)\n", in mlx4_eq_int()
573 eq->eqn, eq->cons_index, ret); in mlx4_eq_int()
696 mlx4_dbg(dev, "CQ event %02x(%02x) on EQ %d at index %u: could not get slave id (%d)\n", in mlx4_eq_int()
698 eq->eqn, eq->cons_index, ret); in mlx4_eq_int()
714 mlx4_warn(dev, "EQ overrun on EQN %d\n", eq->eqn); in mlx4_eq_int()
781 …mlx4_warn(dev, "Unhandled event FATAL WARNING (%02x), subtype %02x on EQ %d at index %u. owner=%x,… in mlx4_eq_int()
782 eqe->type, eqe->subtype, eq->eqn, in mlx4_eq_int()
783 eq->cons_index, eqe->owner, eq->nent, in mlx4_eq_int()
786 !!(eq->cons_index & eq->nent) ? "HW" : "SW"); in mlx4_eq_int()
806 …"Unhandled recoverable error event detected: %02x(%02x) on EQ %d at index %u. owner=%x, nent=0x%x,… in mlx4_eq_int()
807 eqe->type, eqe->subtype, eq->eqn, in mlx4_eq_int()
808 eq->cons_index, eqe->owner, eq->nent, in mlx4_eq_int()
810 !!(eq->cons_index & eq->nent) ? "HW" : "SW"); in mlx4_eq_int()
818 …mlx4_warn(dev, "Unhandled event %02x(%02x) on EQ %d at index %u. owner=%x, nent=0x%x, slave=%x, ow… in mlx4_eq_int()
819 eqe->type, eqe->subtype, eq->eqn, in mlx4_eq_int()
820 eq->cons_index, eqe->owner, eq->nent, in mlx4_eq_int()
823 !!(eq->cons_index & eq->nent) ? "HW" : "SW"); in mlx4_eq_int()
827 ++eq->cons_index; in mlx4_eq_int()
839 eq_set_ci(eq, 0); in mlx4_eq_int()
844 eq_set_ci(eq, 1); in mlx4_eq_int()
859 work |= mlx4_eq_int(dev, &priv->eq_table.eq[i]); in mlx4_interrupt()
866 struct mlx4_eq *eq = eq_ptr; in mlx4_msi_x_interrupt() local
867 struct mlx4_dev *dev = eq->dev; in mlx4_msi_x_interrupt()
869 mlx4_eq_int(dev, eq); in mlx4_msi_x_interrupt()
927 * Each UAR holds 4 EQ doorbells. To figure out how many UARs in mlx4_num_eq_uar()
935 static void __iomem *mlx4_get_eq_uar(struct mlx4_dev *dev, struct mlx4_eq *eq) in mlx4_get_eq_uar() argument
940 index = eq->eqn / 4 - dev->caps.reserved_eqs / 4; in mlx4_get_eq_uar()
946 ((eq->eqn / 4) << (dev->uar_page_shift)), in mlx4_get_eq_uar()
949 mlx4_err(dev, "Couldn't map EQ doorbell for EQN 0x%06x\n", in mlx4_get_eq_uar()
950 eq->eqn); in mlx4_get_eq_uar()
955 return priv->eq_table.uar_map[index] + 0x800 + 8 * (eq->eqn % 4); in mlx4_get_eq_uar()
971 u8 intr, struct mlx4_eq *eq) in mlx4_create_eq() argument
983 eq->dev = dev; in mlx4_create_eq()
984 eq->nent = roundup_pow_of_two(max(nent, 2)); in mlx4_create_eq()
988 npages = PAGE_ALIGN(eq->nent * dev->caps.eqe_size) / PAGE_SIZE; in mlx4_create_eq()
990 eq->page_list = kmalloc_array(npages, sizeof(*eq->page_list), in mlx4_create_eq()
992 if (!eq->page_list) in mlx4_create_eq()
996 eq->page_list[i].buf = NULL; in mlx4_create_eq()
1008 eq->page_list[i].buf = dma_alloc_coherent(&dev->persist-> in mlx4_create_eq()
1012 if (!eq->page_list[i].buf) in mlx4_create_eq()
1016 eq->page_list[i].map = t; in mlx4_create_eq()
1019 eq->eqn = mlx4_bitmap_alloc(&priv->eq_table.bitmap); in mlx4_create_eq()
1020 if (eq->eqn == -1) in mlx4_create_eq()
1023 eq->doorbell = mlx4_get_eq_uar(dev, eq); in mlx4_create_eq()
1024 if (!eq->doorbell) { in mlx4_create_eq()
1029 err = mlx4_mtt_init(dev, npages, PAGE_SHIFT, &eq->mtt); in mlx4_create_eq()
1033 err = mlx4_write_mtt(dev, &eq->mtt, 0, npages, dma_list); in mlx4_create_eq()
1039 eq_context->log_eq_size = ilog2(eq->nent); in mlx4_create_eq()
1043 mtt_addr = mlx4_mtt_addr(dev, &eq->mtt); in mlx4_create_eq()
1047 err = mlx4_SW2HW_EQ(dev, mailbox, eq->eqn); in mlx4_create_eq()
1056 eq->cons_index = 0; in mlx4_create_eq()
1058 INIT_LIST_HEAD(&eq->tasklet_ctx.list); in mlx4_create_eq()
1059 INIT_LIST_HEAD(&eq->tasklet_ctx.process_list); in mlx4_create_eq()
1060 spin_lock_init(&eq->tasklet_ctx.lock); in mlx4_create_eq()
1061 tasklet_setup(&eq->tasklet_ctx.task, mlx4_cq_tasklet_cb); in mlx4_create_eq()
1066 mlx4_mtt_cleanup(dev, &eq->mtt); in mlx4_create_eq()
1069 mlx4_bitmap_free(&priv->eq_table.bitmap, eq->eqn, MLX4_USE_RR); in mlx4_create_eq()
1073 if (eq->page_list[i].buf) in mlx4_create_eq()
1075 eq->page_list[i].buf, in mlx4_create_eq()
1076 eq->page_list[i].map); in mlx4_create_eq()
1081 kfree(eq->page_list); in mlx4_create_eq()
1089 struct mlx4_eq *eq) in mlx4_free_eq() argument
1097 int npages = PAGE_ALIGN(dev->caps.eqe_size * eq->nent) / PAGE_SIZE; in mlx4_free_eq()
1099 err = mlx4_HW2SW_EQ(dev, eq->eqn); in mlx4_free_eq()
1103 synchronize_irq(eq->irq); in mlx4_free_eq()
1104 tasklet_disable(&eq->tasklet_ctx.task); in mlx4_free_eq()
1106 mlx4_mtt_cleanup(dev, &eq->mtt); in mlx4_free_eq()
1109 eq->page_list[i].buf, in mlx4_free_eq()
1110 eq->page_list[i].map); in mlx4_free_eq()
1112 kfree(eq->page_list); in mlx4_free_eq()
1113 mlx4_bitmap_free(&priv->eq_table.bitmap, eq->eqn, MLX4_USE_RR); in mlx4_free_eq()
1125 if (eq_table->eq[i].have_irq) { in mlx4_free_irqs()
1126 free_cpumask_var(eq_table->eq[i].affinity_mask); in mlx4_free_irqs()
1127 irq_update_affinity_hint(eq_table->eq[i].irq, NULL); in mlx4_free_irqs()
1128 free_irq(eq_table->eq[i].irq, eq_table->eq + i); in mlx4_free_irqs()
1129 eq_table->eq[i].have_irq = 0; in mlx4_free_irqs()
1161 priv->eq_table.eq = kcalloc(dev->caps.num_eqs - dev->caps.reserved_eqs, in mlx4_alloc_eq_table()
1162 sizeof(*priv->eq_table.eq), GFP_KERNEL); in mlx4_alloc_eq_table()
1163 if (!priv->eq_table.eq) in mlx4_alloc_eq_table()
1171 kfree(mlx4_priv(dev)->eq_table.eq); in mlx4_free_eq_table()
1224 0, &priv->eq_table.eq[MLX4_EQ_ASYNC]); in mlx4_init_eq_table()
1226 struct mlx4_eq *eq = &priv->eq_table.eq[i]; in mlx4_init_eq_table() local
1228 int port = find_first_bit(eq->actv_ports.ports, in mlx4_init_eq_table()
1246 info->rmap, eq->irq); in mlx4_init_eq_table()
1255 eq); in mlx4_init_eq_table()
1272 err = request_irq(priv->eq_table.eq[MLX4_EQ_ASYNC].irq, in mlx4_init_eq_table()
1274 priv->eq_table.eq + MLX4_EQ_ASYNC); in mlx4_init_eq_table()
1278 priv->eq_table.eq[MLX4_EQ_ASYNC].have_irq = 1; in mlx4_init_eq_table()
1293 priv->eq_table.eq[MLX4_EQ_ASYNC].eqn); in mlx4_init_eq_table()
1295 mlx4_warn(dev, "MAP_EQ for async EQ %d failed (%d)\n", in mlx4_init_eq_table()
1296 priv->eq_table.eq[MLX4_EQ_ASYNC].eqn, err); in mlx4_init_eq_table()
1298 /* arm ASYNC eq */ in mlx4_init_eq_table()
1299 eq_set_ci(&priv->eq_table.eq[MLX4_EQ_ASYNC], 1); in mlx4_init_eq_table()
1305 mlx4_free_eq(dev, &priv->eq_table.eq[--i]); in mlx4_init_eq_table()
1336 priv->eq_table.eq[MLX4_EQ_ASYNC].eqn); in mlx4_cleanup_eq_table()
1349 mlx4_free_eq(dev, &priv->eq_table.eq[i]); in mlx4_cleanup_eq_table()
1381 /* Map the new eq to handle all asynchronous events */ in mlx4_test_interrupt()
1383 priv->eq_table.eq[MLX4_CQ_TO_EQ_VECTOR(vector)].eqn); in mlx4_test_interrupt()
1385 mlx4_warn(dev, "Failed mapping eq for interrupt test\n"); in mlx4_test_interrupt()
1397 priv->eq_table.eq[MLX4_EQ_ASYNC].eqn); in mlx4_test_interrupt()
1413 return test_bit(port - 1, priv->eq_table.eq[vector].actv_ports.ports); in mlx4_is_eq_vector_valid()
1425 priv->eq_table.eq[i].actv_ports.ports); in mlx4_get_eqs_per_port()
1439 return !!(bitmap_weight(priv->eq_table.eq[vector].actv_ports.ports, in mlx4_is_eq_shared()
1464 priv->eq_table.eq[requested_vector].actv_ports.ports)) { in mlx4_assign_eq()
1467 struct mlx4_eq *eq; in mlx4_assign_eq() local
1473 eq = &priv->eq_table.eq[requested_vector]; in mlx4_assign_eq()
1475 test_bit(port - 1, eq->actv_ports.ports)) { in mlx4_assign_eq()
1485 struct mlx4_eq *eq = &priv->eq_table.eq[i]; in mlx4_assign_eq() local
1487 if (min_ref_count_val > eq->ref_count && in mlx4_assign_eq()
1488 test_bit(port - 1, eq->actv_ports.ports)) { in mlx4_assign_eq()
1489 min_ref_count_val = eq->ref_count; in mlx4_assign_eq()
1510 err = request_irq(priv->eq_table.eq[*prequested_vector].irq, in mlx4_assign_eq()
1513 priv->eq_table.eq + *prequested_vector); in mlx4_assign_eq()
1522 eq_set_ci(&priv->eq_table.eq[*prequested_vector], 1); in mlx4_assign_eq()
1523 priv->eq_table.eq[*prequested_vector].have_irq = 1; in mlx4_assign_eq()
1528 priv->eq_table.eq[*prequested_vector].ref_count++; in mlx4_assign_eq()
1546 return priv->eq_table.eq[MLX4_CQ_TO_EQ_VECTOR(cq_vec)].irq; in mlx4_eq_get_irq()
1556 priv->eq_table.eq[eq_vec].ref_count--; in mlx4_release_eq()
1558 /* once we allocated EQ, we don't release it because it might be binded in mlx4_release_eq()