Lines Matching refs:MLX4_PROT_MASK
545 if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_T) in ptys2ethtool_update_supported_port()
546 | MLX4_PROT_MASK(MLX4_1000BASE_T) in ptys2ethtool_update_supported_port()
547 | MLX4_PROT_MASK(MLX4_100BASE_TX))) { in ptys2ethtool_update_supported_port()
549 } else if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_CR) in ptys2ethtool_update_supported_port()
550 | MLX4_PROT_MASK(MLX4_10GBASE_SR) in ptys2ethtool_update_supported_port()
551 | MLX4_PROT_MASK(MLX4_56GBASE_SR4) in ptys2ethtool_update_supported_port()
552 | MLX4_PROT_MASK(MLX4_40GBASE_CR4) in ptys2ethtool_update_supported_port()
553 | MLX4_PROT_MASK(MLX4_40GBASE_SR4) in ptys2ethtool_update_supported_port()
554 | MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII))) { in ptys2ethtool_update_supported_port()
556 } else if (eth_proto & (MLX4_PROT_MASK(MLX4_56GBASE_KR4) in ptys2ethtool_update_supported_port()
557 | MLX4_PROT_MASK(MLX4_40GBASE_KR4) in ptys2ethtool_update_supported_port()
558 | MLX4_PROT_MASK(MLX4_20GBASE_KR2) in ptys2ethtool_update_supported_port()
559 | MLX4_PROT_MASK(MLX4_10GBASE_KR) in ptys2ethtool_update_supported_port()
560 | MLX4_PROT_MASK(MLX4_10GBASE_KX4) in ptys2ethtool_update_supported_port()
561 | MLX4_PROT_MASK(MLX4_1000BASE_KX))) { in ptys2ethtool_update_supported_port()
573 if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_T) in ptys_get_active_port()
574 | MLX4_PROT_MASK(MLX4_1000BASE_T) in ptys_get_active_port()
575 | MLX4_PROT_MASK(MLX4_100BASE_TX))) { in ptys_get_active_port()
579 if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_SR) in ptys_get_active_port()
580 | MLX4_PROT_MASK(MLX4_56GBASE_SR4) in ptys_get_active_port()
581 | MLX4_PROT_MASK(MLX4_40GBASE_SR4) in ptys_get_active_port()
582 | MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII))) { in ptys_get_active_port()
586 if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_CR) in ptys_get_active_port()
587 | MLX4_PROT_MASK(MLX4_56GBASE_CR4) in ptys_get_active_port()
588 | MLX4_PROT_MASK(MLX4_40GBASE_CR4))) { in ptys_get_active_port()
592 if (eth_proto & (MLX4_PROT_MASK(MLX4_56GBASE_KR4) in ptys_get_active_port()
593 | MLX4_PROT_MASK(MLX4_40GBASE_KR4) in ptys_get_active_port()
594 | MLX4_PROT_MASK(MLX4_20GBASE_KR2) in ptys_get_active_port()
595 | MLX4_PROT_MASK(MLX4_10GBASE_KR) in ptys_get_active_port()
596 | MLX4_PROT_MASK(MLX4_10GBASE_KX4) in ptys_get_active_port()
597 | MLX4_PROT_MASK(MLX4_1000BASE_KX))) { in ptys_get_active_port()
692 if (eth_proto & MLX4_PROT_MASK(i)) in ptys2ethtool_update_link_modes()
941 (MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII) | in mlx4_en_set_link_ksettings()
942 MLX4_PROT_MASK(MLX4_1000BASE_KX))) && in mlx4_en_set_link_ksettings()