29 static void ppe_w32(struct mtk_ppe *ppe, u32 reg, u32 val)  in ppe_w32()  function
46 	ppe_w32(ppe, reg, val);  in ppe_m32()
102 	ppe_w32(ppe, MTK_PPE_MIB_SER_CR, val);  in mtk_mib_entry_read()
832 	ppe_w32(ppe, MTK_PPE_KEEPALIVE, 0);  in mtk_ppe_prepare_reset()
837 	ppe_w32(ppe, MTK_PPE_KEEPALIVE, 0xffffffff);  in mtk_ppe_prepare_reset()
984 	ppe_w32(ppe, MTK_PPE_TB_BASE, ppe->foe_phys);  in mtk_ppe_start()
1004 	ppe_w32(ppe, MTK_PPE_TB_CFG, val);  in mtk_ppe_start()
1006 	ppe_w32(ppe, MTK_PPE_IP_PROTO_CHK,  in mtk_ppe_start()
1026 	ppe_w32(ppe, MTK_PPE_FLOW_CFG, val);  in mtk_ppe_start()
1030 	ppe_w32(ppe, MTK_PPE_UNBIND_AGE, val);  in mtk_ppe_start()
1034 	ppe_w32(ppe, MTK_PPE_BIND_AGE0, val);  in mtk_ppe_start()
1038 	ppe_w32(ppe, MTK_PPE_BIND_AGE1, val);  in mtk_ppe_start()
1041 	ppe_w32(ppe, MTK_PPE_BIND_LIMIT0, val);  in mtk_ppe_start()
1045 	ppe_w32(ppe, MTK_PPE_BIND_LIMIT1, val);  in mtk_ppe_start()
1049 	ppe_w32(ppe, MTK_PPE_BIND_RATE, val);  in mtk_ppe_start()
1056 	ppe_w32(ppe, MTK_PPE_GLO_CFG, val);  in mtk_ppe_start()
1058 	ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT, 0);  in mtk_ppe_start()
1061 		ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT1, 0xcb777);  in mtk_ppe_start()
1062 		ppe_w32(ppe, MTK_PPE_SBW_CTRL, 0x7f);  in mtk_ppe_start()
1066 		ppe_w32(ppe, MTK_PPE_MIB_TB_BASE, ppe->mib_phys);  in mtk_ppe_start()
1107 	ppe_w32(ppe, MTK_PPE_FLOW_CFG, 0);  in mtk_ppe_stop()