Lines Matching refs:BIT_ULL
744 #define MT7623_CLKS_BITMAP (BIT_ULL(MTK_CLK_ETHIF) | BIT_ULL(MTK_CLK_ESW) | \
745 BIT_ULL(MTK_CLK_GP1) | BIT_ULL(MTK_CLK_GP2) | \
746 BIT_ULL(MTK_CLK_TRGPLL))
747 #define MT7622_CLKS_BITMAP (BIT_ULL(MTK_CLK_ETHIF) | BIT_ULL(MTK_CLK_ESW) | \
748 BIT_ULL(MTK_CLK_GP0) | BIT_ULL(MTK_CLK_GP1) | \
749 BIT_ULL(MTK_CLK_GP2) | \
750 BIT_ULL(MTK_CLK_SGMII_TX_250M) | \
751 BIT_ULL(MTK_CLK_SGMII_RX_250M) | \
752 BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \
753 BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \
754 BIT_ULL(MTK_CLK_SGMII_CK) | \
755 BIT_ULL(MTK_CLK_ETH2PLL))
758 #define MT7629_CLKS_BITMAP (BIT_ULL(MTK_CLK_ETHIF) | BIT_ULL(MTK_CLK_ESW) | \
759 BIT_ULL(MTK_CLK_GP0) | BIT_ULL(MTK_CLK_GP1) | \
760 BIT_ULL(MTK_CLK_GP2) | BIT_ULL(MTK_CLK_FE) | \
761 BIT_ULL(MTK_CLK_SGMII_TX_250M) | \
762 BIT_ULL(MTK_CLK_SGMII_RX_250M) | \
763 BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \
764 BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \
765 BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \
766 BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \
767 BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \
768 BIT_ULL(MTK_CLK_SGMII2_CDR_FB) | \
769 BIT_ULL(MTK_CLK_SGMII_CK) | \
770 BIT_ULL(MTK_CLK_ETH2PLL) | BIT_ULL(MTK_CLK_SGMIITOP))
771 #define MT7981_CLKS_BITMAP (BIT_ULL(MTK_CLK_FE) | BIT_ULL(MTK_CLK_GP2) | \
772 BIT_ULL(MTK_CLK_GP1) | \
773 BIT_ULL(MTK_CLK_WOCPU0) | \
774 BIT_ULL(MTK_CLK_SGMII_TX_250M) | \
775 BIT_ULL(MTK_CLK_SGMII_RX_250M) | \
776 BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \
777 BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \
778 BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \
779 BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \
780 BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \
781 BIT_ULL(MTK_CLK_SGMII2_CDR_FB) | \
782 BIT_ULL(MTK_CLK_SGMII_CK))
783 #define MT7986_CLKS_BITMAP (BIT_ULL(MTK_CLK_FE) | BIT_ULL(MTK_CLK_GP2) | \
784 BIT_ULL(MTK_CLK_GP1) | \
785 BIT_ULL(MTK_CLK_WOCPU1) | BIT_ULL(MTK_CLK_WOCPU0) | \
786 BIT_ULL(MTK_CLK_SGMII_TX_250M) | \
787 BIT_ULL(MTK_CLK_SGMII_RX_250M) | \
788 BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \
789 BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \
790 BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \
791 BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \
792 BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \
793 BIT_ULL(MTK_CLK_SGMII2_CDR_FB))
794 #define MT7988_CLKS_BITMAP (BIT_ULL(MTK_CLK_FE) | BIT_ULL(MTK_CLK_ESW) | \
795 BIT_ULL(MTK_CLK_GP1) | BIT_ULL(MTK_CLK_GP2) | \
796 BIT_ULL(MTK_CLK_GP3) | BIT_ULL(MTK_CLK_XGP1) | \
797 BIT_ULL(MTK_CLK_XGP2) | BIT_ULL(MTK_CLK_XGP3) | \
798 BIT_ULL(MTK_CLK_CRYPTO) | \
799 BIT_ULL(MTK_CLK_ETHWARP_WOCPU2) | \
800 BIT_ULL(MTK_CLK_ETHWARP_WOCPU1) | \
801 BIT_ULL(MTK_CLK_ETHWARP_WOCPU0) | \
802 BIT_ULL(MTK_CLK_TOP_ETH_GMII_SEL) | \
803 BIT_ULL(MTK_CLK_TOP_ETH_REFCK_50M_SEL) | \
804 BIT_ULL(MTK_CLK_TOP_ETH_SYS_200M_SEL) | \
805 BIT_ULL(MTK_CLK_TOP_ETH_SYS_SEL) | \
806 BIT_ULL(MTK_CLK_TOP_ETH_XGMII_SEL) | \
807 BIT_ULL(MTK_CLK_TOP_ETH_MII_SEL) | \
808 BIT_ULL(MTK_CLK_TOP_NETSYS_SEL) | \
809 BIT_ULL(MTK_CLK_TOP_NETSYS_500M_SEL) | \
810 BIT_ULL(MTK_CLK_TOP_NETSYS_PAO_2X_SEL) | \
811 BIT_ULL(MTK_CLK_TOP_NETSYS_SYNC_250M_SEL) | \
812 BIT_ULL(MTK_CLK_TOP_NETSYS_PPEFB_250M_SEL) | \
813 BIT_ULL(MTK_CLK_TOP_NETSYS_WARP_SEL))
969 #define MTK_RGMII BIT_ULL(MTK_RGMII_BIT)
970 #define MTK_TRGMII BIT_ULL(MTK_TRGMII_BIT)
971 #define MTK_SGMII BIT_ULL(MTK_SGMII_BIT)
972 #define MTK_ESW BIT_ULL(MTK_ESW_BIT)
973 #define MTK_GEPHY BIT_ULL(MTK_GEPHY_BIT)
974 #define MTK_MUX BIT_ULL(MTK_MUX_BIT)
975 #define MTK_INFRA BIT_ULL(MTK_INFRA_BIT)
976 #define MTK_SHARED_SGMII BIT_ULL(MTK_SHARED_SGMII_BIT)
977 #define MTK_HWLRO BIT_ULL(MTK_HWLRO_BIT)
978 #define MTK_SHARED_INT BIT_ULL(MTK_SHARED_INT_BIT)
979 #define MTK_TRGMII_MT7621_CLK BIT_ULL(MTK_TRGMII_MT7621_CLK_BIT)
980 #define MTK_QDMA BIT_ULL(MTK_QDMA_BIT)
981 #define MTK_SOC_MT7628 BIT_ULL(MTK_SOC_MT7628_BIT)
982 #define MTK_RSTCTRL_PPE1 BIT_ULL(MTK_RSTCTRL_PPE1_BIT)
983 #define MTK_RSTCTRL_PPE2 BIT_ULL(MTK_RSTCTRL_PPE2_BIT)
984 #define MTK_U3_COPHY_V2 BIT_ULL(MTK_U3_COPHY_V2_BIT)
985 #define MTK_SRAM BIT_ULL(MTK_SRAM_BIT)
986 #define MTK_36BIT_DMA BIT_ULL(MTK_36BIT_DMA_BIT)
989 BIT_ULL(MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT)
991 BIT_ULL(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT)
993 BIT_ULL(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT)
995 BIT_ULL(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT)
997 BIT_ULL(MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT)
1000 #define MTK_ETH_PATH_GMAC1_RGMII BIT_ULL(MTK_ETH_PATH_GMAC1_RGMII_BIT)
1001 #define MTK_ETH_PATH_GMAC1_TRGMII BIT_ULL(MTK_ETH_PATH_GMAC1_TRGMII_BIT)
1002 #define MTK_ETH_PATH_GMAC1_SGMII BIT_ULL(MTK_ETH_PATH_GMAC1_SGMII_BIT)
1003 #define MTK_ETH_PATH_GMAC2_RGMII BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT)
1004 #define MTK_ETH_PATH_GMAC2_SGMII BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT)
1005 #define MTK_ETH_PATH_GMAC2_GEPHY BIT_ULL(MTK_ETH_PATH_GMAC2_GEPHY_BIT)
1006 #define MTK_ETH_PATH_GDM1_ESW BIT_ULL(MTK_ETH_PATH_GDM1_ESW_BIT)