ethernet/mediatek/mtk_eth_soc.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
4  *   Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org>
5  *   Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org>
6  *   Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com>
12 #include <linux/dma-mapping.h>
57 #define NEXT_DESP_IDX(X, Y)	(((X) + 1) & ((Y) - 1))
62 #define MTK_PP_MAX_BUF_SIZE	(PAGE_SIZE - MTK_PP_PAD)
136 /* Unicast Filter MAC Address Register - Low */
140 /* Unicast Filter MAC Address Register - High */
156 /* PSE Input Queue Reservation Register*/
157 #define PSE_IQ_REV(x)		(0x140 + (((x) - 1) << 2))
160 #define PSE_OQ_TH(x)		(0x160 + (((x) - 1) << 2))
332 #define TX_DMA_PLEN0(x)		(((x) & eth->soc->tx.dma_max_len) << eth->soc->tx.dma_len_offset)
333 #define TX_DMA_PLEN1(x)		((x) & eth->soc->tx.dma_max_len)
353 #define RX_DMA_PREP_PLEN0(x)	(((x) & eth->soc->rx.dma_max_len) << eth->soc->rx.dma_len_offset)
354 #define RX_DMA_GET_PLEN0(x)	(((x) >> eth->soc->rx.dma_len_offset) & eth->soc->rx.dma_max_len)
655 /* struct mtk_hw_stats - the structure that holds the traffic statistics.
686 	/* PDMA descriptor can point at 1-2 segments. This enum allows us to
855 /* struct mtk_tx_buf -	This struct holds the pointers to the memory pointed at
875 /* struct mtk_tx_ring -	This struct holds info describing a TX ring
901 /* PDMA rx ring mode */
908 /* struct mtk_rx_ring -	This struct holds info describing a RX ring
1017 /* 0: GDM1 -> GMAC1, 1: GDM1 -> ESW */
1020 /* 0: GMAC2 -> GEPHY, 1: GMAC0 -> GePHY */
1024 /* 0: U3 -> QPHY, 1: GMAC2 -> QPHY */
1028 /* 2: GMAC1 -> SGMII, 3: GMAC2 -> SGMII */
1033 /* 0: GMACx -> GEPHY, 1: GMACx -> SGMII where x is 1 or 2 */
1087 		u32	rx_ptr;		/* rx base pointer */
1088 		u32	rx_cnt_cfg;	/* rx max count configuration */
1089 		u32	pcrx_ptr;	/* rx cpu pointer */
1101 		u32	rx_ptr;		/* rx base pointer */
1102 		u32	rx_cnt_cfg;	/* rx max count configuration */
1103 		u32	qcrx_ptr;	/* rx cpu pointer */
1128 /* struct mtk_eth_data -	This is the structure holding all differences
1144  * @desc_size			Tx/Rx DMA descriptor size.
1145  * @irq_done_mask		Rx irq done register mask.
1146  * @dma_l4_valid		Rx DMA valid register mask.
1147  * @dma_max_len			Max DMA tx/rx buffer length.
1148  * @dma_len_offset		Tx/Rx DMA length field offset.
1178 	} rx;  member
1186 /* struct mtk_eth -	This is the main datasructure for holding the state
1205  * @sgmii_pcs:		Pointers to mtk-pcs-lynxi phylink_pcs instances
1210  * @rx_ring:		Pointer to the memory holding info about the RX ring
1211  * @rx_ring_qdma:	Pointer to the memory holding info about the QDMA RX ring
1213  * @rx_napi:		The RX NAPI struct
1214  * @rx_events:		Net DIM RX event counter
1215  * @rx_packets:		Net DIM RX packet counter
1216  * @rx_bytes:		Net DIM RX byte counter
1217  * @rx_dim:		Net DIM RX context
1298 /* struct mtk_mac -	the structure that holds the info about the MACs of the
1327 	return eth->soc->version == 1;  in mtk_is_netsys_v1()
1332 	return eth->soc->version > 1;  in mtk_is_netsys_v2_or_greater()
1337 	return eth->soc->version > 2;  in mtk_is_netsys_v3_or_greater()
1343 	const struct mtk_soc_data *soc = ppe->eth->soc;  in mtk_foe_get_entry()
1345 	return ppe->foe_table + hash * soc->foe_entry_size;  in mtk_foe_get_entry()