Lines Matching +full:- +full:pdma
1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org>
5 * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org>
6 * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com>
12 #include <linux/dma-mapping.h>
57 #define NEXT_DESP_IDX(X, Y) (((X) + 1) & ((Y) - 1))
62 #define MTK_PP_MAX_BUF_SIZE (PAGE_SIZE - MTK_PP_PAD)
100 /* PDMA HW LRO Alter Flow Timer Register */
136 /* Unicast Filter MAC Address Register - Low */
140 /* Unicast Filter MAC Address Register - High */
157 #define PSE_IQ_REV(x) (0x140 + (((x) - 1) << 2))
160 #define PSE_OQ_TH(x) (0x160 + (((x) - 1) << 2))
170 /* PDMA HW LRO Control Registers */
191 /* PDMA Global Configuration Register */
195 /* PDMA Reset Index Register */
199 /* PDMA Delay Interrupt Register */
213 /* PDMA HW LRO Alter Flow Delta Register */
216 /* PDMA HW LRO IP Setting Registers */
221 /* PDMA HW LRO Ring Control Registers */
332 #define TX_DMA_PLEN0(x) (((x) & eth->soc->tx.dma_max_len) << eth->soc->tx.dma_len_offset)
333 #define TX_DMA_PLEN1(x) ((x) & eth->soc->tx.dma_max_len)
345 /* PDMA on MT7628 */
353 #define RX_DMA_PREP_PLEN0(x) (((x) & eth->soc->rx.dma_max_len) << eth->soc->rx.dma_len_offset)
354 #define RX_DMA_GET_PLEN0(x) (((x) >> eth->soc->rx.dma_len_offset) & eth->soc->rx.dma_max_len)
378 #define RX_DMA_L4_VALID_PDMA BIT(30) /* when PDMA is used */
381 /* PDMA descriptor rxd5 */
389 /* PDMA V2 descriptor rxd3 */
655 /* struct mtk_hw_stats - the structure that holds the traffic statistics.
686 /* PDMA descriptor can point at 1-2 segments. This enum allows us to
855 /* struct mtk_tx_buf - This struct holds the pointers to the memory pointed at
875 /* struct mtk_tx_ring - This struct holds info describing a TX ring
896 struct mtk_tx_dma *dma_pdma; /* For MT7628/88 PDMA handling */
901 /* PDMA rx ring mode */
908 /* struct mtk_rx_ring - This struct holds info describing a RX ring
1017 /* 0: GDM1 -> GMAC1, 1: GDM1 -> ESW */
1020 /* 0: GMAC2 -> GEPHY, 1: GMAC0 -> GePHY */
1024 /* 0: U3 -> QPHY, 1: GMAC2 -> QPHY */
1028 /* 2: GMAC1 -> SGMII, 3: GMAC2 -> SGMII */
1033 /* 0: GMACx -> GEPHY, 1: GMACx -> SGMII where x is 1 or 2 */
1097 } pdma; member
1128 /* struct mtk_eth_data - This is the structure holding all differences
1186 /* struct mtk_eth - This is the main datasructure for holding the state
1205 * @sgmii_pcs: Pointers to mtk-pcs-lynxi phylink_pcs instances
1298 /* struct mtk_mac - the structure that holds the info about the MACs of the
1327 return eth->soc->version == 1; in mtk_is_netsys_v1()
1332 return eth->soc->version > 1; in mtk_is_netsys_v2_or_greater()
1337 return eth->soc->version > 2; in mtk_is_netsys_v3_or_greater()
1343 const struct mtk_soc_data *soc = ppe->eth->soc; in mtk_foe_get_entry()
1345 return ppe->foe_table + hash * soc->foe_entry_size; in mtk_foe_get_entry()