Lines Matching refs:rvu_write64
36 rvu_write64(rvu, block->addr, NPA_AF_AQ_DOOR, 1); in npa_aq_enqueue_wait()
404 rvu_write64(rvu, blkaddr, NPA_AF_LFX_AURAS_CFG(npalf), cfg); in rvu_mbox_handler_npa_lf_alloc()
407 rvu_write64(rvu, blkaddr, NPA_AF_LFX_LOC_AURAS_BASE(npalf), in rvu_mbox_handler_npa_lf_alloc()
411 rvu_write64(rvu, blkaddr, NPA_AF_LFX_QINTS_CFG(npalf), in rvu_mbox_handler_npa_lf_alloc()
413 rvu_write64(rvu, blkaddr, NPA_AF_LFX_QINTS_BASE(npalf), in rvu_mbox_handler_npa_lf_alloc()
476 rvu_write64(rvu, block->addr, NPA_AF_GEN_CFG, cfg); in npa_aq_init()
479 rvu_write64(rvu, block->addr, NPA_AF_GEN_CFG, cfg); in npa_aq_init()
489 rvu_write64(rvu, block->addr, NPA_AF_NDC_CFG, cfg); in npa_aq_init()
496 rvu_write64(rvu, block->addr, NPA_AF_BATCH_CTL, cfg); in npa_aq_init()
508 rvu_write64(rvu, block->addr, NPA_AF_AQ_CFG, AQ_SIZE); in npa_aq_init()
509 rvu_write64(rvu, block->addr, in npa_aq_init()
572 rvu_write64(rvu, blkaddr, NDC_AF_CAMS_RD_INTERVAL, reg & GENMASK_ULL(62, 0)); in rvu_ndc_fix_locked_cacheline()
593 rvu_write64(rvu, blkaddr, in rvu_ndc_fix_locked_cacheline()