Lines Matching +full:0 +full:a
13 #define MCSX_IP_MODE 0x900c8ull
14 #define MCSX_MCS_TOP_SLAVE_PORT_RESET(a) ({ \ argument
17 offset = 0x408ull; \
19 offset = 0xa28ull; \
20 offset += (a) * 0x8ull; \
24 #define MCSX_MCS_TOP_SLAVE_CHANNEL_CFG(a) ({ \ argument
27 offset = 0x808ull; \
29 offset = 0xa68ull; \
30 offset += (a) * 0x8ull; \
36 offset = 0x80000ull; \
38 offset = 0x60000ull; \
41 #define MCSX_MIL_RX_LMACX_CFG(a) ({ \ argument
44 offset = 0x900a8ull; \
46 offset = 0x700a8ull; \
47 offset += (a) * 0x800ull; \
53 offset = 0xc0000ull; \
55 offset = 0xa0000ull; \
58 #define MCSX_LINK_LMACX_CFG(a) ({ \ argument
61 offset = 0x90000ull; \
63 offset = 0x70000ull; \
64 offset += (a) * 0x800ull; \
70 offset = 0x800c8ull; \
72 offset = 0x600c8ull; \
78 offset = 0x800d0ull; \
80 offset = 0x600d0ull; \
84 #define MCSX_PAB_RX_SLAVE_PORT_CFGX(a) ({ \ argument
87 offset = 0x1718ull; \
89 offset = 0x280ull; \
90 offset += (a) * 0x40ull; \
93 #define MCSX_PAB_TX_SLAVE_PORT_CFGX(a) (0x2930ull + (a) * 0x40ull) argument
96 #define MCSX_PEX_RX_SLAVE_VLAN_CFGX(a) (0x3b58ull + (a) * 0x8ull) argument
97 #define MCSX_PEX_TX_SLAVE_VLAN_CFGX(a) (0x46f8ull + (a) * 0x8ull) argument
98 #define MCSX_PEX_TX_SLAVE_CUSTOM_TAG_REL_MODE_SEL(a) (0x788ull + (a) * 0x8ull) argument
99 #define MCSX_PEX_TX_SLAVE_PORT_CONFIG(a) (0x4738ull + (a) * 0x8ull) argument
100 #define MCSX_PEX_RX_SLAVE_PORT_CFGX(a) (0x3b98ull + (a) * 0x8ull) argument
101 #define MCSX_PEX_RX_SLAVE_RULE_ETYPE_CFGX(a) ({ \ argument
104 offset = 0x3fc0ull; \
106 offset = 0x558ull; \
107 offset += (a) * 0x8ull; \
110 #define MCSX_PEX_RX_SLAVE_RULE_DAX(a) ({ \ argument
113 offset = 0x4000ull; \
115 offset = 0x598ull; \
116 offset += (a) * 0x8ull; \
119 #define MCSX_PEX_RX_SLAVE_RULE_DA_RANGE_MINX(a) ({ \ argument
122 offset = 0x4040ull; \
124 offset = 0x5d8ull; \
125 offset += (a) * 0x8ull; \
128 #define MCSX_PEX_RX_SLAVE_RULE_DA_RANGE_MAXX(a) ({ \ argument
131 offset = 0x4048ull; \
133 offset = 0x5e0ull; \
134 offset += (a) * 0x8ull; \
137 #define MCSX_PEX_RX_SLAVE_RULE_COMBO_MINX(a) ({ \ argument
140 offset = 0x4080ull; \
142 offset = 0x648ull; \
143 offset += (a) * 0x8ull; \
146 #define MCSX_PEX_RX_SLAVE_RULE_COMBO_MAXX(a) ({ \ argument
149 offset = 0x4088ull; \
151 offset = 0x650ull; \
152 offset += (a) * 0x8ull; \
155 #define MCSX_PEX_RX_SLAVE_RULE_COMBO_ETX(a) ({ \ argument
158 offset = 0x4090ull; \
160 offset = 0x658ull; \
161 offset += (a) * 0x8ull; \
167 offset = 0x40e0ull; \
169 offset = 0x6d8ull; \
175 offset = 0x40e8ull; \
177 offset = 0x6e0ull; \
180 #define MCSX_PEX_TX_SLAVE_RULE_ETYPE_CFGX(a) ({ \ argument
183 offset = 0x4b60ull; \
185 offset = 0x7d8ull; \
186 offset += (a) * 0x8ull; \
189 #define MCSX_PEX_TX_SLAVE_RULE_DAX(a) ({ \ argument
192 offset = 0x4ba0ull; \
194 offset = 0x818ull; \
195 offset += (a) * 0x8ull; \
198 #define MCSX_PEX_TX_SLAVE_RULE_DA_RANGE_MINX(a) ({ \ argument
201 offset = 0x4be0ull; \
203 offset = 0x858ull; \
204 offset += (a) * 0x8ull; \
207 #define MCSX_PEX_TX_SLAVE_RULE_DA_RANGE_MAXX(a) ({ \ argument
210 offset = 0x4be8ull; \
212 offset = 0x860ull; \
213 offset += (a) * 0x8ull; \
216 #define MCSX_PEX_TX_SLAVE_RULE_COMBO_MINX(a) ({ \ argument
219 offset = 0x4c20ull; \
221 offset = 0x8c8ull; \
222 offset += (a) * 0x8ull; \
225 #define MCSX_PEX_TX_SLAVE_RULE_COMBO_MAXX(a) ({ \ argument
228 offset = 0x4c28ull; \
230 offset = 0x8d0ull; \
231 offset += (a) * 0x8ull; \
234 #define MCSX_PEX_TX_SLAVE_RULE_COMBO_ETX(a) ({ \ argument
237 offset = 0x4c30ull; \
239 offset = 0x8d8ull; \
240 offset += (a) * 0x8ull; \
246 offset = 0x4c80ull; \
248 offset = 0x958ull; \
254 offset = 0x4c88ull; \
256 offset = 0x960ull; \
262 offset = 0x3b50ull; \
264 offset = 0x4c0ull; \
268 #define MCSX_PEX_RX_SLAVE_CUSTOM_TAGX(a) (0x4c8ull + (a) * 0x8ull) argument
269 #define MCSX_PEX_TX_SLAVE_CUSTOM_TAGX(a) (0x748ull + (a) * 0x8ull) argument
270 #define MCSX_PEX_RX_SLAVE_ETYPE_ENABLE 0x6e8ull
271 #define MCSX_PEX_TX_SLAVE_ETYPE_ENABLE 0x968ull
274 #define MCSX_BBE_RX_SLAVE_PADDING_CTL 0xe08ull
275 #define MCSX_BBE_TX_SLAVE_PADDING_CTL 0x12f8ull
276 #define MCSX_BBE_RX_SLAVE_CAL_ENTRY 0x180ull
277 #define MCSX_BBE_RX_SLAVE_CAL_LEN 0x188ull
278 #define MCSX_PAB_RX_SLAVE_FIFO_SKID_CFGX(a) (0x290ull + (a) * 0x40ull) argument
279 #define MCSX_BBE_RX_SLAVE_DFIFO_OVERFLOW_0 0xe20
280 #define MCSX_BBE_TX_SLAVE_DFIFO_OVERFLOW_0 0x1298
281 #define MCSX_BBE_RX_SLAVE_PLFIFO_OVERFLOW_0 0xe40
282 #define MCSX_BBE_TX_SLAVE_PLFIFO_OVERFLOW_0 0x12b8
286 offset = 0xe00ull; \
288 offset = 0x160ull; \
294 offset = 0xe08ull; \
296 offset = 0x168ull; \
302 offset = 0xe08ull; \
304 offset = 0x178ull; \
310 offset = 0x1278ull; \
312 offset = 0x1e0ull; \
318 offset = 0x1278ull; \
320 offset = 0x1f8ull; \
326 offset = 0x1280ull; \
328 offset = 0x1e8ull; \
334 offset = 0x16f0ull; \
336 offset = 0x260ull; \
342 offset = 0x16f8ull; \
344 offset = 0x268ull; \
350 offset = 0x16f8ull; \
352 offset = 0x278ull; \
358 offset = 0x2908ull; \
360 offset = 0x380ull; \
366 offset = 0x2910ull; \
368 offset = 0x388ull; \
374 offset = 0x16f8ull; \
376 offset = 0x398ull; \
380 #define MCSX_CPM_RX_SLAVE_FLOWID_TCAM_DATAX(a, b) ({ \ argument
383 offset = 0x30740ull; \
385 offset = 0x3bf8ull; \
386 offset += (a) * 0x8ull + (b) * 0x20ull; \
389 #define MCSX_CPM_RX_SLAVE_FLOWID_TCAM_MASKX(a, b) ({ \ argument
392 offset = 0x34740ull; \
394 offset = 0x43f8ull; \
395 offset += (a) * 0x8ull + (b) * 0x20ull; \
401 offset = 0x30700ull; \
403 offset = 0x3bd8ull; \
406 #define MCSX_CPM_RX_SLAVE_SC_CAMX(a, b) ({ \ argument
409 offset = 0x38780ull; \
411 offset = 0x4c08ull; \
412 offset += (a) * 0x8ull + (b) * 0x10ull; \
415 #define MCSX_CPM_RX_SLAVE_SC_CAM_ENA(a) ({ \ argument
418 offset = 0x38740ull + (a) * 0x8ull; \
420 offset = 0x4bf8ull; \
423 #define MCSX_CPM_RX_SLAVE_SECY_MAP_MEMX(a) ({ \ argument
426 offset = 0x23ee0ull; \
428 offset = 0xbd0ull; \
429 offset += (a) * 0x8ull; \
432 #define MCSX_CPM_RX_SLAVE_SECY_PLCY_MEM_0X(a) ({ \ argument
435 offset = (0x246e0ull + (a) * 0x10ull); \
437 offset = (0xdd0ull + (a) * 0x8ull); \
440 #define MCSX_CPM_RX_SLAVE_SA_KEY_LOCKOUTX(a) ({ \ argument
443 offset = 0x23E90ull; \
445 offset = 0xbb0ull; \
446 offset += (a) * 0x8ull; \
449 #define MCSX_CPM_RX_SLAVE_SA_MAP_MEMX(a) ({ \ argument
452 offset = 0x256e0ull; \
454 offset = 0xfd0ull; \
455 offset += (a) * 0x8ull; \
458 #define MCSX_CPM_RX_SLAVE_SA_PLCY_MEMX(a, b) ({ \ argument
461 offset = 0x27700ull; \
463 offset = 0x17d8ull; \
464 offset += (a) * 0x8ull + (b) * 0x40ull; \
467 #define MCSX_CPM_RX_SLAVE_SA_PN_TABLE_MEMX(a) ({ \ argument
470 offset = 0x2f700ull; \
472 offset = 0x37d8; \
473 offset += (a) * 0x8ull; \
479 offset = 0x23e40ull; \
481 offset = 0xb90ull; \
487 offset = 0x23e48ull; \
489 offset = 0xb98ull; \
492 #define MCSX_CPM_RX_SLAVE_PN_THRESH_REACHEDX(a) ({ \ argument
495 offset = 0x23e50ull; \
497 offset = 0xba0ull; \
498 offset += (a) * 0x8ull; \
501 #define MCSX_CPM_RX_SLAVE_FLOWID_TCAM_ENA_1 0x30708ull
502 #define MCSX_CPM_RX_SLAVE_SECY_PLCY_MEM_1X(a) (0x246e8ull + (a) * 0x10ull) argument
505 #define MCSX_CPM_TX_SLAVE_FLOWID_TCAM_DATAX(a, b) ({ \ argument
508 offset = 0x51d50ull; \
510 offset = 0xa7c0ull; \
511 offset += (a) * 0x8ull + (b) * 0x20ull; \
514 #define MCSX_CPM_TX_SLAVE_FLOWID_TCAM_MASKX(a, b) ({ \ argument
517 offset = 0x55d50ull; \
519 offset = 0xafc0ull; \
520 offset += (a) * 0x8ull + (b) * 0x20ull; \
526 offset = 0x51d10ull; \
528 offset = 0xa7a0ull; \
531 #define MCSX_CPM_TX_SLAVE_SECY_MAP_MEM_0X(a) ({ \ argument
534 offset = 0x3e508ull + (a) * 0x8ull; \
536 offset = 0x5550ull + (a) * 0x10ull; \
539 #define MCSX_CPM_TX_SLAVE_SECY_PLCY_MEMX(a) ({ \ argument
542 offset = 0x3ed08ull; \
544 offset = 0x5950ull; \
545 offset += (a) * 0x8ull; \
548 #define MCSX_CPM_TX_SLAVE_SA_KEY_LOCKOUTX(a) ({ \ argument
551 offset = 0x3e4c0ull; \
553 offset = 0x5538ull; \
554 offset += (a) * 0x8ull; \
557 #define MCSX_CPM_TX_SLAVE_SA_MAP_MEM_0X(a) ({ \ argument
560 offset = 0x3fd10ull + (a) * 0x10ull; \
562 offset = 0x6150ull + (a) * 0x8ull; \
565 #define MCSX_CPM_TX_SLAVE_SA_PLCY_MEMX(a, b) ({ \ argument
568 offset = 0x40d10ull; \
570 offset = 0x63a0ull; \
571 offset += (a) * 0x8ull + (b) * 0x80ull; \
574 #define MCSX_CPM_TX_SLAVE_SA_PN_TABLE_MEMX(a) ({ \ argument
577 offset = 0x50d10ull; \
579 offset = 0xa3a0ull; \
580 offset += (a) * 0x8ull; \
586 offset = 0x3e4b0ull; \
588 offset = 0x5528ull; \
594 offset = 0x3e4b8ull; \
596 offset = 0x5530ull; \
599 #define MCSX_CPM_TX_SLAVE_SA_MAP_MEM_1X(a) (0x3fd18ull + (a) * 0x10ull) argument
600 #define MCSX_CPM_TX_SLAVE_SECY_MAP_MEM_1X(a) (0x5558ull + (a) * 0x10ull) argument
601 #define MCSX_CPM_TX_SLAVE_FLOWID_TCAM_ENA_1 0x51d18ull
602 #define MCSX_CPM_TX_SLAVE_TX_SA_ACTIVEX(a) (0x5b50 + (a) * 0x8ull) argument
603 #define MCSX_CPM_TX_SLAVE_SA_INDEX0_VLDX(a) (0x5d50 + (a) * 0x8ull) argument
604 #define MCSX_CPM_TX_SLAVE_SA_INDEX1_VLDX(a) (0x5f50 + (a) * 0x8ull) argument
605 #define MCSX_CPM_TX_SLAVE_AUTO_REKEY_ENABLE_0 0x5500ull
608 #define MCSX_CSE_RX_MEM_SLAVE_IFINCTLBCPKTSX(a) ({ \ argument
611 offset = 0x9e80ull; \
613 offset = 0xc218ull; \
614 offset += (a) * 0x8ull; \
617 #define MCSX_CSE_RX_MEM_SLAVE_IFINCTLMCPKTSX(a) ({ \ argument
620 offset = 0x9680ull; \
622 offset = 0xc018ull; \
623 offset += (a) * 0x8ull; \
626 #define MCSX_CSE_RX_MEM_SLAVE_IFINCTLOCTETSX(a) ({ \ argument
629 offset = 0x6e80ull; \
631 offset = 0xbc18ull; \
632 offset += (a) * 0x8ull; \
635 #define MCSX_CSE_RX_MEM_SLAVE_IFINCTLUCPKTSX(a) ({ \ argument
638 offset = 0x8e80ull; \
640 offset = 0xbe18ull; \
641 offset += (a) * 0x8ull; \
644 #define MCSX_CSE_RX_MEM_SLAVE_IFINUNCTLBCPKTSX(a) ({ \ argument
647 offset = 0x8680ull; \
649 offset = 0xca18ull; \
650 offset += (a) * 0x8ull; \
653 #define MCSX_CSE_RX_MEM_SLAVE_IFINUNCTLMCPKTSX(a) ({ \ argument
656 offset = 0x7e80ull; \
658 offset = 0xc818ull; \
659 offset += (a) * 0x8ull; \
662 #define MCSX_CSE_RX_MEM_SLAVE_IFINUNCTLOCTETSX(a) ({ \ argument
665 offset = 0x6680ull; \
667 offset = 0xc418ull; \
668 offset += (a) * 0x8ull; \
671 #define MCSX_CSE_RX_MEM_SLAVE_IFINUNCTLUCPKTSX(a) ({ \ argument
674 offset = 0x7680ull; \
676 offset = 0xc618ull; \
677 offset += (a) * 0x8ull; \
680 #define MCSX_CSE_RX_MEM_SLAVE_INOCTETSSECYDECRYPTEDX(a) ({ \ argument
683 offset = 0x5e80ull; \
685 offset = 0xdc18ull; \
686 offset += (a) * 0x8ull; \
689 #define MCSX_CSE_RX_MEM_SLAVE_INOCTETSSECYVALIDATEX(a)({ \ argument
692 offset = 0x5680ull; \
694 offset = 0xda18ull; \
695 offset += (a) * 0x8ull; \
698 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSCTRLPORTDISABLEDX(a) ({ \ argument
701 offset = 0xd680ull; \
703 offset = 0xce18ull; \
704 offset += (a) * 0x8ull; \
707 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSFLOWIDTCAMHITX(a) ({ \ argument
710 offset = 0x16a80ull; \
712 offset = 0xec78ull; \
713 offset += (a) * 0x8ull; \
716 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSFLOWIDTCAMMISSX(a) ({ \ argument
719 offset = 0x16680ull; \
721 offset = 0xec38ull; \
722 offset += (a) * 0x8ull; \
725 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSPARSEERRX(a) ({ \ argument
728 offset = 0x16880ull; \
730 offset = 0xec18ull; \
731 offset += (a) * 0x8ull; \
734 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCCAMHITX(a) ({ \ argument
737 offset = 0xfe80ull; \
739 offset = 0xde18ull; \
740 offset += (a) * 0x8ull; \
743 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCINVALIDX(a) ({ \ argument
746 offset = 0x10680ull; \
748 offset = 0xe418ull; \
749 offset += (a) * 0x8ull; \
752 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCNOTVALIDX(a) ({ \ argument
755 offset = 0x10e80ull; \
757 offset = 0xe218ull; \
758 offset += (a) * 0x8ull; \
761 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYBADTAGX(a) ({ \ argument
764 offset = 0xae80ull; \
766 offset = 0xd418ull; \
767 offset += (a) * 0x8ull; \
770 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYNOSAX(a) ({ \ argument
773 offset = 0xc680ull; \
775 offset = 0xd618ull; \
776 offset += (a) * 0x8ull; \
779 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYNOSAERRORX(a) ({ \ argument
782 offset = 0xce80ull; \
784 offset = 0xd818ull; \
785 offset += (a) * 0x8ull; \
788 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYTAGGEDCTLX(a) ({ \ argument
791 offset = 0xbe80ull; \
793 offset = 0xcc18ull; \
794 offset += (a) * 0x8ull; \
800 offset = 0x52a0ull; \
802 offset = 0x9c0ull; \
808 offset = 0x52b8ull; \
810 offset = 0x9d8ull; \
813 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDX(a) ({ \ argument
816 offset = 0xee80ull; \
818 offset = 0xe818ull; \
819 offset += (a) * 0x8ull; \
822 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDX(a) ({ \ argument
825 offset = 0xa680ull; \
827 offset = 0xd018ull; \
828 offset += (a) * 0x8ull; \
831 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCLATEORDELAYEDX(a) ({ \ argument
834 offset = 0xf680ull; \
836 offset = 0xe018ull; \
837 offset += (a) * 0x8ull; \
840 #define MCSX_CSE_RX_MEM_SLAVE_INOCTETSSCDECRYPTEDX(a) (0xe680ull + (a) * 0x8ull) argument
841 #define MCSX_CSE_RX_MEM_SLAVE_INOCTETSSCVALIDATEX(a) (0xde80ull + (a) * 0x8ull) argument
842 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYNOTAGX(a) (0xd218 + (a) * 0x8ull) argument
843 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYCTLX(a) (0xb680ull + (a) * 0x8ull) argument
844 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSAINVALIDX(a) (0x12680ull + (a) * 0x8ull) argument
845 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSANOTUSINGSAERRORX(a) (0x15680ull + (a) * 0x8ull) argument
846 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSANOTVALIDX(a) (0x13680ull + (a) * 0x8ull) argument
847 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSAOKX(a) (0x11680ull + (a) * 0x8ull) argument
848 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSAUNUSEDSAX(a) (0x14680ull + (a) * 0x8ull) argument
849 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSEARLYPREEMPTERRX(a) (0xec58ull + (a) * 0x8ull) argument
850 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCOKX(a) (0xea18ull + (a) * 0x8ull) argument
851 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCDELAYEDX(a) (0xe618ull + (a) * 0x8ull) argument
854 #define MCSX_CSE_TX_MEM_SLAVE_IFOUTCOMMONOCTETSX(a) (0x18440ull + (a) * 0x8ull) argument
855 #define MCSX_CSE_TX_MEM_SLAVE_IFOUTCTLBCPKTSX(a) ({ \ argument
858 offset = 0x1c440ull; \
860 offset = 0xf478ull; \
861 offset += (a) * 0x8ull; \
864 #define MCSX_CSE_TX_MEM_SLAVE_IFOUTCTLMCPKTSX(a) ({ \ argument
867 offset = 0x1bc40ull; \
869 offset = 0xf278ull; \
870 offset += (a) * 0x8ull; \
873 #define MCSX_CSE_TX_MEM_SLAVE_IFOUTCTLOCTETSX(a) ({ \ argument
876 offset = 0x19440ull; \
878 offset = 0xee78ull; \
879 offset += (a) * 0x8ull; \
882 #define MCSX_CSE_TX_MEM_SLAVE_IFOUTCTLUCPKTSX(a) ({ \ argument
885 offset = 0x1b440ull; \
887 offset = 0xf078ull; \
888 offset += (a) * 0x8ull; \
891 #define MCSX_CSE_TX_MEM_SLAVE_IFOUTUNCTLBCPKTSX(a) ({ \ argument
894 offset = 0x1ac40ull; \
896 offset = 0xfc78ull; \
897 offset += (a) * 0x8ull; \
900 #define MCSX_CSE_TX_MEM_SLAVE_IFOUTUNCTLMCPKTSX(a) ({ \ argument
903 offset = 0x1a440ull; \
905 offset = 0xfa78ull; \
906 offset += (a) * 0x8ull; \
909 #define MCSX_CSE_TX_MEM_SLAVE_IFOUTUNCTLOCTETSX(a) ({ \ argument
912 offset = 0x18c40ull; \
914 offset = 0xf678ull; \
915 offset += (a) * 0x8ull; \
918 #define MCSX_CSE_TX_MEM_SLAVE_IFOUTUNCTLUCPKTSX(a) ({ \ argument
921 offset = 0x19c40ull; \
923 offset = 0xf878ull; \
924 offset += (a) * 0x8ull; \
927 #define MCSX_CSE_TX_MEM_SLAVE_OUTOCTETSSECYENCRYPTEDX(a) ({ \ argument
930 offset = 0x17c40ull; \
932 offset = 0x10878ull; \
933 offset += (a) * 0x8ull; \
936 #define MCSX_CSE_TX_MEM_SLAVE_OUTOCTETSSECYPROTECTEDX(a) ({ \ argument
939 offset = 0x17440ull; \
941 offset = 0x10678ull; \
942 offset += (a) * 0x8ull; \
945 #define MCSX_CSE_TX_MEM_SLAVE_OUTPKTSCTRLPORTDISABLEDX(a) ({ \ argument
948 offset = 0x1e440ull; \
950 offset = 0xfe78ull; \
951 offset += (a) * 0x8ull; \
954 #define MCSX_CSE_TX_MEM_SLAVE_OUTPKTSFLOWIDTCAMHITX(a) ({ \ argument
957 offset = 0x23240ull; \
959 offset = 0x10ed8ull; \
960 offset += (a) * 0x8ull; \
963 #define MCSX_CSE_TX_MEM_SLAVE_OUTPKTSFLOWIDTCAMMISSX(a) ({ \ argument
966 offset = 0x22c40ull; \
968 offset = 0x10e98ull; \
969 offset += (a) * 0x8ull; \
972 #define MCSX_CSE_TX_MEM_SLAVE_OUTPKTSPARSEERRX(a) ({ \ argument
975 offset = 0x22e40ull; \
977 offset = 0x10e78ull; \
978 offset += (a) * 0x8ull; \
981 #define MCSX_CSE_TX_MEM_SLAVE_OUTPKTSSCENCRYPTEDX(a) ({ \ argument
984 offset = 0x20440ull; \
986 offset = 0x10c78ull; \
987 offset += (a) * 0x8ull; \
990 #define MCSX_CSE_TX_MEM_SLAVE_OUTPKTSSCPROTECTEDX(a) ({ \ argument
993 offset = 0x1fc40ull; \
995 offset = 0x10a78ull; \
996 offset += (a) * 0x8ull; \
999 #define MCSX_CSE_TX_MEM_SLAVE_OUTPKTSSECTAGINSERTIONERRX(a) ({ \ argument
1002 offset = 0x23040ull; \
1004 offset = 0x110d8ull; \
1005 offset += (a) * 0x8ull; \
1008 #define MCSX_CSE_TX_MEM_SLAVE_OUTPKTSSECYNOACTIVESAX(a) ({ \ argument
1011 offset = 0x1dc40ull; \
1013 offset = 0x10278ull; \
1014 offset += (a) * 0x8ull; \
1017 #define MCSX_CSE_TX_MEM_SLAVE_OUTPKTSSECYTOOLONGX(a) ({ \ argument
1020 offset = 0x1d440ull; \
1022 offset = 0x10478ull; \
1023 offset += (a) * 0x8ull; \
1026 #define MCSX_CSE_TX_MEM_SLAVE_OUTPKTSSECYUNTAGGEDX(a) ({ \ argument
1029 offset = 0x1cc40ull; \
1031 offset = 0x10078ull; \
1032 offset += (a) * 0x8ull; \
1038 offset = 0x54a0ull; \
1040 offset = 0xa00ull; \
1046 offset = 0x54b8ull; \
1048 offset = 0xa18ull; \
1051 #define MCSX_CSE_TX_MEM_SLAVE_OUTOCTETSSCENCRYPTEDX(a) (0x1f440ull + (a) * 0x8ull) argument
1052 #define MCSX_CSE_TX_MEM_SLAVE_OUTOCTETSSCPROTECTEDX(a) (0x1ec40ull + (a) * 0x8ull) argument
1053 #define MCSX_CSE_TX_MEM_SLAVE_OUTPKTSEARLYPREEMPTERRX(a) (0x10eb8ull + (a) * 0x8ull) argument
1054 #define MCSX_CSE_TX_MEM_SLAVE_OUTPKTSSAENCRYPTEDX(a) (0x21c40ull + (a) * 0x8ull) argument
1055 #define MCSX_CSE_TX_MEM_SLAVE_OUTPKTSSAPROTECTEDX(a) (0x20c40ull + (a) * 0x8ull) argument
1060 offset = 0x80028ull; \
1062 offset = 0x60028ull; \
1068 offset = 0x80040ull; \
1070 offset = 0x60040ull; \
1076 offset = 0x80038ull; \
1078 offset = 0x60038ull; \
1084 offset = 0xc20ull; \
1086 offset = 0xab8ull; \
1092 offset = 0xc28ull; \
1094 offset = 0xac0ull; \
1100 offset = 0x23c00ull; \
1102 offset = 0x0ad8ull; \
1108 offset = 0x23c08ull; \
1110 offset = 0xae0ull; \
1116 offset = 0x3d490ull; \
1118 offset = 0x54a0ull; \
1124 offset = 0x3d498ull; \
1126 offset = 0x54a8ull; \