Lines Matching refs:cgx_write

115 void cgx_write(struct cgx *cgx, u64 lmac, u64 offset, u64 val)  in cgx_write()  function
178 cgx_write(cgx_dev, lmac_id, offset, val); in cgx_lmac_write()
252 cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)), in cgx_lmac_addr_set()
258 cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg); in cgx_lmac_addr_set()
316 cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)), cfg); in cgx_lmac_addr_add()
329 cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg); in cgx_lmac_addr_add()
354 cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)), 0); in cgx_lmac_addr_reset()
360 cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg); in cgx_lmac_addr_reset()
398 cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)), cfg); in cgx_lmac_addr_update()
440 cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg); in cgx_lmac_addr_del()
443 cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)), 0); in cgx_lmac_addr_del()
485 cgx_write(cgx, lmac_id, cgx->mac_ops->rxid_map_offset, (pkind & 0x3F)); in cgx_set_pkind()
542 cgx_write(cgx, lmac_id, CGXX_GMP_PCS_MRX_CTL, cfg); in cgx_lmac_internal_loopback()
549 cgx_write(cgx, lmac_id, CGXX_SPUX_CONTROL1, cfg); in cgx_lmac_internal_loopback()
576 cgx_write(cgx, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg); in cgx_lmac_promisc_config()
583 cgx_write(cgx, 0, in cgx_lmac_promisc_config()
590 cgx_write(cgx, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg); in cgx_lmac_promisc_config()
597 cgx_write(cgx, 0, in cgx_lmac_promisc_config()
653 cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg); in cgx_lmac_enadis_rx_pause_fwding()
657 cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg); in cgx_lmac_enadis_rx_pause_fwding()
661 cgx_write(cgx, lmac_id, CGXX_SMUX_CBFC_CTL, cfg); in cgx_lmac_enadis_rx_pause_fwding()
668 cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg); in cgx_lmac_enadis_rx_pause_fwding()
672 cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg); in cgx_lmac_enadis_rx_pause_fwding()
676 cgx_write(cgx, lmac_id, CGXX_SMUX_CBFC_CTL, cfg); in cgx_lmac_enadis_rx_pause_fwding()
717 cgx_write(cgx, 0, in cgx_stats_reset()
720 cgx_write(cgx, lmac_id, in cgx_stats_reset()
725 cgx_write(cgx, lmac_id, CGXX_CMRX_TX_STAT0 + (stat_id * 8), 0); in cgx_stats_reset()
801 cgx_write(cgx, lmac_id, CGXX_CMRX_CFG, cfg); in cgx_lmac_rx_tx_enable()
821 cgx_write(cgx, lmac_id, CGXX_CMRX_CFG, cfg); in cgx_lmac_tx_enable()
840 cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg); in cgx_lmac_enadis_pause_frm()
845 cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg); in cgx_lmac_enadis_pause_frm()
850 cgx_write(cgx, lmac_id, CGXX_SMUX_TX_CTL, cfg); in cgx_lmac_enadis_pause_frm()
859 cgx_write(cgx, 0, CGXX_CMR_RX_OVR_BP, cfg); in cgx_lmac_enadis_pause_frm()
873 cgx_write(cgx, lmac_id, CGXX_SMUX_TX_PAUSE_PKT_TIME, in cgx_lmac_pause_frm_config()
877 cgx_write(cgx, lmac_id, CGXX_SMUX_TX_PAUSE_PKT_INTERVAL, in cgx_lmac_pause_frm_config()
880 cgx_write(cgx, lmac_id, CGXX_GMP_GMI_TX_PAUSE_PKT_TIME, in cgx_lmac_pause_frm_config()
886 cgx_write(cgx, lmac_id, CGXX_GMP_GMI_TX_PAUSE_PKT_INTERVAL, in cgx_lmac_pause_frm_config()
893 cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg); in cgx_lmac_pause_frm_config()
897 cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg); in cgx_lmac_pause_frm_config()
902 cgx_write(cgx, lmac_id, CGXX_SMUX_TX_CTL, cfg); in cgx_lmac_pause_frm_config()
907 cgx_write(cgx, 0, CGXX_CMR_RX_OVR_BP, cfg); in cgx_lmac_pause_frm_config()
912 cgx_write(cgx, lmac_id, CGXX_SMUX_CBFC_CTL, cfg); in cgx_lmac_pause_frm_config()
985 cgx_write(cgx, lmac_id, CGXX_SMUX_CBFC_CTL, cfg); in cgx_lmac_pfc_config()
989 cgx_write(cgx, lmac_id, CGXX_SMUX_SMAC, cfg); in cgx_lmac_pfc_config()
1023 cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg); in cgx_lmac_ptp_config()
1027 cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg); in cgx_lmac_ptp_config()
1032 cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg); in cgx_lmac_ptp_config()
1036 cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg); in cgx_lmac_ptp_config()
1067 cgx_write(cgx, lmac->lmac_id, CGX_COMMAND_REG, req); in cgx_fwi_cmd_send()
1384 cgx_write(lmac->cgx, lmac->lmac_id, CGX_EVENT_REG, 0); in cgx_fwi_event_handler()
1385 cgx_write(lmac->cgx, lmac->lmac_id, offset, clear_bit); in cgx_fwi_event_handler()
1593 cgx_write(cgxd, lmac_id, CGXX_CMRX_RX_LOGL_XON, cfg); in cgx_lmac_reset()
1623 cgx_write(cgx, lmac->lmac_id, offset, ena_bit); in cgx_configure_interrupt()