88 	priv->prs_shadow[index].valid = true;  in mvpp2_prs_shadow_set()
89 	priv->prs_shadow[index].lu = lu;  in mvpp2_prs_shadow_set()
96 	priv->prs_shadow[index].ri_mask = ri_mask;  in mvpp2_prs_shadow_ri_set()
97 	priv->prs_shadow[index].ri = ri;  in mvpp2_prs_shadow_ri_set()
373 		if (!priv->prs_shadow[tid].valid ||  in mvpp2_prs_flow_find()
374 		    priv->prs_shadow[tid].lu != MVPP2_PRS_LU_FLOWS)  in mvpp2_prs_flow_find()
398 		if (!priv->prs_shadow[tid].valid)  in mvpp2_prs_tcam_first_free()
442 	if (priv->prs_shadow[MVPP2_PE_DROP_ALL].valid) {  in mvpp2_prs_mac_drop_all_set()
491 	if (priv->prs_shadow[tid].valid) {  in mvpp2_prs_mac_promisc_set()
540 	if (priv->prs_shadow[tid].valid) {  in mvpp2_prs_dsa_tag_set()
611 	if (priv->prs_shadow[tid].valid) {  in mvpp2_prs_dsa_tag_ethertype_set()
672 		if (!priv->prs_shadow[tid].valid ||  in mvpp2_prs_vlan_find()
673 		    priv->prs_shadow[tid].lu != MVPP2_PRS_LU_VLAN)  in mvpp2_prs_vlan_find()
725 			if (!priv->prs_shadow[tid_aux].valid ||  in mvpp2_prs_vlan_add()
726 			    priv->prs_shadow[tid_aux].lu != MVPP2_PRS_LU_VLAN)  in mvpp2_prs_vlan_add()
799 		if (!priv->prs_shadow[tid].valid ||  in mvpp2_prs_double_vlan_find()
800 		    priv->prs_shadow[tid].lu != MVPP2_PRS_LU_VLAN)  in mvpp2_prs_double_vlan_find()
848 			if (!priv->prs_shadow[tid_aux].valid ||  in mvpp2_prs_double_vlan_add()
849 			    priv->prs_shadow[tid_aux].lu != MVPP2_PRS_LU_VLAN)  in mvpp2_prs_double_vlan_add()
1356 	priv->prs_shadow[pe.index].udf = MVPP2_PRS_UDF_L2_DEF;  in mvpp2_prs_etype_init()
1357 	priv->prs_shadow[pe.index].finish = false;  in mvpp2_prs_etype_init()
1386 	priv->prs_shadow[pe.index].udf = MVPP2_PRS_UDF_L2_DEF;  in mvpp2_prs_etype_init()
1387 	priv->prs_shadow[pe.index].finish = true;  in mvpp2_prs_etype_init()
1418 	priv->prs_shadow[pe.index].udf = MVPP2_PRS_UDF_L2_DEF;  in mvpp2_prs_etype_init()
1419 	priv->prs_shadow[pe.index].finish = true;  in mvpp2_prs_etype_init()
1457 		priv->prs_shadow[pe.index].udf = MVPP2_PRS_UDF_L2_DEF;  in mvpp2_prs_etype_init()
1458 		priv->prs_shadow[pe.index].finish = false;  in mvpp2_prs_etype_init()
1489 	priv->prs_shadow[pe.index].udf = MVPP2_PRS_UDF_L2_DEF;  in mvpp2_prs_etype_init()
1490 	priv->prs_shadow[pe.index].finish = false;  in mvpp2_prs_etype_init()
1515 	priv->prs_shadow[pe.index].udf = MVPP2_PRS_UDF_L2_DEF;  in mvpp2_prs_etype_init()
1516 	priv->prs_shadow[pe.index].finish = true;  in mvpp2_prs_etype_init()
1940 		if (!port->priv->prs_shadow[tid].valid ||  in mvpp2_prs_vid_range_find()
1941 		    port->priv->prs_shadow[tid].lu != MVPP2_PRS_LU_VID)  in mvpp2_prs_vid_range_find()
2039 	priv->prs_shadow[tid].valid = false;  in mvpp2_prs_vid_entry_remove()
2050 		if (priv->prs_shadow[tid].valid) {  in mvpp2_prs_vid_remove_all()
2052 			priv->prs_shadow[tid].valid = false;  in mvpp2_prs_vid_remove_all()
2066 	priv->prs_shadow[tid].valid = false;  in mvpp2_prs_vid_disable_filtering()
2077 	if (priv->prs_shadow[tid].valid)  in mvpp2_prs_vid_enable_filtering()
2139 	priv->prs_shadow = devm_kcalloc(&pdev->dev, MVPP2_PRS_TCAM_SRAM_SIZE,  in mvpp2_prs_default_init()
2140 					sizeof(*priv->prs_shadow),  in mvpp2_prs_default_init()
2142 	if (!priv->prs_shadow)  in mvpp2_prs_default_init()
2215 		if (!priv->prs_shadow[tid].valid ||  in mvpp2_prs_mac_da_range_find()
2216 		    (priv->prs_shadow[tid].lu != MVPP2_PRS_LU_MAC) ||  in mvpp2_prs_mac_da_range_find()
2217 		    (priv->prs_shadow[tid].udf != udf_type))  in mvpp2_prs_mac_da_range_find()
2279 		priv->prs_shadow[pe.index].valid = false;  in mvpp2_prs_mac_da_accept()
2313 	priv->prs_shadow[pe.index].udf = MVPP2_PRS_UDF_MAC_DEF;  in mvpp2_prs_mac_da_accept()
2352 		if (!priv->prs_shadow[tid].valid ||  in mvpp2_prs_mac_del_all()
2353 		    (priv->prs_shadow[tid].lu != MVPP2_PRS_LU_MAC) ||  in mvpp2_prs_mac_del_all()
2354 		    (priv->prs_shadow[tid].udf != MVPP2_PRS_UDF_MAC_DEF))  in mvpp2_prs_mac_del_all()