Lines Matching +full:rx +full:- +full:burst +full:- +full:length
1 // SPDX-License-Identifier: GPL-2.0-only
26 #include <linux/dma-mapping.h>
65 /* use 2 static channels for TX/RX */
108 struct ltq_etop_priv *priv = netdev_priv(ch->netdev); in ltq_etop_alloc_skb()
110 ch->skb[ch->dma.desc] = netdev_alloc_skb(ch->netdev, MAX_DMA_DATA_LEN); in ltq_etop_alloc_skb()
111 if (!ch->skb[ch->dma.desc]) in ltq_etop_alloc_skb()
112 return -ENOMEM; in ltq_etop_alloc_skb()
113 ch->dma.desc_base[ch->dma.desc].addr = in ltq_etop_alloc_skb()
114 dma_map_single(&priv->pdev->dev, ch->skb[ch->dma.desc]->data, in ltq_etop_alloc_skb()
116 ch->dma.desc_base[ch->dma.desc].addr = in ltq_etop_alloc_skb()
117 CPHYSADDR(ch->skb[ch->dma.desc]->data); in ltq_etop_alloc_skb()
118 ch->dma.desc_base[ch->dma.desc].ctl = in ltq_etop_alloc_skb()
121 skb_reserve(ch->skb[ch->dma.desc], NET_IP_ALIGN); in ltq_etop_alloc_skb()
128 struct ltq_etop_priv *priv = netdev_priv(ch->netdev); in ltq_etop_hw_receive()
129 struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; in ltq_etop_hw_receive()
130 struct sk_buff *skb = ch->skb[ch->dma.desc]; in ltq_etop_hw_receive()
131 int len = (desc->ctl & LTQ_DMA_SIZE_MASK) - MAX_DMA_CRC_LEN; in ltq_etop_hw_receive()
134 spin_lock_irqsave(&priv->lock, flags); in ltq_etop_hw_receive()
136 netdev_err(ch->netdev, in ltq_etop_hw_receive()
137 "failed to allocate new rx buffer, stopping DMA\n"); in ltq_etop_hw_receive()
138 ltq_dma_close(&ch->dma); in ltq_etop_hw_receive()
140 ch->dma.desc++; in ltq_etop_hw_receive()
141 ch->dma.desc %= LTQ_DESC_NUM; in ltq_etop_hw_receive()
142 spin_unlock_irqrestore(&priv->lock, flags); in ltq_etop_hw_receive()
145 skb->protocol = eth_type_trans(skb, ch->netdev); in ltq_etop_hw_receive()
157 struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; in ltq_etop_poll_rx()
159 if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) != LTQ_DMA_C) in ltq_etop_poll_rx()
165 napi_complete_done(&ch->napi, work_done); in ltq_etop_poll_rx()
166 ltq_dma_ack_irq(&ch->dma); in ltq_etop_poll_rx()
176 struct ltq_etop_priv *priv = netdev_priv(ch->netdev); in ltq_etop_poll_tx()
178 netdev_get_tx_queue(ch->netdev, ch->idx >> 1); in ltq_etop_poll_tx()
181 spin_lock_irqsave(&priv->lock, flags); in ltq_etop_poll_tx()
182 while ((ch->dma.desc_base[ch->tx_free].ctl & in ltq_etop_poll_tx()
184 dev_kfree_skb_any(ch->skb[ch->tx_free]); in ltq_etop_poll_tx()
185 ch->skb[ch->tx_free] = NULL; in ltq_etop_poll_tx()
186 memset(&ch->dma.desc_base[ch->tx_free], 0, in ltq_etop_poll_tx()
188 ch->tx_free++; in ltq_etop_poll_tx()
189 ch->tx_free %= LTQ_DESC_NUM; in ltq_etop_poll_tx()
191 spin_unlock_irqrestore(&priv->lock, flags); in ltq_etop_poll_tx()
195 napi_complete(&ch->napi); in ltq_etop_poll_tx()
196 ltq_dma_ack_irq(&ch->dma); in ltq_etop_poll_tx()
204 int ch = irq - LTQ_DMA_CH0_INT; in ltq_etop_dma_irq()
206 napi_schedule(&priv->ch[ch].napi); in ltq_etop_dma_irq()
215 ltq_dma_free(&ch->dma); in ltq_etop_free_channel()
216 if (ch->dma.irq) in ltq_etop_free_channel()
217 free_irq(ch->dma.irq, priv); in ltq_etop_free_channel()
218 if (IS_RX(ch->idx)) { in ltq_etop_free_channel()
219 struct ltq_dma_channel *dma = &ch->dma; in ltq_etop_free_channel()
221 for (dma->desc = 0; dma->desc < LTQ_DESC_NUM; dma->desc++) in ltq_etop_free_channel()
222 dev_kfree_skb_any(ch->skb[ch->dma.desc]); in ltq_etop_free_channel()
235 ltq_etop_free_channel(dev, &priv->ch[i]); in ltq_etop_hw_exit()
247 switch (priv->pldata->mii_mode) { in ltq_etop_hw_init()
260 priv->pldata->mii_mode); in ltq_etop_hw_init()
261 return -ENOTSUPP; in ltq_etop_hw_init()
267 ltq_dma_init_port(DMA_PORT_ETOP, priv->tx_burst_len, priv->rx_burst_len); in ltq_etop_hw_init()
271 struct ltq_etop_chan *ch = &priv->ch[i]; in ltq_etop_hw_init()
273 ch->dma.nr = i; in ltq_etop_hw_init()
274 ch->idx = ch->dma.nr; in ltq_etop_hw_init()
275 ch->dma.dev = &priv->pdev->dev; in ltq_etop_hw_init()
278 ltq_dma_alloc_tx(&ch->dma); in ltq_etop_hw_init()
287 ltq_dma_alloc_rx(&ch->dma); in ltq_etop_hw_init()
288 for (ch->dma.desc = 0; ch->dma.desc < LTQ_DESC_NUM; in ltq_etop_hw_init()
289 ch->dma.desc++) in ltq_etop_hw_init()
291 return -ENOMEM; in ltq_etop_hw_init()
292 ch->dma.desc = 0; in ltq_etop_hw_init()
296 "Unable to get Rx DMA IRQ %d\n", in ltq_etop_hw_init()
301 ch->dma.irq = irq; in ltq_etop_hw_init()
309 strscpy(info->driver, "Lantiq ETOP", sizeof(info->driver)); in ltq_etop_get_drvinfo()
310 strscpy(info->bus_info, "internal", sizeof(info->bus_info)); in ltq_etop_get_drvinfo()
311 strscpy(info->version, DRV_VERSION, sizeof(info->version)); in ltq_etop_get_drvinfo()
363 phydev = phy_find_first(priv->mii_bus); in ltq_etop_mdio_probe()
367 return -ENODEV; in ltq_etop_mdio_probe()
371 <q_etop_mdio_link, priv->pldata->mii_mode); in ltq_etop_mdio_probe()
391 priv->mii_bus = mdiobus_alloc(); in ltq_etop_mdio_init()
392 if (!priv->mii_bus) { in ltq_etop_mdio_init()
394 err = -ENOMEM; in ltq_etop_mdio_init()
398 priv->mii_bus->priv = dev; in ltq_etop_mdio_init()
399 priv->mii_bus->read = ltq_etop_mdio_rd; in ltq_etop_mdio_init()
400 priv->mii_bus->write = ltq_etop_mdio_wr; in ltq_etop_mdio_init()
401 priv->mii_bus->name = "ltq_mii"; in ltq_etop_mdio_init()
402 snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", in ltq_etop_mdio_init()
403 priv->pdev->name, priv->pdev->id); in ltq_etop_mdio_init()
404 if (mdiobus_register(priv->mii_bus)) { in ltq_etop_mdio_init()
405 err = -ENXIO; in ltq_etop_mdio_init()
410 err = -ENXIO; in ltq_etop_mdio_init()
416 mdiobus_unregister(priv->mii_bus); in ltq_etop_mdio_init()
418 mdiobus_free(priv->mii_bus); in ltq_etop_mdio_init()
428 phy_disconnect(dev->phydev); in ltq_etop_mdio_cleanup()
429 mdiobus_unregister(priv->mii_bus); in ltq_etop_mdio_cleanup()
430 mdiobus_free(priv->mii_bus); in ltq_etop_mdio_cleanup()
440 struct ltq_etop_chan *ch = &priv->ch[i]; in ltq_etop_open()
444 ltq_dma_open(&ch->dma); in ltq_etop_open()
445 ltq_dma_enable_irq(&ch->dma); in ltq_etop_open()
446 napi_enable(&ch->napi); in ltq_etop_open()
448 phy_start(dev->phydev); in ltq_etop_open()
460 phy_stop(dev->phydev); in ltq_etop_stop()
462 struct ltq_etop_chan *ch = &priv->ch[i]; in ltq_etop_stop()
466 napi_disable(&ch->napi); in ltq_etop_stop()
467 ltq_dma_close(&ch->dma); in ltq_etop_stop()
478 struct ltq_etop_chan *ch = &priv->ch[(queue << 1) | 1]; in ltq_etop_tx()
479 struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; in ltq_etop_tx()
486 len = skb->len; in ltq_etop_tx()
488 if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) || ch->skb[ch->dma.desc]) { in ltq_etop_tx()
494 /* dma needs to start on a burst length value aligned address */ in ltq_etop_tx()
495 byte_offset = CPHYSADDR(skb->data) % (priv->tx_burst_len * 4); in ltq_etop_tx()
496 ch->skb[ch->dma.desc] = skb; in ltq_etop_tx()
500 spin_lock_irqsave(&priv->lock, flags); in ltq_etop_tx()
501 desc->addr = ((unsigned int)dma_map_single(&priv->pdev->dev, skb->data, len, in ltq_etop_tx()
502 DMA_TO_DEVICE)) - byte_offset; in ltq_etop_tx()
505 desc->ctl = LTQ_DMA_OWN | LTQ_DMA_SOP | LTQ_DMA_EOP | in ltq_etop_tx()
507 ch->dma.desc++; in ltq_etop_tx()
508 ch->dma.desc %= LTQ_DESC_NUM; in ltq_etop_tx()
509 spin_unlock_irqrestore(&priv->lock, flags); in ltq_etop_tx()
511 if (ch->dma.desc_base[ch->dma.desc].ctl & LTQ_DMA_OWN) in ltq_etop_tx()
523 WRITE_ONCE(dev->mtu, new_mtu); in ltq_etop_change_mtu()
525 spin_lock_irqsave(&priv->lock, flags); in ltq_etop_change_mtu()
527 spin_unlock_irqrestore(&priv->lock, flags); in ltq_etop_change_mtu()
542 spin_lock_irqsave(&priv->lock, flags); in ltq_etop_set_mac_address()
543 ltq_etop_w32(*((u32 *)dev->dev_addr), LTQ_ETOP_MAC_DA0); in ltq_etop_set_mac_address()
544 ltq_etop_w32(*((u16 *)&dev->dev_addr[4]) << 16, in ltq_etop_set_mac_address()
546 spin_unlock_irqrestore(&priv->lock, flags); in ltq_etop_set_mac_address()
558 spin_lock_irqsave(&priv->lock, flags); in ltq_etop_set_multicast_list()
559 if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI)) in ltq_etop_set_multicast_list()
563 spin_unlock_irqrestore(&priv->lock, flags); in ltq_etop_set_multicast_list()
574 dev->watchdog_timeo = 10 * HZ; in ltq_etop_init()
580 memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr)); in ltq_etop_init()
593 dev->addr_assign_type = NET_ADDR_RANDOM; in ltq_etop_init()
652 dev_err(&pdev->dev, "failed to get etop resource\n"); in ltq_etop_probe()
653 err = -ENOENT; in ltq_etop_probe()
657 res = devm_request_mem_region(&pdev->dev, res->start, in ltq_etop_probe()
658 resource_size(res), dev_name(&pdev->dev)); in ltq_etop_probe()
660 dev_err(&pdev->dev, "failed to request etop resource\n"); in ltq_etop_probe()
661 err = -EBUSY; in ltq_etop_probe()
665 ltq_etop_membase = devm_ioremap(&pdev->dev, res->start, in ltq_etop_probe()
668 dev_err(&pdev->dev, "failed to remap etop engine %d\n", in ltq_etop_probe()
669 pdev->id); in ltq_etop_probe()
670 err = -ENOMEM; in ltq_etop_probe()
676 err = -ENOMEM; in ltq_etop_probe()
679 dev->netdev_ops = <q_eth_netdev_ops; in ltq_etop_probe()
680 dev->ethtool_ops = <q_etop_ethtool_ops; in ltq_etop_probe()
682 priv->res = res; in ltq_etop_probe()
683 priv->pdev = pdev; in ltq_etop_probe()
684 priv->pldata = dev_get_platdata(&pdev->dev); in ltq_etop_probe()
685 priv->netdev = dev; in ltq_etop_probe()
686 spin_lock_init(&priv->lock); in ltq_etop_probe()
687 SET_NETDEV_DEV(dev, &pdev->dev); in ltq_etop_probe()
689 err = device_property_read_u32(&pdev->dev, "lantiq,tx-burst-length", &priv->tx_burst_len); in ltq_etop_probe()
691 dev_err(&pdev->dev, "unable to read tx-burst-length property\n"); in ltq_etop_probe()
695 err = device_property_read_u32(&pdev->dev, "lantiq,rx-burst-length", &priv->rx_burst_len); in ltq_etop_probe()
697 dev_err(&pdev->dev, "unable to read rx-burst-length property\n"); in ltq_etop_probe()
703 netif_napi_add_weight(dev, &priv->ch[i].napi, in ltq_etop_probe()
706 netif_napi_add_weight(dev, &priv->ch[i].napi, in ltq_etop_probe()
708 priv->ch[i].netdev = dev; in ltq_etop_probe()