1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
31 	struct ixgbe_mac_info *mac = &hw->mac;  in ixgbe_get_invariants_X540()  local
32 	struct ixgbe_phy_info *phy = &hw->phy;  in ixgbe_get_invariants_X540()
35 	phy->ops.set_phy_power = ixgbe_set_copper_phy_power;  in ixgbe_get_invariants_X540()
37 	mac->mcft_size = IXGBE_X540_MC_TBL_SIZE;  in ixgbe_get_invariants_X540()
38 	mac->vft_size = IXGBE_X540_VFT_TBL_SIZE;  in ixgbe_get_invariants_X540()
39 	mac->num_rar_entries = IXGBE_X540_RAR_ENTRIES;  in ixgbe_get_invariants_X540()
40 	mac->rx_pb_size = IXGBE_X540_RX_PB_SIZE;  in ixgbe_get_invariants_X540()
41 	mac->max_rx_queues = IXGBE_X540_MAX_RX_QUEUES;  in ixgbe_get_invariants_X540()
42 	mac->max_tx_queues = IXGBE_X540_MAX_TX_QUEUES;  in ixgbe_get_invariants_X540()
43 	mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw);  in ixgbe_get_invariants_X540()
49  *  ixgbe_setup_mac_link_X540 - Set the auto advertised capabilitires
57 	return hw->phy.ops.setup_link_speed(hw, speed,  in ixgbe_setup_mac_link_X540()
62  *  ixgbe_reset_hw_X540 - Perform hardware reset
66  *  and clears all interrupts, perform a PHY reset, and perform a link (MAC)
71 	u32 swfw_mask = hw->phy.phy_semaphore_mask;  in ixgbe_reset_hw_X540()
76 	status = hw->mac.ops.stop_adapter(hw);  in ixgbe_reset_hw_X540()
84 	status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);  in ixgbe_reset_hw_X540()
87 		return -EBUSY;  in ixgbe_reset_hw_X540()
94 	hw->mac.ops.release_swfw_sync(hw, swfw_mask);  in ixgbe_reset_hw_X540()
97 	/* Poll for reset bit to self-clear indicating reset is complete */  in ixgbe_reset_hw_X540()
106 		status = -EIO;  in ixgbe_reset_hw_X540()
116 	if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) {  in ixgbe_reset_hw_X540()
117 		hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;  in ixgbe_reset_hw_X540()
124 	/* Store the permanent mac address */  in ixgbe_reset_hw_X540()
125 	hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);  in ixgbe_reset_hw_X540()
128 	 * Store MAC address from RAR0, clear receive address registers, and  in ixgbe_reset_hw_X540()
130 	 * since we modify this value when programming the SAN MAC address.  in ixgbe_reset_hw_X540()
132 	hw->mac.num_rar_entries = IXGBE_X540_MAX_TX_QUEUES;  in ixgbe_reset_hw_X540()
133 	hw->mac.ops.init_rx_addrs(hw);  in ixgbe_reset_hw_X540()
135 	/* Store the permanent SAN mac address */  in ixgbe_reset_hw_X540()
136 	hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr);  in ixgbe_reset_hw_X540()
138 	/* Add the SAN MAC address to the RAR only if it's a valid address */  in ixgbe_reset_hw_X540()
139 	if (is_valid_ether_addr(hw->mac.san_addr)) {  in ixgbe_reset_hw_X540()
140 		/* Save the SAN MAC RAR index */  in ixgbe_reset_hw_X540()
141 		hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1;  in ixgbe_reset_hw_X540()
143 		hw->mac.ops.set_rar(hw, hw->mac.san_mac_rar_index,  in ixgbe_reset_hw_X540()
144 				    hw->mac.san_addr, 0, IXGBE_RAH_AV);  in ixgbe_reset_hw_X540()
147 		hw->mac.ops.clear_vmdq(hw, hw->mac.san_mac_rar_index,  in ixgbe_reset_hw_X540()
150 		/* Reserve the last RAR for the SAN MAC address */  in ixgbe_reset_hw_X540()
151 		hw->mac.num_rar_entries--;  in ixgbe_reset_hw_X540()
155 	hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix,  in ixgbe_reset_hw_X540()
156 				   &hw->mac.wwpn_prefix);  in ixgbe_reset_hw_X540()
162  *  ixgbe_start_hw_X540 - Prepare hardware for Tx/Rx
167  *  Then performs revision-specific operations, if any.
181  *  ixgbe_init_eeprom_params_X540 - Initialize EEPROM params
189 	struct ixgbe_eeprom_info *eeprom = &hw->eeprom;  in ixgbe_init_eeprom_params_X540()
191 	if (eeprom->type == ixgbe_eeprom_uninitialized) {  in ixgbe_init_eeprom_params_X540()
195 		eeprom->semaphore_delay = 10;  in ixgbe_init_eeprom_params_X540()
196 		eeprom->type = ixgbe_flash;  in ixgbe_init_eeprom_params_X540()
200 		eeprom->word_size = BIT(eeprom_size +  in ixgbe_init_eeprom_params_X540()
204 		       eeprom->type, eeprom->word_size);  in ixgbe_init_eeprom_params_X540()
211  *  ixgbe_read_eerd_X540- Read EEPROM word using EERD
222 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_read_eerd_X540()
223 		return -EBUSY;  in ixgbe_read_eerd_X540()
227 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_read_eerd_X540()
232  *  ixgbe_read_eerd_buffer_X540 - Read EEPROM word(s) using EERD
236  *  @data: word(s) read from the EEPROM
238  *  Reads a 16 bit word(s) from the EEPROM using the EERD register.
245 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_read_eerd_buffer_X540()
246 		return -EBUSY;  in ixgbe_read_eerd_buffer_X540()
250 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_read_eerd_buffer_X540()
255  *  ixgbe_write_eewr_X540 - Write EEPROM word using EEWR
266 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_write_eewr_X540()
267 		return -EBUSY;  in ixgbe_write_eewr_X540()
271 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_write_eewr_X540()
276  *  ixgbe_write_eewr_buffer_X540 - Write EEPROM word(s) using EEWR
280  *  @data: word(s) write to the EEPROM
282  *  Write a 16 bit word(s) to the EEPROM using the EEWR register.
289 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_write_eewr_buffer_X540()
290 		return -EBUSY;  in ixgbe_write_eewr_buffer_X540()
294 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_write_eewr_buffer_X540()
299  *  ixgbe_calc_eeprom_checksum_X540 - Calculates and returns the checksum
318 	 * Do not use hw->eeprom.ops.read because we do not want to take  in ixgbe_calc_eeprom_checksum_X540()
323 	/* Include 0x0-0x3F in the checksum */  in ixgbe_calc_eeprom_checksum_X540()
327 			return -EIO;  in ixgbe_calc_eeprom_checksum_X540()
333 	 * Include all data from pointers 0x3, 0x6-0xE.  This excludes the  in ixgbe_calc_eeprom_checksum_X540()
347 		    pointer >= hw->eeprom.word_size)  in ixgbe_calc_eeprom_checksum_X540()
352 			return -EIO;  in ixgbe_calc_eeprom_checksum_X540()
357 		    (pointer + length) >= hw->eeprom.word_size)  in ixgbe_calc_eeprom_checksum_X540()
363 				return -EIO;  in ixgbe_calc_eeprom_checksum_X540()
369 	checksum = (u16)IXGBE_EEPROM_SUM - checksum;  in ixgbe_calc_eeprom_checksum_X540()
375  *  ixgbe_validate_eeprom_checksum_X540 - Validate EEPROM checksum
393 	status = hw->eeprom.ops.read(hw, 0, &checksum);  in ixgbe_validate_eeprom_checksum_X540()
399 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_validate_eeprom_checksum_X540()
400 		return -EBUSY;  in ixgbe_validate_eeprom_checksum_X540()
402 	status = hw->eeprom.ops.calc_checksum(hw);  in ixgbe_validate_eeprom_checksum_X540()
408 	/* Do not use hw->eeprom.ops.read because we do not want to take  in ixgbe_validate_eeprom_checksum_X540()
421 		status = -EIO;  in ixgbe_validate_eeprom_checksum_X540()
429 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_validate_eeprom_checksum_X540()
435  * ixgbe_update_eeprom_checksum_X540 - Updates the EEPROM checksum and flash
451 	status = hw->eeprom.ops.read(hw, 0, &checksum);  in ixgbe_update_eeprom_checksum_X540()
457 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_update_eeprom_checksum_X540()
458 		return  -EBUSY;  in ixgbe_update_eeprom_checksum_X540()
460 	status = hw->eeprom.ops.calc_checksum(hw);  in ixgbe_update_eeprom_checksum_X540()
466 	/* Do not use hw->eeprom.ops.write because we do not want to  in ixgbe_update_eeprom_checksum_X540()
476 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_update_eeprom_checksum_X540()
481  * ixgbe_update_flash_X540 - Instruct HW to copy EEPROM to Flash device
493 	if (status == -EIO) {  in ixgbe_update_flash_X540()
507 	if (hw->revision_id == 0) {  in ixgbe_update_flash_X540()
526  * ixgbe_poll_flash_update_done_X540 - Poll flash update status
543 	return -EIO;  in ixgbe_poll_flash_update_done_X540()
547  * ixgbe_acquire_swfw_sync_X540 - Acquire SWFW semaphore
578 			return -EBUSY;  in ixgbe_acquire_swfw_sync_X540()
597 	 * the FW/HW malfunctions. In that case the SW should set the SW bit(s)  in ixgbe_acquire_swfw_sync_X540()
598 	 * of the requested resource(s) while ignoring the corresponding FW/HW  in ixgbe_acquire_swfw_sync_X540()
602 		return -EBUSY;  in ixgbe_acquire_swfw_sync_X540()
625 		return -EBUSY;  in ixgbe_acquire_swfw_sync_X540()
629 	return -EBUSY;  in ixgbe_acquire_swfw_sync_X540()
633  * ixgbe_release_swfw_sync_X540 - Release SWFW semaphore
658  * ixgbe_get_swfw_sync_semaphore - Get hardware semaphore
683 		return -EIO;  in ixgbe_get_swfw_sync_semaphore()
700 	return -EIO;  in ixgbe_get_swfw_sync_semaphore()
704  * ixgbe_release_swfw_sync_semaphore - Release hardware semaphore
727  *  ixgbe_init_swfw_sync_X540 - Release hardware semaphore
740 	 * We got the lock - we release it.  in ixgbe_init_swfw_sync_X540()
741 	 * We timeout trying to get the lock - we force its release.  in ixgbe_init_swfw_sync_X540()
756  * ixgbe_blink_led_start_X540 - Blink LED based on index.
771 		return -EINVAL;  in ixgbe_blink_led_start_X540()
774 	 * register to work. Force link and speed in the MAC if link is down.  in ixgbe_blink_led_start_X540()
777 	hw->mac.ops.check_link(hw, &speed, &link_up, false);  in ixgbe_blink_led_start_X540()
794  * ixgbe_blink_led_stop_X540 - Stop blinking LED based on index.
807 		return -EINVAL;  in ixgbe_blink_led_stop_X540()
816 	/* Unforce link and speed in the MAC. */  in ixgbe_blink_led_stop_X540()
915 	.mac                    = ixgbe_mac_X540,