Lines Matching +full:0 +full:x00050000
8 #define VFGEN_RSTAT 0x00008800
9 #define VFGEN_RSTAT_VFR_STATE_S 0
10 #define VFGEN_RSTAT_VFR_STATE_M GENMASK(1, 0)
13 #define VF_BASE 0x00006000
15 #define VF_ATQBAL (VF_BASE + 0x1C00)
16 #define VF_ATQBAH (VF_BASE + 0x1800)
17 #define VF_ATQLEN (VF_BASE + 0x0800)
18 #define VF_ATQLEN_ATQLEN_S 0
19 #define VF_ATQLEN_ATQLEN_M GENMASK(9, 0)
28 #define VF_ATQH (VF_BASE + 0x0400)
29 #define VF_ATQH_ATQH_S 0
30 #define VF_ATQH_ATQH_M GENMASK(9, 0)
31 #define VF_ATQT (VF_BASE + 0x2400)
33 #define VF_ARQBAL (VF_BASE + 0x0C00)
35 #define VF_ARQLEN (VF_BASE + 0x2000)
36 #define VF_ARQLEN_ARQLEN_S 0
37 #define VF_ARQLEN_ARQLEN_M GENMASK(9, 0)
46 #define VF_ARQH (VF_BASE + 0x1400)
47 #define VF_ARQH_ARQH_S 0
48 #define VF_ARQH_ARQH_M GENMASK(12, 0)
49 #define VF_ARQT (VF_BASE + 0x1000)
52 #define VF_QTX_TAIL_BASE 0x00000000
53 #define VF_QTX_TAIL(_QTX) (VF_QTX_TAIL_BASE + (_QTX) * 0x4)
54 #define VF_QTX_TAIL_EXT_BASE 0x00040000
58 #define VF_QRX_TAIL_BASE 0x00002000
60 #define VF_QRX_TAIL_EXT_BASE 0x00050000
62 #define VF_QRXB_TAIL_BASE 0x00060000
66 #define VF_INT_DYN_CTL0 0x00005C00
67 #define VF_INT_DYN_CTL0_INTENA_S 0
71 #define VF_INT_DYN_CTLN(_INT) (0x00003800 + ((_INT) * 4))
72 #define VF_INT_DYN_CTLN_EXT(_INT) (0x00070000 + ((_INT) * 4))
73 #define VF_INT_DYN_CTLN_INTENA_S 0
94 #define VF_INT_ITR0(_ITR) (0x00004C00 + ((_ITR) * 4))
97 /* For VF with 16 vector support, itrn_reg_spacing is 0x4, itrn_indx_spacing
98 * is 0x40 and base register offset is 0x00002800
101 (0x00002800 + ((_INT) * 4) + ((_ITR) * 0x40))
102 /* For VF with 64 vector support, itrn_reg_spacing is 0x4, itrn_indx_spacing
103 * is 0x100 and base register offset is 0x00002C00
106 (0x00002C00 + ((_INT) * 4) + ((_ITR) * 0x100))
107 /* For VF with 2k vector support, itrn_reg_spacing is 0x4, itrn_indx_spacing
108 * is 0x2000 and base register offset is 0x00072000
111 (0x00072000 + ((_INT) * 4) + ((_ITR) * 0x2000))
113 #define VF_INT_ITRN_INTERVAL_S 0
114 #define VF_INT_ITRN_INTERVAL_M GENMASK(11, 0)
115 #define VF_INT_PBA_CLEAR 0x00008900
117 #define VF_INT_ICR0_ENA1 0x00005000
121 #define VF_INT_ICR01 0x00004800
122 #define VF_QF_HENA(_i) (0x0000C400 + ((_i) * 4))
124 #define VF_QF_HKEY(_i) (0x0000CC00 + ((_i) * 4))
126 #define VF_QF_HLUT(_i) (0x0000D000 + ((_i) * 4))