Lines Matching +full:0 +full:x000fc000
9 #define QTX_COMM_DBELL(_DBQM) (0x002C0000 + ((_DBQM) * 4))
10 #define QTX_COMM_HEAD(_DBQM) (0x000E0000 + ((_DBQM) * 4))
11 #define QTX_COMM_HEAD_HEAD_S 0
12 #define QTX_COMM_HEAD_HEAD_M ICE_M(0x1FFF, 0)
13 #define PF_FW_ARQBAH 0x00080180
14 #define PF_FW_ARQBAL 0x00080080
15 #define PF_FW_ARQH 0x00080380
16 #define PF_FW_ARQH_ARQH_M ICE_M(0x3FF, 0)
17 #define PF_FW_ARQLEN 0x00080280
18 #define PF_FW_ARQLEN_ARQLEN_M ICE_M(0x3FF, 0)
23 #define PF_FW_ARQT 0x00080480
24 #define PF_FW_ATQBAH 0x00080100
25 #define PF_FW_ATQBAL 0x00080000
26 #define PF_FW_ATQH 0x00080300
27 #define PF_FW_ATQH_ATQH_M ICE_M(0x3FF, 0)
28 #define PF_FW_ATQLEN 0x00080200
29 #define PF_FW_ATQLEN_ATQLEN_M ICE_M(0x3FF, 0)
33 #define VF_MBX_ARQLEN(_VF) (0x0022BC00 + ((_VF) * 4))
34 #define VF_MBX_ATQLEN(_VF) (0x0022A800 + ((_VF) * 4))
36 #define PF_FW_ATQT 0x00080400
37 #define PF_MBX_ARQBAH 0x0022E400
38 #define PF_MBX_ARQBAL 0x0022E380
39 #define PF_MBX_ARQH 0x0022E500
40 #define PF_MBX_ARQH_ARQH_M ICE_M(0x3FF, 0)
41 #define PF_MBX_ARQLEN 0x0022E480
42 #define PF_MBX_ARQLEN_ARQLEN_M ICE_M(0x3FF, 0)
45 #define PF_MBX_ARQT 0x0022E580
46 #define PF_MBX_ATQBAH 0x0022E180
47 #define PF_MBX_ATQBAL 0x0022E100
48 #define PF_MBX_ATQH 0x0022E280
49 #define PF_MBX_ATQH_ATQH_M ICE_M(0x3FF, 0)
50 #define PF_MBX_ATQLEN 0x0022E200
51 #define PF_MBX_ATQLEN_ATQLEN_M ICE_M(0x3FF, 0)
54 #define PF_MBX_ATQT 0x0022E300
55 #define PF_SB_ARQBAH 0x0022FF00
56 #define PF_SB_ARQBAH_ARQBAH_S 0
57 #define PF_SB_ARQBAH_ARQBAH_M ICE_M(0xFFFFFFFF, 0)
58 #define PF_SB_ARQBAL 0x0022FE80
59 #define PF_SB_ARQBAL_ARQBAL_LSB_S 0
60 #define PF_SB_ARQBAL_ARQBAL_LSB_M ICE_M(0x3F, 0)
62 #define PF_SB_ARQBAL_ARQBAL_M ICE_M(0x3FFFFFF, 6)
63 #define PF_SB_ARQH 0x00230000
64 #define PF_SB_ARQH_ARQH_S 0
65 #define PF_SB_ARQH_ARQH_M ICE_M(0x3FF, 0)
66 #define PF_SB_ARQLEN 0x0022FF80
67 #define PF_SB_ARQLEN_ARQLEN_S 0
68 #define PF_SB_ARQLEN_ARQLEN_M ICE_M(0x3FF, 0)
77 #define PF_SB_ARQT 0x00230080
78 #define PF_SB_ARQT_ARQT_S 0
79 #define PF_SB_ARQT_ARQT_M ICE_M(0x3FF, 0)
80 #define PF_SB_ATQBAH 0x0022FC80
81 #define PF_SB_ATQBAH_ATQBAH_S 0
82 #define PF_SB_ATQBAH_ATQBAH_M ICE_M(0xFFFFFFFF, 0)
83 #define PF_SB_ATQBAL 0x0022FC00
85 #define PF_SB_ATQBAL_ATQBAL_M ICE_M(0x3FFFFFF, 6)
86 #define PF_SB_ATQH 0x0022FD80
87 #define PF_SB_ATQH_ATQH_S 0
88 #define PF_SB_ATQH_ATQH_M ICE_M(0x3FF, 0)
89 #define PF_SB_ATQLEN 0x0022FD00
90 #define PF_SB_ATQLEN_ATQLEN_S 0
91 #define PF_SB_ATQLEN_ATQLEN_M ICE_M(0x3FF, 0)
100 #define PF_SB_ATQT 0x0022FE00
101 #define PF_SB_ATQT_ATQT_S 0
102 #define PF_SB_ATQT_ATQT_M ICE_M(0x3FF, 0)
103 #define PF_SB_REM_DEV_CTL 0x002300F0
104 #define PRTDCB_GENC 0x00083000
106 #define PRTDCB_GENC_PFCLDA_M ICE_M(0xFFFF, 16)
107 #define PRTDCB_GENS 0x00083020
108 #define PRTDCB_GENS_DCBX_STATUS_S 0
109 #define PRTDCB_GENS_DCBX_STATUS_M ICE_M(0x7, 0)
110 #define PRTDCB_TUP2TC 0x001D26C0
111 #define GL_PREEXT_L2_PMASK0(_i) (0x0020F0FC + ((_i) * 4))
112 #define GL_PREEXT_L2_PMASK1(_i) (0x0020F108 + ((_i) * 4))
113 #define GLFLXP_RXDID_FLAGS(_i, _j) (0x0045D000 + ((_i) * 4 + (_j) * 256))
114 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S 0
115 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M ICE_M(0x3F, 0)
116 #define GLFLXP_RXDID_FLX_WRD_0(_i) (0x0045c800 + ((_i) * 4))
117 #define GLFLXP_RXDID_FLX_WRD_0_PROT_MDID_S 0
118 #define GLFLXP_RXDID_FLX_WRD_0_PROT_MDID_M ICE_M(0xFF, 0)
120 #define GLFLXP_RXDID_FLX_WRD_0_RXDID_OPCODE_M ICE_M(0x3, 30)
121 #define GLFLXP_RXDID_FLX_WRD_1(_i) (0x0045c900 + ((_i) * 4))
122 #define GLFLXP_RXDID_FLX_WRD_1_PROT_MDID_S 0
123 #define GLFLXP_RXDID_FLX_WRD_1_PROT_MDID_M ICE_M(0xFF, 0)
125 #define GLFLXP_RXDID_FLX_WRD_1_RXDID_OPCODE_M ICE_M(0x3, 30)
126 #define GLFLXP_RXDID_FLX_WRD_2(_i) (0x0045ca00 + ((_i) * 4))
127 #define GLFLXP_RXDID_FLX_WRD_2_PROT_MDID_S 0
128 #define GLFLXP_RXDID_FLX_WRD_2_PROT_MDID_M ICE_M(0xFF, 0)
130 #define GLFLXP_RXDID_FLX_WRD_2_RXDID_OPCODE_M ICE_M(0x3, 30)
131 #define GLFLXP_RXDID_FLX_WRD_3(_i) (0x0045cb00 + ((_i) * 4))
132 #define GLFLXP_RXDID_FLX_WRD_3_PROT_MDID_S 0
133 #define GLFLXP_RXDID_FLX_WRD_3_PROT_MDID_M ICE_M(0xFF, 0)
135 #define GLFLXP_RXDID_FLX_WRD_3_RXDID_OPCODE_M ICE_M(0x3, 30)
136 #define QRXFLXP_CNTXT(_QRX) (0x00480000 + ((_QRX) * 4))
137 #define QRXFLXP_CNTXT_RXDID_IDX_S 0
138 #define QRXFLXP_CNTXT_RXDID_IDX_M ICE_M(0x3F, 0)
140 #define QRXFLXP_CNTXT_RXDID_PRIO_M ICE_M(0x7, 8)
143 #define GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_M ICE_M(0x3, 4)
144 #define GLGEN_CLKSTAT_SRC 0x000B826C
145 #define GLGEN_GPIO_CTL(_i) (0x000880C8 + ((_i) * 4))
148 #define GLGEN_GPIO_CTL_PIN_FUNC_M ICE_M(0xF, 8)
149 #define GLGEN_RSTAT 0x000B8188
150 #define GLGEN_RSTAT_DEVSTATE_M ICE_M(0x3, 0)
151 #define GLGEN_RSTCTL 0x000B8180
152 #define GLGEN_RSTCTL_GRSTDEL_S 0
153 #define GLGEN_RSTCTL_GRSTDEL_M ICE_M(0x3F, GLGEN_RSTCTL_GRSTDEL_S)
155 #define GLGEN_RSTAT_RESET_TYPE_M ICE_M(0x3, 2)
156 #define GLGEN_RTRIG 0x000B8190
157 #define GLGEN_RTRIG_CORER_M BIT(0)
159 #define GLGEN_STAT 0x000B612C
160 #define GLGEN_SWITCH_MODE_CONFIG 0x000B81E0
162 #define GLGEN_VFLRSTAT(_i) (0x00093A04 + ((_i) * 4))
163 #define PFGEN_CTRL 0x00091000
164 #define PFGEN_CTRL_PFSWR_M BIT(0)
165 #define PFGEN_STATE 0x00088000
166 #define PRTGEN_STATUS 0x000B8100
167 #define VFGEN_RSTAT(_VF) (0x00074000 + ((_VF) * 4))
168 #define VPGEN_VFRSTAT(_VF) (0x00090800 + ((_VF) * 4))
169 #define VPGEN_VFRSTAT_VFRD_M BIT(0)
170 #define VPGEN_VFRTRIG(_VF) (0x00090000 + ((_VF) * 4))
171 #define VPGEN_VFRTRIG_VFSWR_M BIT(0)
172 #define GLINT_CTL 0x0016CC54
173 #define GLINT_CTL_DIS_AUTOMASK_M BIT(0)
175 #define GLINT_CTL_ITR_GRAN_200_M ICE_M(0xF, 16)
177 #define GLINT_CTL_ITR_GRAN_100_M ICE_M(0xF, 20)
179 #define GLINT_CTL_ITR_GRAN_50_M ICE_M(0xF, 24)
181 #define GLINT_CTL_ITR_GRAN_25_M ICE_M(0xF, 28)
182 #define GLGEN_MAC_LINK_TOPO 0x000B81DC
183 #define GLGEN_MAC_LINK_TOPO_LINK_TOPO_M GENMASK(1, 0)
184 #define GLINT_DYN_CTL(_INT) (0x00160000 + ((_INT) * 4))
185 #define GLINT_DYN_CTL_INTENA_M BIT(0)
189 #define GLINT_DYN_CTL_ITR_INDX_M ICE_M(0x3, 3)
191 #define GLINT_DYN_CTL_INTERVAL_M ICE_M(0xFFF, 5)
194 #define GLINT_DYN_CTL_SW_ITR_INDX_M ICE_M(0x3, 25)
197 #define GLINT_ITR(_i, _INT) (0x00154000 + ((_i) * 8192 + (_INT) * 4))
198 #define GLINT_RATE(_INT) (0x0015A000 + ((_INT) * 4))
200 #define GLINT_VECT2FUNC(_INT) (0x00162000 + ((_INT) * 4))
201 #define GLINT_VECT2FUNC_VF_NUM_S 0
202 #define GLINT_VECT2FUNC_VF_NUM_M ICE_M(0xFF, 0)
204 #define GLINT_VECT2FUNC_PF_NUM_M ICE_M(0x7, 12)
207 #define PFINT_ALLOC 0x001D2600
208 #define PFINT_ALLOC_FIRST ICE_M(0x7FF, 0)
209 #define PFINT_FW_CTL 0x0016C800
210 #define PFINT_FW_CTL_MSIX_INDX_M ICE_M(0x7FF, 0)
212 #define PFINT_FW_CTL_ITR_INDX_M ICE_M(0x3, 11)
214 #define PFINT_MBX_CTL 0x0016B280
215 #define PFINT_MBX_CTL_MSIX_INDX_M ICE_M(0x7FF, 0)
217 #define PFINT_MBX_CTL_ITR_INDX_M ICE_M(0x3, 11)
219 #define PFINT_OICR 0x0016CA00
231 #define PFINT_OICR_CTL 0x0016CA80
232 #define PFINT_OICR_CTL_MSIX_INDX_M ICE_M(0x7FF, 0)
234 #define PFINT_OICR_CTL_ITR_INDX_M ICE_M(0x3, 11)
236 #define PFINT_OICR_ENA 0x0016C900
237 #define PFINT_SB_CTL 0x0016B600
238 #define PFINT_SB_CTL_MSIX_INDX_M ICE_M(0x7FF, 0)
240 #define PFINT_TSYN_MSK 0x0016C980
241 #define QINT_RQCTL(_QRX) (0x00150000 + ((_QRX) * 4))
242 #define QINT_RQCTL_MSIX_INDX_S 0
243 #define QINT_RQCTL_MSIX_INDX_M ICE_M(0x7FF, 0)
245 #define QINT_RQCTL_ITR_INDX_M ICE_M(0x3, 11)
247 #define QINT_TQCTL(_DBQM) (0x00140000 + ((_DBQM) * 4))
248 #define QINT_TQCTL_MSIX_INDX_S 0
249 #define QINT_TQCTL_MSIX_INDX_M ICE_M(0x7FF, 0)
251 #define QINT_TQCTL_ITR_INDX_M ICE_M(0x3, 11)
253 #define VPINT_ALLOC(_VF) (0x001D1000 + ((_VF) * 4))
254 #define VPINT_ALLOC_FIRST_S 0
255 #define VPINT_ALLOC_FIRST_M ICE_M(0x7FF, 0)
257 #define VPINT_ALLOC_LAST_M ICE_M(0x7FF, 12)
259 #define VPINT_ALLOC_PCI(_VF) (0x0009D000 + ((_VF) * 4))
260 #define VPINT_ALLOC_PCI_FIRST_S 0
261 #define VPINT_ALLOC_PCI_FIRST_M ICE_M(0x7FF, 0)
263 #define VPINT_ALLOC_PCI_LAST_M ICE_M(0x7FF, 12)
265 #define VPINT_MBX_CTL(_VSI) (0x0016A000 + ((_VSI) * 4))
267 #define GLLAN_RCTL_0 0x002941F8
268 #define QRX_CONTEXT(_i, _QRX) (0x00280000 + ((_i) * 8192 + (_QRX) * 4))
269 #define QRX_CTRL(_QRX) (0x00120000 + ((_QRX) * 4))
271 #define QRX_CTRL_QENA_REQ_S 0
272 #define QRX_CTRL_QENA_REQ_M BIT(0)
275 #define QRX_ITR(_QRX) (0x00292000 + ((_QRX) * 4))
276 #define QRX_TAIL(_QRX) (0x00290000 + ((_QRX) * 4))
278 #define QRX_TAIL_TAIL_S 0
279 #define QRX_TAIL_TAIL_M ICE_M(0x1FFF, 0)
280 #define VPLAN_RX_QBASE(_VF) (0x00072000 + ((_VF) * 4))
281 #define VPLAN_RX_QBASE_VFFIRSTQ_S 0
282 #define VPLAN_RX_QBASE_VFFIRSTQ_M ICE_M(0x7FF, 0)
284 #define VPLAN_RX_QBASE_VFNUMQ_M ICE_M(0xFF, 16)
285 #define VPLAN_RXQ_MAPENA(_VF) (0x00073000 + ((_VF) * 4))
286 #define VPLAN_RXQ_MAPENA_RX_ENA_M BIT(0)
287 #define VPLAN_TX_QBASE(_VF) (0x001D1800 + ((_VF) * 4))
288 #define VPLAN_TX_QBASE_VFFIRSTQ_S 0
289 #define VPLAN_TX_QBASE_VFFIRSTQ_M ICE_M(0x3FFF, 0)
291 #define VPLAN_TX_QBASE_VFNUMQ_M ICE_M(0xFF, 16)
292 #define VPLAN_TXQ_MAPENA(_VF) (0x00073800 + ((_VF) * 4))
293 #define VPLAN_TXQ_MAPENA_TX_ENA_M BIT(0)
294 #define E800_PRTMAC_HSEC_CTL_TX_PS_QNT(_i) (0x001E36E0 + ((_i) * 32))
296 #define E800_PRTMAC_HSEC_CTL_TX_PS_QNT_M GENMASK(15, 0)
297 #define E800_PRTMAC_HSEC_CTL_TX_PS_RFSH_TMR(_i) (0x001E3800 + ((_i) * 32))
298 #define E800_PRTMAC_HSEC_CTL_TX_PS_RFSH_TMR_M GENMASK(15, 0)
299 #define GL_MDCK_TX_TDPU 0x00049348
301 #define GL_MDET_RX 0x00294C00
302 #define GL_MDET_RX_QNUM_S 0
303 #define GL_MDET_RX_QNUM_M ICE_M(0x7FFF, 0)
305 #define GL_MDET_RX_VF_NUM_M ICE_M(0xFF, 15)
307 #define GL_MDET_RX_PF_NUM_M ICE_M(0x7, 23)
309 #define GL_MDET_RX_MAL_TYPE_M ICE_M(0x1F, 26)
311 #define GL_MDET_TX_PQM 0x002D2E00
312 #define GL_MDET_TX_PQM_PF_NUM_S 0
313 #define GL_MDET_TX_PQM_PF_NUM_M ICE_M(0x7, 0)
315 #define GL_MDET_TX_PQM_VF_NUM_M ICE_M(0xFF, 4)
317 #define GL_MDET_TX_PQM_QNUM_M ICE_M(0x3FFF, 12)
319 #define GL_MDET_TX_PQM_MAL_TYPE_M ICE_M(0x1F, 26)
324 #define E800_GL_MDET_TX_TCLAN 0x000FC068
325 #define E830_GL_MDET_TX_TCLAN 0x000FCCC0
326 #define GL_MDET_TX_TCLAN_QNUM_S 0
327 #define GL_MDET_TX_TCLAN_QNUM_M ICE_M(0x7FFF, 0)
329 #define GL_MDET_TX_TCLAN_VF_NUM_M ICE_M(0xFF, 15)
331 #define GL_MDET_TX_TCLAN_PF_NUM_M ICE_M(0x7, 23)
333 #define GL_MDET_TX_TCLAN_MAL_TYPE_M ICE_M(0x1F, 26)
335 #define PF_MDET_RX 0x00294280
336 #define PF_MDET_RX_VALID_M BIT(0)
337 #define PF_MDET_TX_PQM 0x002D2C80
338 #define PF_MDET_TX_PQM_VALID_M BIT(0)
342 #define E800_PF_MDET_TX_TCLAN 0x000FC000
343 #define E830_PF_MDET_TX_TCLAN 0x000FCC00
344 #define PF_MDET_TX_TCLAN_VALID_M BIT(0)
345 #define VP_MDET_RX(_VF) (0x00294400 + ((_VF) * 4))
346 #define VP_MDET_RX_VALID_M BIT(0)
347 #define VP_MDET_TX_PQM(_VF) (0x002D2000 + ((_VF) * 4))
348 #define VP_MDET_TX_PQM_VALID_M BIT(0)
349 #define VP_MDET_TX_TCLAN(_VF) (0x000FB800 + ((_VF) * 4))
350 #define VP_MDET_TX_TCLAN_VALID_M BIT(0)
351 #define VP_MDET_TX_TDPU(_VF) (0x00040000 + ((_VF) * 4))
352 #define VP_MDET_TX_TDPU_VALID_M BIT(0)
353 #define E800_GL_MNG_FWSM_FW_MODES_M GENMASK(2, 0)
354 #define E830_GL_MNG_FWSM_FW_MODES_M GENMASK(1, 0)
355 #define GL_MNG_FWSM 0x000B6134
357 #define GLNVM_FLA 0x000B6108
359 #define GLNVM_GENS 0x000B6100
361 #define GLNVM_GENS_SR_SIZE_M ICE_M(0x7, 5)
362 #define GLNVM_ULD 0x000B6008
363 #define GLNVM_ULD_PCIER_DONE_M BIT(0)
371 #define GLPCI_CNF2 0x000BE004
373 #define PF_FUNC_RID 0x0009E880
374 #define PF_FUNC_RID_FUNC_NUM_S 0
375 #define PF_FUNC_RID_FUNC_NUM_M ICE_M(0x7, 0)
376 #define PF_PCI_CIAA 0x0009E580
378 #define PF_PCI_CIAD 0x0009E500
379 #define GL_PWR_MODE_CTL 0x000B820C
381 #define GL_PWR_MODE_CTL_CAR_MAX_BW_M ICE_M(0x3, 30)
382 #define GLQF_FD_CNT 0x00460018
383 #define E800_GLQF_FD_CNT_FD_GCNT_M GENMASK(14, 0)
384 #define E830_GLQF_FD_CNT_FD_GCNT_M GENMASK(15, 0)
388 #define GLQF_FD_SIZE 0x00460010
389 #define GLQF_FD_SIZE_FD_GSIZE_S 0
390 #define E800_GLQF_FD_SIZE_FD_GSIZE_M GENMASK(14, 0)
391 #define E830_GLQF_FD_SIZE_FD_GSIZE_M GENMASK(15, 0)
395 #define GLQF_FDINSET(_i, _j) (0x00412000 + ((_i) * 4 + (_j) * 512))
396 #define GLQF_FDMASK(_i) (0x00410800 + ((_i) * 4))
398 #define GLQF_FDMASK_MSK_INDEX_S 0
399 #define GLQF_FDMASK_MSK_INDEX_M ICE_M(0x1F, 0)
401 #define GLQF_FDMASK_MASK_M ICE_M(0xFFFF, 16)
402 #define GLQF_FDMASK_SEL(_i) (0x00410400 + ((_i) * 4))
403 #define GLQF_FDSWAP(_i, _j) (0x00413000 + ((_i) * 4 + (_j) * 512))
404 #define GLQF_HMASK(_i) (0x0040FC00 + ((_i) * 4))
406 #define GLQF_HMASK_MSK_INDEX_S 0
407 #define GLQF_HMASK_MSK_INDEX_M ICE_M(0x1F, 0)
409 #define GLQF_HMASK_MASK_M ICE_M(0xFFFF, 16)
410 #define GLQF_HMASK_SEL(_i) (0x00410000 + ((_i) * 4))
412 #define GLQF_HMASK_SEL_MASK_SEL_S 0
413 #define GLQF_HSYMM(_i, _j) (0x0040F000 + ((_i) * 4 + (_j) * 512))
417 #define E800_PFQF_FD_CNT_FD_GCNT_M GENMASK(14, 0)
418 #define E830_PFQF_FD_CNT_FD_GCNT_M GENMASK(15, 0)
421 #define PFQF_FD_ENA 0x0043A000
422 #define PFQF_FD_ENA_FD_ENA_M BIT(0)
423 #define PFQF_FD_SIZE 0x00460100
424 #define GLDCB_RTCTQ_RXQNUM_S 0
425 #define GLDCB_RTCTQ_RXQNUM_M ICE_M(0x7FF, 0)
426 #define GLPRT_BPRCL(_i) (0x00381380 + ((_i) * 8))
427 #define GLPRT_BPTCL(_i) (0x00381240 + ((_i) * 8))
428 #define GLPRT_CRCERRS(_i) (0x00380100 + ((_i) * 8))
429 #define GLPRT_GORCL(_i) (0x00380000 + ((_i) * 8))
430 #define GLPRT_GOTCL(_i) (0x00380B40 + ((_i) * 8))
431 #define GLPRT_ILLERRC(_i) (0x003801C0 + ((_i) * 8))
432 #define GLPRT_LXOFFRXC(_i) (0x003802C0 + ((_i) * 8))
433 #define GLPRT_LXOFFTXC(_i) (0x00381180 + ((_i) * 8))
434 #define GLPRT_LXONRXC(_i) (0x00380280 + ((_i) * 8))
435 #define GLPRT_LXONTXC(_i) (0x00381140 + ((_i) * 8))
436 #define GLPRT_MLFC(_i) (0x00380040 + ((_i) * 8))
437 #define GLPRT_MPRCL(_i) (0x00381340 + ((_i) * 8))
438 #define GLPRT_MPTCL(_i) (0x00381200 + ((_i) * 8))
439 #define GLPRT_MRFC(_i) (0x00380080 + ((_i) * 8))
440 #define GLPRT_PRC1023L(_i) (0x00380A00 + ((_i) * 8))
441 #define GLPRT_PRC127L(_i) (0x00380940 + ((_i) * 8))
442 #define GLPRT_PRC1522L(_i) (0x00380A40 + ((_i) * 8))
443 #define GLPRT_PRC255L(_i) (0x00380980 + ((_i) * 8))
444 #define GLPRT_PRC511L(_i) (0x003809C0 + ((_i) * 8))
445 #define GLPRT_PRC64L(_i) (0x00380900 + ((_i) * 8))
446 #define GLPRT_PRC9522L(_i) (0x00380A80 + ((_i) * 8))
447 #define GLPRT_PTC1023L(_i) (0x00380C80 + ((_i) * 8))
448 #define GLPRT_PTC127L(_i) (0x00380BC0 + ((_i) * 8))
449 #define GLPRT_PTC1522L(_i) (0x00380CC0 + ((_i) * 8))
450 #define GLPRT_PTC255L(_i) (0x00380C00 + ((_i) * 8))
451 #define GLPRT_PTC511L(_i) (0x00380C40 + ((_i) * 8))
452 #define GLPRT_PTC64L(_i) (0x00380B80 + ((_i) * 8))
453 #define GLPRT_PTC9522L(_i) (0x00380D00 + ((_i) * 8))
454 #define GLPRT_PXOFFRXC(_i, _j) (0x00380500 + ((_i) * 8 + (_j) * 64))
455 #define GLPRT_PXOFFTXC(_i, _j) (0x00380F40 + ((_i) * 8 + (_j) * 64))
456 #define GLPRT_PXONRXC(_i, _j) (0x00380300 + ((_i) * 8 + (_j) * 64))
457 #define GLPRT_PXONTXC(_i, _j) (0x00380D40 + ((_i) * 8 + (_j) * 64))
458 #define GLPRT_RFC(_i) (0x00380AC0 + ((_i) * 8))
459 #define GLPRT_RJC(_i) (0x00380B00 + ((_i) * 8))
460 #define GLPRT_RLEC(_i) (0x00380140 + ((_i) * 8))
461 #define GLPRT_ROC(_i) (0x00380240 + ((_i) * 8))
462 #define GLPRT_RUC(_i) (0x00380200 + ((_i) * 8))
463 #define GLPRT_RXON2OFFCNT(_i, _j) (0x00380700 + ((_i) * 8 + (_j) * 64))
464 #define GLPRT_TDOLD(_i) (0x00381280 + ((_i) * 8))
465 #define GLPRT_UPRCL(_i) (0x00381300 + ((_i) * 8))
466 #define GLPRT_UPTCL(_i) (0x003811C0 + ((_i) * 8))
467 #define GLSTAT_FD_CNT0L(_i) (0x003A0000 + ((_i) * 8))
468 #define GLV_BPRCL(_i) (0x003B6000 + ((_i) * 8))
469 #define GLV_BPTCL(_i) (0x0030E000 + ((_i) * 8))
470 #define GLV_GORCL(_i) (0x003B0000 + ((_i) * 8))
471 #define GLV_GOTCL(_i) (0x00300000 + ((_i) * 8))
472 #define GLV_MPRCL(_i) (0x003B4000 + ((_i) * 8))
473 #define GLV_MPTCL(_i) (0x0030C000 + ((_i) * 8))
474 #define GLV_RDPC(_i) (0x00294C04 + ((_i) * 4))
475 #define GLV_TEPC(_VSI) (0x00312000 + ((_VSI) * 4))
476 #define GLV_UPRCL(_i) (0x003B2000 + ((_i) * 8))
477 #define GLV_UPTCL(_i) (0x0030A000 + ((_i) * 8))
478 #define PRTRPB_RDPC 0x000AC260
479 #define GLHH_ART_CTL 0x000A41D4
480 #define GLHH_ART_CTL_ACTIVE_M BIT(0)
481 #define GLHH_ART_TIME_H 0x000A41D8
482 #define GLHH_ART_TIME_L 0x000A41DC
483 #define GLTSYN_AUX_IN_0(_i) (0x000889D8 + ((_i) * 4))
485 #define GLTSYN_AUX_OUT_0(_i) (0x00088998 + ((_i) * 4))
486 #define GLTSYN_AUX_OUT_0_OUT_ENA_M BIT(0)
487 #define GLTSYN_AUX_OUT_0_OUTMOD_M ICE_M(0x3, 1)
488 #define GLTSYN_CLKO_0(_i) (0x000889B8 + ((_i) * 4))
489 #define GLTSYN_CMD 0x00088810
490 #define GLTSYN_CMD_SYNC 0x00088814
491 #define GLTSYN_ENA(_i) (0x00088808 + ((_i) * 4))
492 #define GLTSYN_ENA_TSYN_ENA_M BIT(0)
493 #define GLTSYN_EVNT_H_0(_i) (0x00088970 + ((_i) * 4))
494 #define GLTSYN_EVNT_L_0(_i) (0x00088968 + ((_i) * 4))
495 #define GLTSYN_HHTIME_H(_i) (0x00088900 + ((_i) * 4))
496 #define GLTSYN_HHTIME_L(_i) (0x000888F8 + ((_i) * 4))
497 #define GLTSYN_INCVAL_H(_i) (0x00088920 + ((_i) * 4))
498 #define GLTSYN_INCVAL_L(_i) (0x00088918 + ((_i) * 4))
499 #define GLTSYN_SHADJ_H(_i) (0x00088910 + ((_i) * 4))
500 #define GLTSYN_SHADJ_L(_i) (0x00088908 + ((_i) * 4))
501 #define GLTSYN_SHTIME_0(_i) (0x000888E0 + ((_i) * 4))
502 #define GLTSYN_SHTIME_H(_i) (0x000888F0 + ((_i) * 4))
503 #define GLTSYN_SHTIME_L(_i) (0x000888E8 + ((_i) * 4))
504 #define GLTSYN_STAT(_i) (0x000888C0 + ((_i) * 4))
505 #define GLTSYN_STAT_EVENT0_M BIT(0)
508 #define GLTSYN_SYNC_DLAY 0x00088818
509 #define GLTSYN_TGT_H_0(_i) (0x00088930 + ((_i) * 4))
510 #define GLTSYN_TGT_L_0(_i) (0x00088928 + ((_i) * 4))
511 #define GLTSYN_TIME_0(_i) (0x000888C8 + ((_i) * 4))
512 #define GLTSYN_TIME_H(_i) (0x000888D8 + ((_i) * 4))
513 #define GLTSYN_TIME_L(_i) (0x000888D0 + ((_i) * 4))
514 #define PFHH_SEM 0x000A4200 /* Reset Source: PFR */
515 #define PFHH_SEM_BUSY_M BIT(0)
516 #define PFTSYN_SEM 0x00088880
517 #define PFTSYN_SEM_BUSY_M BIT(0)
518 #define VSIQF_FD_CNT(_VSI) (0x00464000 + ((_VSI) * 4))
519 #define VSIQF_FD_CNT_FD_GCNT_S 0
520 #define E800_VSIQF_FD_CNT_FD_GCNT_M GENMASK(13, 0)
521 #define E830_VSIQF_FD_CNT_FD_GCNT_M GENMASK(15, 0)
525 #define VSIQF_FD_SIZE(_VSI) (0x00462000 + ((_VSI) * 4))
527 #define PFPM_APM 0x000B8080
528 #define PFPM_APM_APME_M BIT(0)
529 #define PFPM_WUFC 0x0009DC00
531 #define PFPM_WUS 0x0009DB80
532 #define PFPM_WUS_LNKC_M BIT(0)
536 #define E830_PRTMAC_CL01_PS_QNT 0x001E32A0
537 #define E830_PRTMAC_CL01_PS_QNT_CL0_M GENMASK(15, 0)
538 #define E830_PRTMAC_CL01_QNT_THR 0x001E3320
539 #define E830_PRTMAC_CL01_QNT_THR_CL0_M GENMASK(15, 0)
540 #define VFINT_DYN_CTLN(_i) (0x00003800 + ((_i) * 4))