intel/e1000e/ich8lan.h

1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
36 #define E1000_ICH_FWSM_PCIM2PCI	0x01000000	/* ME PCIm-to-PCI active */
93 /* bit24: RXDCTL thresholds granularity: 0 - cache lines, 1 - descriptors */
106 #define E1000_PCH2_RAR_ENTRIES	5	/* RAR[0], SHRA[0-3] */
107 #define E1000_PCH_LPT_RAR_ENTRIES	12	/* RAR[0], SHRA[0-10] */
144 /* Half-duplex collision counts */
165 /* SMBus Control Phy Register */
176 #define I218_ULP_CONFIG1_RESET_TO_SMBUS	0x0100	/* Reset to SMBus mode */
179 /* disable clear of sticky ULP on PERST */
181 #define I218_ULP_CONFIG1_DISABLE_SMB_PERST	0x1000	/* Disable on PERST# */
183 /* SMBus Address Phy Register */
192 /* Strapping Option Register - RO */
202 #define HV_OEM_BITS_GBE_DIS	0x0040	/* Gigabit Disable */
203 #define HV_OEM_BITS_RESTART_AN	0x0400	/* Restart Auto-negotiation */
222 #define SW_FLAG_TIMEOUT		1000	/* SW Semaphore flag timeout in ms */